-----------------------------------------------------------------------
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-----------------------------------------------------------------------
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---- ----
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---- ----
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---- Montgomery modular multiplier and exponentiator ----
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---- Montgomery modular multiplier and exponentiator ----
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---- ----
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---- ----
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---- This file is part of the Montgomery modular multiplier ----
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---- This file is part of the Montgomery modular multiplier ----
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---- and exponentiator project ----
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---- and exponentiator project ----
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---- http://opencores.org/project,mod_mult_exp ----
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---- http://opencores.org/project,mod_mult_exp ----
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---- ----
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---- ----
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---- Description: ----
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---- Description: ----
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---- Properties file for multiplier and exponentiator ----
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---- Properties file for multiplier and exponentiator ----
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---- (32 bit). ----
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---- (32 bit). ----
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---- To Do: ----
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---- To Do: ----
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---- ----
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---- ----
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---- Author(s): ----
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---- Author(s): ----
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---- - Krzysztof Gajewski, gajos@opencores.org ----
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---- - Krzysztof Gajewski, gajos@opencores.org ----
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---- k.gajewski@gmail.com ----
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---- k.gajewski@gmail.com ----
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---- ----
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---- ----
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-----------------------------------------------------------------------
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-----------------------------------------------------------------------
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---- ----
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---- ----
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---- Copyright (C) 2014 Authors and OPENCORES.ORG ----
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---- Copyright (C) 2014 Authors and OPENCORES.ORG ----
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---- ----
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---- ----
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---- This source file may be used and distributed without ----
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---- This source file may be used and distributed without ----
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---- restriction provided that this copyright statement is not ----
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---- restriction provided that this copyright statement is not ----
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---- removed from the file and that any derivative work contains ----
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---- removed from the file and that any derivative work contains ----
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---- the original copyright notice and the associated disclaimer. ----
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---- the original copyright notice and the associated disclaimer. ----
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---- ----
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---- ----
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---- This source file is free software; you can redistribute it ----
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---- This source file is free software; you can redistribute it ----
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---- and-or modify it under the terms of the GNU Lesser General ----
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---- and-or modify it under the terms of the GNU Lesser General ----
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---- Public License as published by the Free Software Foundation; ----
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---- Public License as published by the Free Software Foundation; ----
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---- either version 2.1 of the License, or (at your option) any ----
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---- either version 2.1 of the License, or (at your option) any ----
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---- later version. ----
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---- later version. ----
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---- ----
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---- ----
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---- This source is distributed in the hope that it will be ----
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---- This source is distributed in the hope that it will be ----
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---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
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---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
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---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
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---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
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---- PURPOSE. See the GNU Lesser General Public License for more ----
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---- PURPOSE. See the GNU Lesser General Public License for more ----
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---- details. ----
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---- details. ----
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---- ----
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---- ----
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---- You should have received a copy of the GNU Lesser General ----
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---- You should have received a copy of the GNU Lesser General ----
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---- Public License along with this source; if not, download it ----
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---- Public License along with this source; if not, download it ----
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---- from http://www.opencores.org/lgpl.shtml ----
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---- from http://www.opencores.org/lgpl.shtml ----
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---- ----
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---- ----
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-----------------------------------------------------------------------
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-----------------------------------------------------------------------
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library IEEE;
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library IEEE;
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use IEEE.STD_LOGIC_1164.all;
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use IEEE.STD_LOGIC_1164.all;
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package properties is
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package properties is
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-- Declare constants
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-- Declare constants
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constant BYTE : INTEGER := 8;
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constant BYTE : INTEGER := 8;
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constant WORD_LENGTH : INTEGER := 32;
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constant WORD_LENGTH : INTEGER := 32;
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constant WORD_INTEGER : INTEGER := 6;
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constant WORD_INTEGER : INTEGER := 6;
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constant WORD_INT_LOG : INTEGER := 3;
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constant WORD_INT_LOG : INTEGER := 3;
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constant WORD_INT_LOG_STR : STD_LOGIC_VECTOR(WORD_INT_LOG - 1 downto 0) := "110";
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constant WORD_INT_LOG_STR : STD_LOGIC_VECTOR(WORD_INT_LOG - 1 downto 0) := "110";
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constant count_up : STD_LOGIC_VECTOR(1 downto 0) := "00";
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constant count_up : STD_LOGIC_VECTOR(1 downto 0) := "00";
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constant count_down : STD_LOGIC_VECTOR(1 downto 0) := "01";
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constant count_down : STD_LOGIC_VECTOR(1 downto 0) := "01";
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constant do_nothing : STD_LOGIC_VECTOR(1 downto 0) := "11";
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constant do_nothing : STD_LOGIC_VECTOR(1 downto 0) := "11";
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type multiplier_states is (NOP, CALCULATE_START, STOP);
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type multiplier_states is (NOP, CALCULATE_START, STOP);
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type finalizer_states is (FIRST_RUN, NOP,
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type exponentiator_states is (FIRST_RUN, NOP,
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READ_DATA_HASH_M, READ_DATA_C1, READ_DATA_N, READ_DATA_E, READ_DATA_D2, READ_DATA_CINV,
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READ_DATA_BASE, READ_DATA_MODULUS, READ_DATA_EXPONENT, READ_DATA_RESIDUUM,
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COUNT_C2, EXP_Z_C2, SAVE_EXP_Z_C2, EXP_P_C2, SAVE_EXP_P_C2, EXP_CONTROL_C2, EXP_END_C2, SAVE_EXP_MULT_C2,
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COUNT_POWER, EXP_Z, SAVE_EXP_Z, EXP_P, SAVE_EXP_P, EXP_CONTROL, EXP_END, SAVE_EXP_MULT,
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COUNT_Cinv, MULT_CINV, SAVE_MULT_CINV,
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INFO_RESULT, SHOW_RESULT);
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COUNT_C, MULT_C, SAVE_MULT_C,
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COUNT_M, EXP_Z_M, SAVE_EXP_Z_M, EXP_P_M, SAVE_EXP_P_M, EXP_CONTROL_M, EXP_END_M, SAVE_EXP_M,
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MAKE_COMPARE, COMP, COMPARE_RESULT,
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INFO_RESULT, SHOW_RESULT, FAIL_STATE);
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type fin_data_ctrl_states is (NOP, PAD_FAIL, PAD_FAIL_NOP, PAD_FAIL_DECODE,
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type fin_data_ctrl_states is (NOP, PAD_FAIL, PAD_FAIL_NOP, PAD_FAIL_DECODE,
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DECODE_IN, READ_DATA, DECODE_READ, DECODE_READ_PROP, MAKE_FINALIZE, OUTPUT_DATA, INFO_STATE,
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DECODE_IN, READ_DATA, DECODE_READ, DECODE_READ_PROP, MAKE_FINALIZE, OUTPUT_DATA, INFO_STATE,
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TEMPORARY_STATE, DATA_TO_OUT_PROPAGATE, DATA_TO_OUT_PROPAGATE2, MOVE_DATA, MOVE_OUTPUT_DATA);
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TEMPORARY_STATE, DATA_TO_OUT_PROPAGATE, DATA_TO_OUT_PROPAGATE2, MOVE_DATA, MOVE_OUTPUT_DATA);
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---- mnemonics for finalizer
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---- mnemonics for exponentiator
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constant mn_read_hash_m : STD_LOGIC_VECTOR(7 downto 0) := "00000001";
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constant mn_read_base : STD_LOGIC_VECTOR(2 downto 0) := "000";
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constant mn_read_c1 : STD_LOGIC_VECTOR(7 downto 0) := "00000010";
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constant mn_read_modulus : STD_LOGIC_VECTOR(2 downto 0) := "001";
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constant mn_read_n : STD_LOGIC_VECTOR(7 downto 0) := "00000011";
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constant mn_read_exponent : STD_LOGIC_VECTOR(2 downto 0) := "010";
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constant mn_read_e : STD_LOGIC_VECTOR(7 downto 0) := "00000100";
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constant mn_read_residuum : STD_LOGIC_VECTOR(2 downto 0) := "011";
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constant mn_read_d2 : STD_LOGIC_VECTOR(7 downto 0) := "00000110";
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constant mn_count_power : STD_LOGIC_VECTOR(2 downto 0) := "100";
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constant mn_read_cinv : STD_LOGIC_VECTOR(7 downto 0) := "00000111";
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constant mn_show_result : STD_LOGIC_VECTOR(2 downto 0) := "101";
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constant mn_finalize : STD_LOGIC_VECTOR(7 downto 0) := "00001000";
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constant mn_show_status : STD_LOGIC_VECTOR(2 downto 0) := "110";
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constant mn_show_result : STD_LOGIC_VECTOR(7 downto 0) := "00001001";
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constant mn_prepare_for_data : STD_LOGIC_VECTOR(2 downto 0) := "111";
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constant mn_show_status : STD_LOGIC_VECTOR(7 downto 0) := "00001010";
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constant mn_prepare_for_data : STD_LOGIC_VECTOR(7 downto 0) := "00001011";
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---- addresses for memory data
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---- addresses for memory data
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constant addr_hashM : STD_LOGIC_VECTOR(3 downto 0) := "0000";
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constant addr_base : STD_LOGIC_VECTOR(3 downto 0) := "0000";
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constant addr_c1 : STD_LOGIC_VECTOR(3 downto 0) := "0001";
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constant addr_modulus : STD_LOGIC_VECTOR(3 downto 0) := "0010";
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constant addr_N : STD_LOGIC_VECTOR(3 downto 0) := "0010";
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constant addr_exponent : STD_LOGIC_VECTOR(3 downto 0) := "0100";
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constant addr_E : STD_LOGIC_VECTOR(3 downto 0) := "0011";
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constant addr_power : STD_LOGIC_VECTOR(3 downto 0) := "0101";
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constant addr_d2 : STD_LOGIC_VECTOR(3 downto 0) := "0100";
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constant addr_residuum : STD_LOGIC_VECTOR(3 downto 0) := "1000";
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constant addr_c2 : STD_LOGIC_VECTOR(3 downto 0) := "0101";
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constant addr_c : STD_LOGIC_VECTOR(3 downto 0) := "0110";
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constant addr_hashMc : STD_LOGIC_VECTOR(3 downto 0) := "0111";
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constant addr_cinv : STD_LOGIC_VECTOR(3 downto 0) := "1000";
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constant addr_one : STD_LOGIC_VECTOR(3 downto 0) := "1001";
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constant addr_one : STD_LOGIC_VECTOR(3 downto 0) := "1001";
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constant addr_unused : STD_LOGIC_VECTOR(3 downto 0) := "1101";
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constant addr_unused : STD_LOGIC_VECTOR(3 downto 0) := "1101";
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constant addr_z : STD_LOGIC_VECTOR(3 downto 0) := "1110";
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constant addr_z : STD_LOGIC_VECTOR(3 downto 0) := "1110";
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constant addr_p : STD_LOGIC_VECTOR(3 downto 0) := "1111";
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constant addr_p : STD_LOGIC_VECTOR(3 downto 0) := "1111";
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---- help_statuses_for_clarity
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---- help_statuses_for_clarity
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constant stat_all_data_readed : STD_LOGIC_VECTOR(5 downto 0) := "111111";
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constant stat_all_data_readed : STD_LOGIC_VECTOR(5 downto 0) := "111111";
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constant stat_clear_status : STD_LOGIC_VECTOR(5 downto 0) := "000000";
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constant stat_clear_status : STD_LOGIC_VECTOR(5 downto 0) := "000000";
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end properties;
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end properties;
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package body properties is
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package body properties is
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end properties;
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end properties;
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