-- #################################################################################################
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-- #################################################################################################
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-- # << NEORV32 - Processor-internal bootloader ROM (BOOTROM) >> #
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-- # << NEORV32 - Processor-internal bootloader ROM (BOOTROM) >> #
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-- # ********************************************************************************************* #
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-- # ********************************************************************************************* #
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-- # BSD 3-Clause License #
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-- # BSD 3-Clause License #
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-- # #
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-- # #
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-- # Copyright (c) 2020, Stephan Nolting. All rights reserved. #
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-- # Copyright (c) 2020, Stephan Nolting. All rights reserved. #
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-- # #
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-- # #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # permitted provided that the following conditions are met: #
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-- # permitted provided that the following conditions are met: #
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-- # #
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-- # #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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-- # conditions and the following disclaimer. #
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-- # conditions and the following disclaimer. #
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-- # #
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-- # #
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-- # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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-- # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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-- # conditions and the following disclaimer in the documentation and/or other materials #
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-- # conditions and the following disclaimer in the documentation and/or other materials #
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-- # provided with the distribution. #
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-- # provided with the distribution. #
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-- # #
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-- # #
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-- # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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-- # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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-- # endorse or promote products derived from this software without specific prior written #
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-- # endorse or promote products derived from this software without specific prior written #
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-- # permission. #
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-- # permission. #
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-- # #
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-- # #
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-- # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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-- # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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-- # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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-- # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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-- # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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-- # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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-- # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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-- # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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-- # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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-- # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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-- # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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-- # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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-- # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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-- # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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-- # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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-- # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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-- # OF THE POSSIBILITY OF SUCH DAMAGE. #
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-- # OF THE POSSIBILITY OF SUCH DAMAGE. #
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-- # ********************************************************************************************* #
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-- # ********************************************************************************************* #
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-- # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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-- # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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-- #################################################################################################
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-- #################################################################################################
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use ieee.numeric_std.all;
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library neorv32;
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library neorv32;
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use neorv32.neorv32_package.all;
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use neorv32.neorv32_package.all;
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use neorv32.neorv32_bootloader_image.all; -- this file is generated by the image generator
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use neorv32.neorv32_bootloader_image.all; -- this file is generated by the image generator
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entity neorv32_boot_rom is
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entity neorv32_boot_rom is
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port (
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port (
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clk_i : in std_ulogic; -- global clock line
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clk_i : in std_ulogic; -- global clock line
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rden_i : in std_ulogic; -- read enable
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rden_i : in std_ulogic; -- read enable
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addr_i : in std_ulogic_vector(31 downto 0); -- address
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addr_i : in std_ulogic_vector(31 downto 0); -- address
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data_o : out std_ulogic_vector(31 downto 0); -- data out
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data_o : out std_ulogic_vector(31 downto 0); -- data out
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ack_o : out std_ulogic -- transfer acknowledge
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ack_o : out std_ulogic -- transfer acknowledge
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);
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);
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end neorv32_boot_rom;
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end neorv32_boot_rom;
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architecture neorv32_boot_rom_rtl of neorv32_boot_rom is
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architecture neorv32_boot_rom_rtl of neorv32_boot_rom is
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-- local types --
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-- local types --
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type boot_img_t is array (0 to boot_size_c/4-1) of std_ulogic_vector(31 downto 0);
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type boot_img_t is array (0 to boot_size_c/4-1) of std_ulogic_vector(31 downto 0);
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-- init function --
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-- init function --
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-- impure function: returns NOT the same result every time it is evaluated with the same arguments since the source file might have changed
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impure function init_boot_rom(init : bootloader_init_image_t) return boot_img_t is
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impure function init_boot_rom(init : bootloader_init_image_t) return boot_img_t is
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variable mem_v : boot_img_t;
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variable mem_v : boot_img_t;
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begin
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begin
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for i in 0 to boot_size_c/4-1 loop
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mem_v := (others => (others => '0'));
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for i in 0 to init'length-1 loop -- init only in range of source data array
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mem_v(i) := init(i);
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mem_v(i) := init(i);
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end loop; -- i
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end loop; -- i
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return mem_v;
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return mem_v;
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end function init_boot_rom;
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end function init_boot_rom;
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-- local signals --
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-- local signals --
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signal acc_en : std_ulogic;
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signal acc_en : std_ulogic;
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signal rden : std_ulogic;
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signal rden : std_ulogic;
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signal rdata : std_ulogic_vector(31 downto 0);
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signal rdata : std_ulogic_vector(31 downto 0);
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signal addr : std_ulogic_vector(index_size_f(boot_size_c/4)-1 downto 0);
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signal addr : std_ulogic_vector(index_size_f(boot_size_c/4)-1 downto 0);
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-- bootloader image --
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-- bootloader image --
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constant boot_img : boot_img_t := init_boot_rom(bootloader_init_image);
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constant boot_img : boot_img_t := init_boot_rom(bootloader_init_image);
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begin
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begin
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-- Access Control -------------------------------------------------------------------------
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-- Access Control -------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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acc_en <= '1' when (addr_i >= boot_base_c) and (addr_i < std_ulogic_vector(unsigned(boot_base_c) + boot_size_c)) else '0';
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acc_en <= '1' when (addr_i >= boot_base_c) and (addr_i < std_ulogic_vector(unsigned(boot_base_c) + boot_size_c)) else '0';
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addr <= addr_i(index_size_f(boot_size_c/4)+1 downto 2); -- word aligned
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addr <= addr_i(index_size_f(boot_size_c/4)+1 downto 2); -- word aligned
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-- Memory Access --------------------------------------------------------------------------
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-- Memory Access --------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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mem_file_access: process(clk_i)
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mem_file_access: process(clk_i)
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begin
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begin
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if rising_edge(clk_i) then
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if rising_edge(clk_i) then
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rden <= rden_i and acc_en;
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rden <= rden_i and acc_en;
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if (acc_en = '1') then -- reduce switching activity when not accessed
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if (acc_en = '1') then -- reduce switching activity when not accessed
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rdata <= boot_img(to_integer(unsigned(addr)));
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rdata <= boot_img(to_integer(unsigned(addr)));
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end if;
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end if;
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end if;
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end if;
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end process mem_file_access;
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end process mem_file_access;
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-- output gate --
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-- output gate --
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data_o <= rdata when (rden = '1') else (others => '0');
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data_o <= rdata when (rden = '1') else (others => '0');
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ack_o <= rden;
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ack_o <= rden;
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end neorv32_boot_rom_rtl;
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end neorv32_boot_rom_rtl;
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