/* ################################################################################################# */
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/* ################################################################################################# */
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/* # << NEORV32 - crt0.S - Start-Up Code >> # */
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/* # << NEORV32 - crt0.S - Start-Up Code >> # */
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/* # ********************************************************************************************* # */
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/* # ********************************************************************************************* # */
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/* # BSD 3-Clause License # */
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/* # BSD 3-Clause License # */
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/* # # */
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/* # # */
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/* # Copyright (c) 2020, Stephan Nolting. All rights reserved. # */
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/* # Copyright (c) 2020, Stephan Nolting. All rights reserved. # */
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/* # # */
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/* # # */
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/* # Redistribution and use in source and binary forms, with or without modification, are # */
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/* # Redistribution and use in source and binary forms, with or without modification, are # */
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/* # permitted provided that the following conditions are met: # */
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/* # permitted provided that the following conditions are met: # */
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/* # # */
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/* # # */
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/* # 1. Redistributions of source code must retain the above copyright notice, this list of # */
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/* # 1. Redistributions of source code must retain the above copyright notice, this list of # */
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/* # conditions and the following disclaimer. # */
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/* # conditions and the following disclaimer. # */
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/* # # */
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/* # # */
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/* # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # */
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/* # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # */
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/* # conditions and the following disclaimer in the documentation and/or other materials # */
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/* # conditions and the following disclaimer in the documentation and/or other materials # */
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/* # provided with the distribution. # */
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/* # provided with the distribution. # */
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/* # # */
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/* # # */
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/* # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # */
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/* # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # */
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/* # endorse or promote products derived from this software without specific prior written # */
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/* # endorse or promote products derived from this software without specific prior written # */
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/* # permission. # */
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/* # permission. # */
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/* # # */
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/* # # */
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/* # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # */
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/* # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # */
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/* # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # */
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/* # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # */
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/* # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # */
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/* # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # */
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/* # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # */
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/* # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # */
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/* # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # */
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/* # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # */
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/* # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # */
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/* # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # */
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/* # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # */
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/* # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # */
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/* # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # */
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/* # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # */
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/* # OF THE POSSIBILITY OF SUCH DAMAGE. # */
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/* # OF THE POSSIBILITY OF SUCH DAMAGE. # */
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/* # ********************************************************************************************* # */
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/* # ********************************************************************************************* # */
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/* # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # */
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/* # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # */
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/* ################################################################################################# */
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/* ################################################################################################# */
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.file "crt0.S"
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.file "crt0.S"
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.section .text.boot
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.section .text.boot
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.balign 4
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.balign 4
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.global _start
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.global _start
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// IO region
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// IO region
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.equ IO_BEGIN, 0xFFFFFF80 // start of processor-internal IO region
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.equ IO_BEGIN, 0xFFFFFF00 // start of processor-internal IO region
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_start:
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_start:
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.cfi_startproc
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.cfi_startproc
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.cfi_undefined ra
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.cfi_undefined ra
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// *********************************************************
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// *********************************************************
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// Clear register file (lower half, assume E extension)
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// Clear register file (lower half, assume E extension)
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// *********************************************************
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// *********************************************************
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__crt0_reg_file_clear:
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__crt0_reg_file_clear:
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//addi x0, x0, 0 // hardwired to zero
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//addi x0, x0, 0 // hardwired to zero
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addi x1, x0, 0
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addi x1, x0, 0
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addi x2, x0, 0
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addi x2, x0, 0
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addi x3, x0, 0
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addi x3, x0, 0
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addi x4, x0, 0
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addi x4, x0, 0
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addi x5, x0, 0
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addi x5, x0, 0
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addi x6, x0, 0
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addi x6, x0, 0
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addi x7, x0, 0
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addi x7, x0, 0
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addi x8, x0, 0
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addi x8, x0, 0
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addi x9, x0, 0
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addi x9, x0, 0
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//addi x10, x0, 0
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//addi x10, x0, 0
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//addi x11, x0, 0
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//addi x11, x0, 0
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//addi x12, x0, 0
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//addi x12, x0, 0
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//addi x13, x0, 0
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//addi x13, x0, 0
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addi x14, x0, 0
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addi x14, x0, 0
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addi x15, x0, 0
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addi x15, x0, 0
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// *********************************************************
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// *********************************************************
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// Clear register file (upper half, if no E extension)
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// Clear register file (upper half, if no E extension)
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// *********************************************************
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// *********************************************************
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#ifndef __riscv_32e
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#ifndef __riscv_32e
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// save some program space if compiling bootloader
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// save some program space if compiling bootloader
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#ifndef make_bootloader
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#ifndef make_bootloader
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addi x16, x0, 0
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addi x16, x0, 0
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addi x17, x0, 0
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addi x17, x0, 0
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addi x18, x0, 0
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addi x18, x0, 0
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addi x19, x0, 0
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addi x19, x0, 0
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addi x20, x0, 0
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addi x20, x0, 0
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addi x21, x0, 0
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addi x21, x0, 0
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addi x22, x0, 0
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addi x22, x0, 0
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addi x23, x0, 0
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addi x23, x0, 0
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addi x24, x0, 0
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addi x24, x0, 0
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addi x25, x0, 0
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addi x25, x0, 0
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addi x26, x0, 0
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addi x26, x0, 0
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addi x27, x0, 0
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addi x27, x0, 0
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addi x28, x0, 0
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addi x28, x0, 0
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addi x29, x0, 0
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addi x29, x0, 0
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addi x30, x0, 0
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addi x30, x0, 0
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addi x31, x0, 0
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addi x31, x0, 0
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#endif
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#endif
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#endif
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#endif
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// *********************************************************
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// *********************************************************
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// No interrupts, thanks
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// No interrupts, thanks
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// *********************************************************
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// *********************************************************
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__crt0_status_init:
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__crt0_status_init:
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li x10, 0x00001800 // clear mstatus and set mpp(1:0)
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li x10, 0x00001800 // clear mstatus and set mpp(1:0)
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csrrw zero, mstatus, x10
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csrrw zero, mstatus, x10
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csrrw zero, mie, zero // clear mie
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csrrw zero, mie, zero // clear mie
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// *********************************************************
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// *********************************************************
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// Setup pointers using linker script symbols
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// Setup pointers using linker script symbols
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// *********************************************************
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// *********************************************************
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__crt0_pointer_init:
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__crt0_pointer_init:
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.option push
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.option push
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.option norelax
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.option norelax
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la sp, __crt0_stack_begin
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la sp, __crt0_stack_begin
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andi sp, sp, 0xfffffffc // make sure this is aligned
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andi sp, sp, 0xfffffffc // make sure this is aligned
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addi fp, sp, 0 // frame pointer = stack pointer
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addi fp, sp, 0 // frame pointer = stack pointer
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la gp, __global_pointer$ // global pointer
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la gp, __global_pointer$ // global pointer
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.option pop
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.option pop
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// *********************************************************
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// *********************************************************
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// Initialize dummy trap handler base address
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// Initialize dummy trap handler base address
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// *********************************************************
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// *********************************************************
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__crt0_neorv32_trap_init:
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__crt0_neorv32_trap_init:
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la x11, __crt0_dummy_trap_handler
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la x11, __crt0_dummy_trap_handler
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csrw mtvec, x11 // set address of first-level exception handler
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csrw mtvec, x11 // set address of first-level exception handler
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// *********************************************************
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// *********************************************************
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// Reset/deactivate IO/peripheral devices
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// Reset/deactivate IO/peripheral devices
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// Devices, that are not implemented, will cause a store access fault
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// Devices, that are not implemented, will cause a store access fault
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// which is captured but actually ignored due to the dummy handler.
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// which is captured but actually ignored due to the dummy handler.
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// *********************************************************
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// *********************************************************
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__crt0_reset_io:
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__crt0_reset_io:
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li x11, IO_BEGIN // start of processor-internal IO region
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li x11, IO_BEGIN // start of processor-internal IO region
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__crt0_reset_io_loop:
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__crt0_reset_io_loop:
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sw zero, 0(x11)
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sw zero, 0(x11)
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addi x11, x11, 4
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addi x11, x11, 4
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bne zero, x11, __crt0_reset_io_loop
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bne zero, x11, __crt0_reset_io_loop
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// *********************************************************
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// *********************************************************
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// Clear .bss section (byte-wise) using linker script symbols
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// Clear .bss section (byte-wise) using linker script symbols
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// *********************************************************
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// *********************************************************
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__crt0_clear_bss:
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__crt0_clear_bss:
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la x11, __crt0_bss_start
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la x11, __crt0_bss_start
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la x12, __crt0_bss_end
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la x12, __crt0_bss_end
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__crt0_clear_bss_loop:
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__crt0_clear_bss_loop:
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bge x11, x12, __crt0_clear_bss_loop_end
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bge x11, x12, __crt0_clear_bss_loop_end
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sb zero, 0(x11)
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sb zero, 0(x11)
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addi x11, x11, 1
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addi x11, x11, 1
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j __crt0_clear_bss_loop
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j __crt0_clear_bss_loop
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__crt0_clear_bss_loop_end:
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__crt0_clear_bss_loop_end:
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// *********************************************************
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// *********************************************************
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// Copy initialized .data section from ROM to RAM (byte-wise) using linker script symbols
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// Copy initialized .data section from ROM to RAM (byte-wise) using linker script symbols
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// *********************************************************
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// *********************************************************
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__crt0_copy_data:
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__crt0_copy_data:
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la x11, __crt0_copy_data_src_begin // start of data area (copy source)
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la x11, __crt0_copy_data_src_begin // start of data area (copy source)
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la x12, __crt0_copy_data_dst_begin // start of data area (copy destination)
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la x12, __crt0_copy_data_dst_begin // start of data area (copy destination)
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la x13, __crt0_copy_data_dst_end // last address of destination data area
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la x13, __crt0_copy_data_dst_end // last address of destination data area
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__crt0_copy_data_loop:
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__crt0_copy_data_loop:
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bge x12, x13, __crt0_copy_data_loop_end
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bge x12, x13, __crt0_copy_data_loop_end
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lb x14, 0(x11)
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lb x14, 0(x11)
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sb x14, 0(x12)
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sb x14, 0(x12)
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addi x11, x11, 1
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addi x11, x11, 1
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addi x12, x12, 1
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addi x12, x12, 1
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j __crt0_copy_data_loop
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j __crt0_copy_data_loop
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__crt0_copy_data_loop_end:
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__crt0_copy_data_loop_end:
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// *********************************************************
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// *********************************************************
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// Call main function
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// Call main function
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// *********************************************************
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// *********************************************************
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__crt0_main_entry:
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__crt0_main_entry:
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// setup arguments for calling main
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// setup arguments for calling main
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addi x10, zero, 0 // argc = 0
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addi x10, zero, 0 // argc = 0
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addi x11, zero, 0 // argv = 0
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addi x11, zero, 0 // argv = 0
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// clear cycle and instruction counters
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// clear cycle and instruction counters
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csrw mcycle, zero
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csrw mcycle, zero
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csrw mcycleh, zero
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csrw mcycleh, zero
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csrw minstret, zero
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csrw minstret, zero
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csrw minstreth, zero
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csrw minstreth, zero
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// enable read-access from user-mode for cycle[h], time[h] and instret[h]
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// enable read-access from user-mode for cycle[h], time[h] and instret[h]
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csrwi 0x306, 7 // mcounteren
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csrwi 0x306, 7 // mcounteren
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// enable auto-increment of all counters
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// enable auto-increment of all counters
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csrw 0x320, x0 // mcountinhibit
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csrw 0x320, x0 // mcountinhibit
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// restore mcause reset value (so that 'main' knows we are coming from reset)
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// restore mcause reset value (so that 'main' knows we are coming from reset)
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li x12, 0x80000000
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li x12, 0x80000000
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csrw mcause, x12
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csrw mcause, x12
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// call actual app's main function
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// call actual app's main function
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jal ra, main
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jal ra, main
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// *********************************************************
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// *********************************************************
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// Go to endless sleep mode if main returns
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// Go to endless sleep mode if main returns
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// *********************************************************
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// *********************************************************
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__crt0_this_is_the_end:
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__crt0_this_is_the_end:
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csrrci zero, mstatus, 8 // mstatus: disable global IRQs (MIE)
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csrrci zero, mstatus, 8 // mstatus: disable global IRQs (MIE)
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nop
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nop
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wfi
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wfi
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__crt0_this_is_the_end_my_friend:
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__crt0_this_is_the_end_my_friend:
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j __crt0_this_is_the_end_my_friend // in case WFI is not available
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j __crt0_this_is_the_end_my_friend // in case WFI is not available
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// *********************************************************
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// *********************************************************
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// dummy trap handler (for exceptions & IRQs)
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// dummy trap handler (for exceptions & IRQs)
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// tries to move on to next instruction
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// tries to move on to next instruction
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// *********************************************************
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// *********************************************************
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.global __crt0_dummy_trap_handler
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.global __crt0_dummy_trap_handler
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.balign 4
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.balign 4
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__crt0_dummy_trap_handler:
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__crt0_dummy_trap_handler:
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addi sp, sp, -8
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addi sp, sp, -8
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sw x8, 0(sp)
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sw x8, 0(sp)
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sw x9, 4(sp)
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sw x9, 4(sp)
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csrr x8, mcause
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csrr x8, mcause
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blt x8, zero, __crt0_dummy_trap_handler_irq // skip mepc modification if interrupt
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blt x8, zero, __crt0_dummy_trap_handler_irq // skip mepc modification if interrupt
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csrr x8, mepc
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csrr x8, mepc
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// is compressed instruction?
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// is compressed instruction?
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__crt0_dummy_trap_handler_exc_c_check:
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__crt0_dummy_trap_handler_exc_c_check:
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lh x9, 0(x8) // get compressed instruction or lower 16 bits of uncompressed instruction that caused exception
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lh x9, 0(x8) // get compressed instruction or lower 16 bits of uncompressed instruction that caused exception
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andi x9, x9, 3 // mask: isolate lowest 2 opcode bits (= 11 for uncompressed instructions)
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andi x9, x9, 3 // mask: isolate lowest 2 opcode bits (= 11 for uncompressed instructions)
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addi x8, x8, +2 // only this for compressed instructions
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addi x8, x8, +2 // only this for compressed instructions
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csrw mepc, x8 // set return address when compressed instruction
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csrw mepc, x8 // set return address when compressed instruction
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addi x8, zero, 3
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addi x8, zero, 3
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bne x8, x9, __crt0_dummy_trap_handler_irq // jump if compressed instruction
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bne x8, x9, __crt0_dummy_trap_handler_irq // jump if compressed instruction
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// is uncompressed instruction
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// is uncompressed instruction
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__crt0_dummy_trap_handler_exc_uncrompressed:
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__crt0_dummy_trap_handler_exc_uncrompressed:
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csrr x8, mepc
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csrr x8, mepc
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addi x8, x8, +2 // add another 2 (making +4) for uncompressed instructions
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addi x8, x8, +2 // add another 2 (making +4) for uncompressed instructions
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csrw mepc, x8
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csrw mepc, x8
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__crt0_dummy_trap_handler_irq:
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__crt0_dummy_trap_handler_irq:
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lw x9, 0(sp)
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lw x9, 0(sp)
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lw x8, 4(sp)
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lw x8, 4(sp)
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addi sp, sp, +8
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addi sp, sp, +8
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mret
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mret
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.cfi_endproc
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.cfi_endproc
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.end
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.end
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