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// # << NEORV32: neorv32_cfu.h - CPU Core - CFU Co-Processor Hardware Driver >> #
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// # << NEORV32: neorv32_cfu.h - CPU Core - CFU Co-Processor Hardware Driver >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # BSD 3-Clause License #
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// # #
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// # #
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// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
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// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
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// # #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # permitted provided that the following conditions are met: #
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// # #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # endorse or promote products derived from this software without specific prior written #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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// #################################################################################################
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/**********************************************************************//**
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/**********************************************************************//**
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* @file neorv32_cpu_cfu.h
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* @file neorv32_cpu_cfu.h
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* @author Stephan Nolting
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* @brief CPU Core custom functions unit HW driver header file.
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* @brief CPU Core custom functions unit HW driver header file.
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**************************************************************************/
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**************************************************************************/
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#ifndef neorv32_cpu_cfu_h
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#ifndef neorv32_cpu_cfu_h
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#define neorv32_cpu_cfu_h
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#define neorv32_cpu_cfu_h
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// prototypes
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// prototypes
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int neorv32_cpu_cfu_available(void);
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int neorv32_cpu_cfu_available(void);
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/**********************************************************************//**
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/**********************************************************************//**
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* @name CFU custom instructions (intrinsic)
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* @name CFU custom instructions ("intrinsics")
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**************************************************************************/
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**************************************************************************/
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/**@{*/
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/**@{*/
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/** CFU custom instruction 0 (funct3 = 000) */
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/** CFU custom instruction 0 (funct3 = 000) */
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#define neorv32_cfu_cmd0(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 0, RISCV_OPCODE_CUSTOM0)
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#define neorv32_cfu_cmd0(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 0, RISCV_OPCODE_CUSTOM0)
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/** CFU custom instruction 1 (funct3 = 001) */
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/** CFU custom instruction 1 (funct3 = 001) */
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#define neorv32_cfu_cmd1(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 1, RISCV_OPCODE_CUSTOM0)
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#define neorv32_cfu_cmd1(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 1, RISCV_OPCODE_CUSTOM0)
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/** CFU custom instruction 2 (funct3 = 010) */
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/** CFU custom instruction 2 (funct3 = 010) */
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#define neorv32_cfu_cmd2(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 2, RISCV_OPCODE_CUSTOM0)
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#define neorv32_cfu_cmd2(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 2, RISCV_OPCODE_CUSTOM0)
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/** CFU custom instruction 3 (funct3 = 011) */
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/** CFU custom instruction 3 (funct3 = 011) */
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#define neorv32_cfu_cmd3(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 3, RISCV_OPCODE_CUSTOM0)
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#define neorv32_cfu_cmd3(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 3, RISCV_OPCODE_CUSTOM0)
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/** CFU custom instruction 4 (funct3 = 100) */
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/** CFU custom instruction 4 (funct3 = 100) */
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#define neorv32_cfu_cmd4(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 4, RISCV_OPCODE_CUSTOM0)
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#define neorv32_cfu_cmd4(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 4, RISCV_OPCODE_CUSTOM0)
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/** CFU custom instruction 5 (funct3 = 101) */
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/** CFU custom instruction 5 (funct3 = 101) */
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#define neorv32_cfu_cmd5(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 5, RISCV_OPCODE_CUSTOM0)
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#define neorv32_cfu_cmd5(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 5, RISCV_OPCODE_CUSTOM0)
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/** CFU custom instruction 6 (funct3 = 110) */
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/** CFU custom instruction 6 (funct3 = 110) */
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#define neorv32_cfu_cmd6(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 6, RISCV_OPCODE_CUSTOM0)
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#define neorv32_cfu_cmd6(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 6, RISCV_OPCODE_CUSTOM0)
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/** CFU custom instruction 7 (funct3 = 111) */
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/** CFU custom instruction 7 (funct3 = 111) */
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#define neorv32_cfu_cmd7(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 7, RISCV_OPCODE_CUSTOM0)
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#define neorv32_cfu_cmd7(funct7, rs1, rs2) CUSTOM_INSTR_R2_TYPE(funct7, rs2, rs1, 7, RISCV_OPCODE_CUSTOM0)
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/**@}*/
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/**@}*/
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#endif // neorv32_cpu_cfu_h
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#endif // neorv32_cpu_cfu_h
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