// #################################################################################################
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// #################################################################################################
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// # << NEORV32: neorv32_pwm.c - Pulse Width Modulation Controller (PWM) HW Driver >> #
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// # << NEORV32: neorv32_pwm.c - Pulse Width Modulation Controller (PWM) HW Driver >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # BSD 3-Clause License #
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// # #
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// # #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # permitted provided that the following conditions are met: #
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// # #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # conditions and the following disclaimer. #
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// # #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # provided with the distribution. #
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// # #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # permission. #
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// # #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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// #################################################################################################
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/**********************************************************************//**
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/**********************************************************************//**
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* @file neorv32_pwm.c
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* @file neorv32_pwm.c
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* @author Stephan Nolting
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* @author Stephan Nolting
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* @brief Pulse-Width Modulation Controller (PWM) HW driver source file.
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* @brief Pulse-Width Modulation Controller (PWM) HW driver source file.
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*
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*
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* @note These functions should only be used if the PWM unit was synthesized (IO_PWM_EN = true).
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* @note These functions should only be used if the PWM unit was synthesized (IO_PWM_EN = true).
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**************************************************************************/
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**************************************************************************/
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#include "neorv32.h"
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#include "neorv32.h"
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#include "neorv32_pwm.h"
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#include "neorv32_pwm.h"
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/**********************************************************************//**
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/**********************************************************************//**
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* Check if PWM unit was synthesized.
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* Check if PWM unit was synthesized.
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*
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*
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* @return 0 if PWM was not synthesized, 1 if PWM is available.
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* @return 0 if PWM was not synthesized, 1 if PWM is available.
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**************************************************************************/
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**************************************************************************/
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int neorv32_pwm_available(void) {
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int neorv32_pwm_available(void) {
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_PWM)) {
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if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_PWM)) {
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return 1;
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return 1;
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}
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}
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else {
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else {
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return 0;
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return 0;
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}
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}
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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* Enable and configure pulse width modulation controller. The PWM control register bits are listed in #NEORV32_PWM_CT_enum.
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* Enable and configure pulse width modulation controller. The PWM control register bits are listed in #NEORV32_PWM_CT_enum.
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*
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*
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* @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
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* @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
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**************************************************************************/
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**************************************************************************/
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void neorv32_pwm_setup(uint8_t prsc) {
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void neorv32_pwm_setup(uint8_t prsc) {
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PWM_CT = 0; // reset
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PWM_CT = 0; // reset
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uint32_t ct_enable = 1;
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uint32_t ct_enable = 1;
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ct_enable = ct_enable << PWM_CT_EN;
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ct_enable = ct_enable << PWM_CT_EN;
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uint32_t ct_prsc = (uint32_t)(prsc & 0x07);
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uint32_t ct_prsc = (uint32_t)(prsc & 0x07);
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ct_prsc = ct_prsc << PWM_CT_PRSC0;
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ct_prsc = ct_prsc << PWM_CT_PRSC0;
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PWM_CT = ct_enable | ct_prsc;
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PWM_CT = ct_enable | ct_prsc;
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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* Disable pulse width modulation controller.
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* Disable pulse width modulation controller.
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**************************************************************************/
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**************************************************************************/
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void neorv32_pwm_disable(void) {
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void neorv32_pwm_disable(void) {
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PWM_CT &= ~((uint32_t)(1 << PWM_CT_EN));
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PWM_CT &= ~((uint32_t)(1 << PWM_CT_EN));
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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* Set duty cycle for channel. The PWM duty cycle bits are listed in #NEORV32_PWM_DUTY_enum.
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* Get number of implemented channels.
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* @warning This function will override all duty cycle configuration registers.
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*
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*
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* @param[in] channel Channel select (0..3).
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* @return Number of implemented channels.
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**************************************************************************/
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int neorv32_pmw_get_num_channels(void) {
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neorv32_pwm_disable();
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uint8_t index = 0;
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uint8_t cnt = 0;
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for (index=0; index<60; index++) {
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neorv32_pwm_set(index, 1);
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cnt += neorv32_pwm_get(index);
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}
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return (int)cnt;
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}
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/**********************************************************************//**
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* Set duty cycle for channel.
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*
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* @param[in] channel Channel select (0..59).
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* @param[in] duty Duty cycle (0..255).
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* @param[in] duty Duty cycle (0..255).
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**************************************************************************/
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**************************************************************************/
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void neorv32_pwm_set(uint8_t channel, uint8_t duty) {
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void neorv32_pwm_set(uint8_t channel, uint8_t duty) {
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channel = channel & 0x03;
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if (channel > 59) {
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return; // out-of-range
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}
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// compute duty-cycle offset
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uint32_t reg_offset = (uint32_t)(channel / 4);
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uint8_t byte_offset = channel % 4;
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// read-modify-write
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uint32_t duty_mask = 0xff;
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uint32_t duty_mask = 0xff;
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uint32_t duty_new = (uint32_t)duty;
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uint32_t duty_new = (uint32_t)duty;
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duty_mask = duty_mask << (channel * 8);
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duty_mask = duty_mask << (byte_offset * 8);
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duty_new = duty_new << (channel * 8);
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duty_new = duty_new << (byte_offset * 8);
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uint32_t duty_cycle = PWM_DUTY;
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uint32_t duty_cycle = (*(IO_REG32 (&PWM_DUTY0 + reg_offset)));
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duty_cycle &= ~duty_mask; // clear previous duty cycle
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duty_cycle &= ~duty_mask; // clear previous duty cycle
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duty_cycle |= duty_new; // set new duty cycle
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duty_cycle |= duty_new; // set new duty cycle
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PWM_DUTY = duty_cycle;
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(*(IO_REG32 (&PWM_DUTY0 + reg_offset))) = duty_cycle;
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}
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/**********************************************************************//**
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* Get duty cycle from channel.
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*
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* @param[in] channel Channel select (0..59).
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* @return Duty cycle (0..255) of channel 'channel'.
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**************************************************************************/
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uint8_t neorv32_pwm_get(uint8_t channel) {
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if (channel > 59) {
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return 0; // out-of-range
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}
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// compute duty-cycle offset
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uint32_t reg_offset = (uint32_t)(channel / 4);
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uint8_t byte_offset = channel % 4;
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// read
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uint32_t tmp = (*(IO_REG32 (&PWM_DUTY0 + reg_offset)));
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tmp = tmp >> ((byte_offset * 8));
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return (uint8_t)tmp;
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}
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}
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