//--------------------------------------------------------------------------------------------------
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//--------------------------------------------------------------------------------------------------
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// Design : nova
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// Design : nova
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// Author(s) : Ke Xu
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// Author(s) : Ke Xu
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// Email : eexuke@yahoo.com
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// Email : eexuke@yahoo.com
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// File : IQIT.v
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// File : IQIT.v
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// Generated : June 18, 2005
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// Generated : June 18, 2005
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// Copyright (C) 2008 Ke Xu
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// Copyright (C) 2008 Ke Xu
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// Description
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// Description
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// Decoding the residual information
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// Decoding the residual information
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// 1.The res_mb_bypass | DConly | allzero signals should be decoded first
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// 1.The res_mb_bypass | DConly | allzero signals should be decoded first
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// 2.For DC coefficients,IDCT --> rescale
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// 2.For DC coefficients,IDCT --> rescale
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// 3.For AC coefficients,rescale --> IDCT --> rounding
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// 3.For AC coefficients,rescale --> IDCT --> rounding
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// 4.coeffLevel:zig-zag order
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// 4.coeffLevel:zig-zag order
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// OneD_output,TwoD_output,DC_output,rescale_output,rounding_output:raster-scan order
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// OneD_output,TwoD_output,DC_output,rescale_output,rounding_output:raster-scan order
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// 5.Input coeffLevel_ext_0 ~ 15 are 2's complement,but with zig-zag order
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// 5.Input coeffLevel_ext_0 ~ 15 are 2's complement,but with zig-zag order
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// Revise log
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// Revise log
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// 1.March 27,2006
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// 1.March 27,2006
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// DC_output: 0 ~ 15:for luma DC, 0 ~ 3:for Chroma Cb DC, 4 ~ 7:for Chroma Cr DC
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// DC_output: 0 ~ 15:for luma DC, 0 ~ 3:for Chroma Cb DC, 4 ~ 7:for Chroma Cr DC
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// 2.March 28,2006
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// 2.March 28,2006
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// 1)For Intra16x16ACLevel and chroma AC,the first coeff of IDCT is DC value, the following coeffLevel_ext_0 ~ 14 should be moved backward 1 space and coeffLevel_ext_15 is abandoned
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// 1)For Intra16x16ACLevel and chroma AC,the first coeff of IDCT is DC value, the following coeffLevel_ext_0 ~ 14 should be moved backward 1 space and coeffLevel_ext_15 is abandoned
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// 2)There are some blocks which have zero DC coeff but non-zero AC coeff. Additional signals as res_LumaDCBlk_IsZero,res_ChromaDCBlk_Cb_IsZero,res_ChromaDCBlk_Cr_IsZero are added to deal with such special case
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// 2)There are some blocks which have zero DC coeff but non-zero AC coeff. Additional signals as res_LumaDCBlk_IsZero,res_ChromaDCBlk_Cb_IsZero,res_ChromaDCBlk_Cr_IsZero are added to deal with such special case
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// synopsys translate_off
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// synopsys translate_off
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`include "timescale.v"
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`include "timescale.v"
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// synopsys translate_on
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// synopsys translate_on
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`include "nova_defines.v"
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`include "nova_defines.v"
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module IQIT (clk,reset_n,TotalCoeff,blk4x4_rec_counter,
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module IQIT (clk,reset_n,TotalCoeff,blk4x4_rec_counter,
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gclk_1D,gclk_2D,gclk_rescale,gclk_rounding,
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gclk_1D,gclk_2D,gclk_rescale,gclk_rounding,
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residual_state,cavlc_decoder_state,
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residual_state,cavlc_decoder_state,
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end_of_one_residual_block,end_of_NonZeroCoeff_CAVLC,
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end_of_one_residual_block,end_of_NonZeroCoeff_CAVLC,
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QPy,QPc,i4x4_CbCr,
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QPy,QPc,i4x4_CbCr,
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coeffLevel_ext_0, coeffLevel_ext_1, coeffLevel_ext_2, coeffLevel_ext_3,
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coeffLevel_ext_0, coeffLevel_ext_1, coeffLevel_ext_2, coeffLevel_ext_3,
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coeffLevel_ext_4, coeffLevel_ext_5, coeffLevel_ext_6, coeffLevel_ext_7,
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coeffLevel_ext_4, coeffLevel_ext_5, coeffLevel_ext_6, coeffLevel_ext_7,
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coeffLevel_ext_8, coeffLevel_ext_9, coeffLevel_ext_10,coeffLevel_ext_11,
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coeffLevel_ext_8, coeffLevel_ext_9, coeffLevel_ext_10,coeffLevel_ext_11,
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coeffLevel_ext_12,coeffLevel_ext_13,coeffLevel_ext_14,coeffLevel_ext_15,
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coeffLevel_ext_12,coeffLevel_ext_13,coeffLevel_ext_14,coeffLevel_ext_15,
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OneD_counter,TwoD_counter,rescale_counter,rounding_counter,
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OneD_counter,TwoD_counter,rescale_counter,rounding_counter,
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curr_DC_IsZero,curr_DC_scaled,
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curr_DC_IsZero,curr_DC_scaled,
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rounding_output_0,rounding_output_1,rounding_output_2,rounding_output_3,
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rounding_output_0,rounding_output_1,rounding_output_2,rounding_output_3,
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rounding_output_4,rounding_output_5,rounding_output_6,rounding_output_7,
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rounding_output_4,rounding_output_5,rounding_output_6,rounding_output_7,
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rounding_output_8,rounding_output_9,rounding_output_10,rounding_output_11,
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rounding_output_8,rounding_output_9,rounding_output_10,rounding_output_11,
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rounding_output_12,rounding_output_13,rounding_output_14,rounding_output_15,
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rounding_output_12,rounding_output_13,rounding_output_14,rounding_output_15,
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end_of_ACBlk4x4_IQIT,end_of_DCBlk_IQIT
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end_of_ACBlk4x4_IQIT,end_of_DCBlk_IQIT
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);
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);
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input clk,reset_n;
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input clk,reset_n;
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input [4:0] TotalCoeff;
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input [4:0] TotalCoeff;
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input [4:0] blk4x4_rec_counter;
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input [4:0] blk4x4_rec_counter;
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input gclk_1D;
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input gclk_1D;
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input gclk_2D;
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input gclk_2D;
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input gclk_rescale;
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input gclk_rescale;
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input gclk_rounding;
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input gclk_rounding;
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input [3:0] residual_state;
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input [3:0] residual_state;
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input [3:0] cavlc_decoder_state;
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input [3:0] cavlc_decoder_state;
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input end_of_one_residual_block;
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input end_of_one_residual_block;
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input end_of_NonZeroCoeff_CAVLC;
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input end_of_NonZeroCoeff_CAVLC;
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input [5:0] QPy;
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input [5:0] QPy;
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input [5:0] QPc;
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input [5:0] QPc;
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input [1:0] i4x4_CbCr;
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input [1:0] i4x4_CbCr;
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input [15:0] coeffLevel_ext_0, coeffLevel_ext_1, coeffLevel_ext_2, coeffLevel_ext_3;
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input [15:0] coeffLevel_ext_0, coeffLevel_ext_1, coeffLevel_ext_2, coeffLevel_ext_3;
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input [15:0] coeffLevel_ext_4, coeffLevel_ext_5, coeffLevel_ext_6, coeffLevel_ext_7;
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input [15:0] coeffLevel_ext_4, coeffLevel_ext_5, coeffLevel_ext_6, coeffLevel_ext_7;
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input [15:0] coeffLevel_ext_8, coeffLevel_ext_9, coeffLevel_ext_10,coeffLevel_ext_11;
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input [15:0] coeffLevel_ext_8, coeffLevel_ext_9, coeffLevel_ext_10,coeffLevel_ext_11;
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input [15:0] coeffLevel_ext_12,coeffLevel_ext_13,coeffLevel_ext_14,coeffLevel_ext_15;
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input [15:0] coeffLevel_ext_12,coeffLevel_ext_13,coeffLevel_ext_14,coeffLevel_ext_15;
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output [2:0] OneD_counter;
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output [2:0] OneD_counter;
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output [2:0] TwoD_counter;
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output [2:0] TwoD_counter;
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output [2:0] rescale_counter;
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output [2:0] rescale_counter;
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output [2:0] rounding_counter;
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output [2:0] rounding_counter;
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output curr_DC_IsZero;
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output curr_DC_IsZero;
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output [8:0] curr_DC_scaled;
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output [8:0] curr_DC_scaled;
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output [8:0] rounding_output_0, rounding_output_1, rounding_output_2, rounding_output_3;
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output [8:0] rounding_output_0, rounding_output_1, rounding_output_2, rounding_output_3;
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output [8:0] rounding_output_4, rounding_output_5, rounding_output_6, rounding_output_7;
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output [8:0] rounding_output_4, rounding_output_5, rounding_output_6, rounding_output_7;
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output [8:0] rounding_output_8, rounding_output_9, rounding_output_10,rounding_output_11;
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output [8:0] rounding_output_8, rounding_output_9, rounding_output_10,rounding_output_11;
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output [8:0] rounding_output_12,rounding_output_13,rounding_output_14,rounding_output_15;
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output [8:0] rounding_output_12,rounding_output_13,rounding_output_14,rounding_output_15;
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output end_of_ACBlk4x4_IQIT; //end of IQIT of one blk4x4 AC
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output end_of_ACBlk4x4_IQIT; //end of IQIT of one blk4x4 AC
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output end_of_DCBlk_IQIT; //end of IQIT of one blk4x4/blk2x2 DC
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output end_of_DCBlk_IQIT; //end of IQIT of one blk4x4/blk2x2 DC
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reg [8:0] rounding_output_0, rounding_output_1, rounding_output_2, rounding_output_3;
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reg [8:0] rounding_output_0, rounding_output_1, rounding_output_2, rounding_output_3;
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reg [8:0] rounding_output_4, rounding_output_5, rounding_output_6, rounding_output_7;
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reg [8:0] rounding_output_4, rounding_output_5, rounding_output_6, rounding_output_7;
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reg [8:0] rounding_output_8, rounding_output_9, rounding_output_10,rounding_output_11;
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reg [8:0] rounding_output_8, rounding_output_9, rounding_output_10,rounding_output_11;
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reg [8:0] rounding_output_12,rounding_output_13,rounding_output_14,rounding_output_15;
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reg [8:0] rounding_output_12,rounding_output_13,rounding_output_14,rounding_output_15;
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reg [2:0] OneD_counter;
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reg [2:0] OneD_counter;
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reg [2:0] TwoD_counter;
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reg [2:0] TwoD_counter;
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reg [2:0] rescale_counter;
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reg [2:0] rescale_counter;
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reg [2:0] rounding_counter;
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reg [2:0] rounding_counter;
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reg [4:0] LevelScale_DC;
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reg [4:0] LevelScale_DC;
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reg [4:0] LevelScale_AC [3:0];
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reg [4:0] LevelScale_AC [3:0];
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reg [15:0] butterfly_D0,butterfly_D1,butterfly_D2,butterfly_D3;
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reg [15:0] butterfly_D0,butterfly_D1,butterfly_D2,butterfly_D3;
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reg [15:0] mult0_a,mult1_a,mult2_a,mult3_a;
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reg [15:0] mult0_a,mult1_a,mult2_a,mult3_a;
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reg IsLeftShift;
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reg IsLeftShift;
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reg [3:0] shift_len;
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reg [3:0] shift_len;
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reg [15:0] OneD_output [15:0];
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reg [15:0] OneD_output [15:0];
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reg [15:0] TwoD_output [3:0];
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reg [15:0] TwoD_output [3:0];
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reg [15:0] rescale_output [3:0];
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reg [15:0] rescale_output [3:0];
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reg [15:0] DC_output [15:0];
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reg [15:0] DC_output [15:0];
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wire IsHadamard;
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wire IsHadamard;
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wire [5:0] QP;
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wire [5:0] QP;
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wire [2:0] QPmod6;
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wire [2:0] QPmod6;
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wire [3:0] QPdiv6;
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wire [3:0] QPdiv6;
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wire [15:0] butterfly_F0,butterfly_F1,butterfly_F2,butterfly_F3;
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wire [15:0] butterfly_F0,butterfly_F1,butterfly_F2,butterfly_F3;
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wire [4:0] LevelScale [3:0];
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wire [4:0] LevelScale [3:0];
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wire [15:0] product0,product1,product2,product3;
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wire [15:0] product0,product1,product2,product3;
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wire [15:0] shift_output0,shift_output1,shift_output2,shift_output3;
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wire [15:0] shift_output0,shift_output1,shift_output2,shift_output3;
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wire [15:0] before_rounding0,before_rounding1,before_rounding2,before_rounding3;
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wire [15:0] before_rounding0,before_rounding1,before_rounding2,before_rounding3;
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wire [9:0] rounding_sum0,rounding_sum1,rounding_sum2,rounding_sum3;
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wire [9:0] rounding_sum0,rounding_sum1,rounding_sum2,rounding_sum3;
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//-----------------------------------------------------------------------------------
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//-----------------------------------------------------------------------------------
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// Zero-block-aware decoding
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// Zero-block-aware decoding
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//-----------------------------------------------------------------------------------
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//-----------------------------------------------------------------------------------
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//Whether DC block is zero
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//Whether DC block is zero
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reg res_LumaDCBlk_IsZero;
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reg res_LumaDCBlk_IsZero;
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reg res_ChromaDCBlk_Cb_IsZero;
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reg res_ChromaDCBlk_Cb_IsZero;
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reg res_ChromaDCBlk_Cr_IsZero;
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reg res_ChromaDCBlk_Cr_IsZero;
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always @ (posedge clk)
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always @ (posedge clk)
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if (reset_n == 1'b0)
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if (reset_n == 1'b0)
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begin
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begin
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res_LumaDCBlk_IsZero <= 1'b0;
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res_LumaDCBlk_IsZero <= 1'b0;
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res_ChromaDCBlk_Cb_IsZero <= 1'b0;
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res_ChromaDCBlk_Cb_IsZero <= 1'b0;
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res_ChromaDCBlk_Cr_IsZero <= 1'b0;
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res_ChromaDCBlk_Cr_IsZero <= 1'b0;
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end
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end
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else if (cavlc_decoder_state == `NumCoeffTrailingOnes_LUT)
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else if (cavlc_decoder_state == `NumCoeffTrailingOnes_LUT)
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begin
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begin
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if (residual_state == `Intra16x16DCLevel_s)
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if (residual_state == `Intra16x16DCLevel_s)
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res_LumaDCBlk_IsZero <= (TotalCoeff == 0)? 1'b1:1'b0;
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res_LumaDCBlk_IsZero <= (TotalCoeff == 0)? 1'b1:1'b0;
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if (residual_state == `ChromaDCLevel_Cb_s)
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if (residual_state == `ChromaDCLevel_Cb_s)
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res_ChromaDCBlk_Cb_IsZero <= (TotalCoeff == 0)? 1'b1:1'b0;
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res_ChromaDCBlk_Cb_IsZero <= (TotalCoeff == 0)? 1'b1:1'b0;
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if (residual_state == `ChromaDCLevel_Cr_s)
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if (residual_state == `ChromaDCLevel_Cr_s)
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res_ChromaDCBlk_Cr_IsZero <= (TotalCoeff == 0)? 1'b1:1'b0;
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res_ChromaDCBlk_Cr_IsZero <= (TotalCoeff == 0)? 1'b1:1'b0;
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end
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end
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//Whether current DC from DC_output[15:0] is zero
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//Whether current DC from DC_output[15:0] is zero
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//If whole DC block are all zeros or current single DC is zero,curr_DC is assigned 0
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//If whole DC block are all zeros or current single DC is zero,curr_DC is assigned 0
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//If current blk4x4 doesn't need DC (e.g. LumaLevel_s), curr_DC is also assigned 0
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//If current blk4x4 doesn't need DC (e.g. LumaLevel_s), curr_DC is also assigned 0
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reg [15:0] curr_DC;
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reg [15:0] curr_DC;
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reg [15:0] curr_DC_reg;
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reg [15:0] curr_DC_reg;
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always @ (posedge clk)
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always @ (posedge clk)
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if (reset_n == 1'b0)
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if (reset_n == 1'b0)
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curr_DC_reg <= 0;
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curr_DC_reg <= 0;
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else
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else
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curr_DC_reg <= curr_DC;
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curr_DC_reg <= curr_DC;
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always @ (residual_state or TotalCoeff or blk4x4_rec_counter or end_of_one_residual_block
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always @ (residual_state or TotalCoeff or blk4x4_rec_counter or end_of_one_residual_block
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or res_LumaDCBlk_IsZero or res_ChromaDCBlk_Cb_IsZero or res_ChromaDCBlk_Cr_IsZero or curr_DC_reg
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or res_LumaDCBlk_IsZero or res_ChromaDCBlk_Cb_IsZero or res_ChromaDCBlk_Cr_IsZero or curr_DC_reg
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or DC_output[0] or DC_output[1] or DC_output[2] or DC_output[3]
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or DC_output[0] or DC_output[1] or DC_output[2] or DC_output[3]
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or DC_output[4] or DC_output[5] or DC_output[6] or DC_output[7]
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or DC_output[4] or DC_output[5] or DC_output[6] or DC_output[7]
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or DC_output[8] or DC_output[9] or DC_output[10] or DC_output[11]
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or DC_output[8] or DC_output[9] or DC_output[10] or DC_output[11]
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or DC_output[12] or DC_output[13] or DC_output[14] or DC_output[15])
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or DC_output[12] or DC_output[13] or DC_output[14] or DC_output[15])
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if (residual_state == `Intra16x16ACLevel_0_s || (residual_state == `Intra16x16ACLevel_s && (end_of_one_residual_block && TotalCoeff == 0)))
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if (residual_state == `Intra16x16ACLevel_0_s || (residual_state == `Intra16x16ACLevel_s && (end_of_one_residual_block && TotalCoeff == 0)))
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begin
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begin
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if (res_LumaDCBlk_IsZero == 1)
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if (res_LumaDCBlk_IsZero == 1)
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curr_DC <= 0;
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curr_DC <= 0;
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else
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else
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case (blk4x4_rec_counter)
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case (blk4x4_rec_counter)
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0 :curr_DC <= DC_output[0]; 1 :curr_DC <= DC_output[1];
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0 :curr_DC <= DC_output[0]; 1 :curr_DC <= DC_output[1];
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2 :curr_DC <= DC_output[2]; 3 :curr_DC <= DC_output[3];
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2 :curr_DC <= DC_output[2]; 3 :curr_DC <= DC_output[3];
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4 :curr_DC <= DC_output[4]; 5 :curr_DC <= DC_output[5];
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4 :curr_DC <= DC_output[4]; 5 :curr_DC <= DC_output[5];
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6 :curr_DC <= DC_output[6]; 7 :curr_DC <= DC_output[7];
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6 :curr_DC <= DC_output[6]; 7 :curr_DC <= DC_output[7];
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8 :curr_DC <= DC_output[8]; 9 :curr_DC <= DC_output[9];
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8 :curr_DC <= DC_output[8]; 9 :curr_DC <= DC_output[9];
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10:curr_DC <= DC_output[10];11:curr_DC <= DC_output[11];
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10:curr_DC <= DC_output[10];11:curr_DC <= DC_output[11];
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12:curr_DC <= DC_output[12];13:curr_DC <= DC_output[13];
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12:curr_DC <= DC_output[12];13:curr_DC <= DC_output[13];
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14:curr_DC <= DC_output[14];15:curr_DC <= DC_output[15];
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14:curr_DC <= DC_output[14];15:curr_DC <= DC_output[15];
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default:curr_DC <= curr_DC_reg;
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default:curr_DC <= curr_DC_reg;
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endcase
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endcase
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end
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end
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else if (residual_state == `ChromaACLevel_0_s || ((residual_state == `ChromaACLevel_Cb_s
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else if (residual_state == `ChromaACLevel_0_s || ((residual_state == `ChromaACLevel_Cb_s
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|| residual_state == `ChromaACLevel_Cr_s) && (end_of_one_residual_block && TotalCoeff == 0)))
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|| residual_state == `ChromaACLevel_Cr_s) && (end_of_one_residual_block && TotalCoeff == 0)))
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begin
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begin
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if (blk4x4_rec_counter < 20) //Cb
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if (blk4x4_rec_counter < 20) //Cb
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begin
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begin
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if (res_ChromaDCBlk_Cb_IsZero == 1'b1)
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if (res_ChromaDCBlk_Cb_IsZero == 1'b1)
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curr_DC <= 0;
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curr_DC <= 0;
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else
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else
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case (blk4x4_rec_counter)
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case (blk4x4_rec_counter)
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16:curr_DC <= DC_output[0];17:curr_DC <= DC_output[1];
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16:curr_DC <= DC_output[0];17:curr_DC <= DC_output[1];
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18:curr_DC <= DC_output[2];19:curr_DC <= DC_output[3];
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18:curr_DC <= DC_output[2];19:curr_DC <= DC_output[3];
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default:curr_DC <= curr_DC_reg;
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default:curr_DC <= curr_DC_reg;
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endcase
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endcase
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end
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end
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else //Cr
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else //Cr
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begin
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begin
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if (res_ChromaDCBlk_Cr_IsZero == 1'b1)
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if (res_ChromaDCBlk_Cr_IsZero == 1'b1)
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curr_DC <= 0;
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curr_DC <= 0;
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else
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else
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case (blk4x4_rec_counter)
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case (blk4x4_rec_counter)
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20:curr_DC <= DC_output[4];21:curr_DC <= DC_output[5];
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20:curr_DC <= DC_output[4];21:curr_DC <= DC_output[5];
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22:curr_DC <= DC_output[6];23:curr_DC <= DC_output[7];
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22:curr_DC <= DC_output[6];23:curr_DC <= DC_output[7];
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default:curr_DC <= curr_DC_reg;
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default:curr_DC <= curr_DC_reg;
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endcase
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endcase
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end
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end
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end
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end
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else
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else
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curr_DC <= curr_DC_reg;
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curr_DC <= curr_DC_reg;
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wire curr_DC_IsZero;
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wire curr_DC_IsZero;
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assign curr_DC_IsZero = (curr_DC == 0);
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assign curr_DC_IsZero = (curr_DC == 0);
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|
wire [15:0] curr_DC_tmp;
|
wire [15:0] curr_DC_tmp;
|
wire [8:0] curr_DC_scaled;
|
wire [8:0] curr_DC_scaled;
|
assign curr_DC_tmp = curr_DC + 32;
|
assign curr_DC_tmp = curr_DC + 32;
|
assign curr_DC_scaled = curr_DC_tmp[14:6];
|
assign curr_DC_scaled = curr_DC_tmp[14:6];
|
|
|
//-----------------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------------
|
//residual type indicator
|
//residual type indicator
|
//-----------------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------------
|
wire res_DC;
|
wire res_DC;
|
wire res_AC;
|
wire res_AC;
|
wire res_luma;
|
wire res_luma;
|
|
|
assign res_DC = (residual_state == `Intra16x16DCLevel_s || residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s);
|
assign res_DC = (residual_state == `Intra16x16DCLevel_s || residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s);
|
assign res_AC = (residual_state != `rst_residual && !res_DC);
|
assign res_AC = (residual_state != `rst_residual && !res_DC);
|
assign res_luma = (residual_state == `Intra16x16DCLevel_s || residual_state == `Intra16x16ACLevel_s ||
|
assign res_luma = (residual_state == `Intra16x16DCLevel_s || residual_state == `Intra16x16ACLevel_s ||
|
residual_state == `Intra16x16ACLevel_0_s || residual_state == `LumaLevel_s || residual_state == `LumaLevel_0_s);
|
residual_state == `Intra16x16ACLevel_0_s || residual_state == `LumaLevel_s || residual_state == `LumaLevel_0_s);
|
|
|
//1.OneD_counter:control the step of 1D in IDCT,4 cycles
|
//1.OneD_counter:control the step of 1D in IDCT,4 cycles
|
// For ChromaDC IDCT,we combine the original 2x2 2D IDCT into a 4x4-like 1D IDCT
|
// For ChromaDC IDCT,we combine the original 2x2 2D IDCT into a 4x4-like 1D IDCT
|
// ChromaDC: 1 cycle
|
// ChromaDC: 1 cycle
|
// Others : 4 cycles
|
// Others : 4 cycles
|
always @ (posedge gclk_1D or negedge reset_n)
|
always @ (posedge gclk_1D or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
OneD_counter <= 0;
|
OneD_counter <= 0;
|
else if (OneD_counter == 0)
|
else if (OneD_counter == 0)
|
OneD_counter <= (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)? 3'b001:3'b100;
|
OneD_counter <= (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)? 3'b001:3'b100;
|
else
|
else
|
OneD_counter <= OneD_counter - 1;
|
OneD_counter <= OneD_counter - 1;
|
|
|
//2.TwoD_counter:control the step of 2D in IDCT,4 cycles
|
//2.TwoD_counter:control the step of 2D in IDCT,4 cycles
|
// ChromaDC: 0 cycle (All ChromDC transform done at 1D-DCT)
|
// ChromaDC: 0 cycle (All ChromDC transform done at 1D-DCT)
|
// Others : 4 cycles
|
// Others : 4 cycles
|
always @ (posedge gclk_2D or negedge reset_n)
|
always @ (posedge gclk_2D or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
TwoD_counter <= 0;
|
TwoD_counter <= 0;
|
else
|
else
|
TwoD_counter <= (TwoD_counter == 0)? 3'b100:TwoD_counter - 1;
|
TwoD_counter <= (TwoD_counter == 0)? 3'b100:TwoD_counter - 1;
|
|
|
//3.rescale_counter:control the step of rescale
|
//3.rescale_counter:control the step of rescale
|
// ChromaDC: 1 cycle (only 4 ChromDC coefficients)
|
// ChromaDC: 1 cycle (only 4 ChromDC coefficients)
|
// Others : 4 cycles(16 coefficients)
|
// Others : 4 cycles(16 coefficients)
|
always @ (posedge gclk_rescale or negedge reset_n)
|
always @ (posedge gclk_rescale or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
rescale_counter <= 0;
|
rescale_counter <= 0;
|
else if (rescale_counter != 0)
|
else if (rescale_counter != 0)
|
rescale_counter <= rescale_counter - 1;
|
rescale_counter <= rescale_counter - 1;
|
else if (end_of_NonZeroCoeff_CAVLC == 1'b1) // AC
|
else if (end_of_NonZeroCoeff_CAVLC == 1'b1) // AC
|
rescale_counter <= 3'b100;
|
rescale_counter <= 3'b100;
|
else if (OneD_counter == 3'b001 && (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)) //ChromaDC
|
else if (OneD_counter == 3'b001 && (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)) //ChromaDC
|
rescale_counter <= 3'b001;
|
rescale_counter <= 3'b001;
|
else if (TwoD_counter == 3'b100 && residual_state == `Intra16x16DCLevel_s) //LumaDC
|
else if (TwoD_counter == 3'b100 && residual_state == `Intra16x16DCLevel_s) //LumaDC
|
rescale_counter <= 3'b100;
|
rescale_counter <= 3'b100;
|
|
|
//4.rounding_counter
|
//4.rounding_counter
|
always @ (posedge gclk_rounding or negedge reset_n)
|
always @ (posedge gclk_rounding or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
rounding_counter <= 0;
|
rounding_counter <= 0;
|
else
|
else
|
rounding_counter <= (rounding_counter == 0)? 3'b100:(rounding_counter - 1);
|
rounding_counter <= (rounding_counter == 0)? 3'b100:(rounding_counter - 1);
|
|
|
//-----------------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------------
|
//rescale
|
//rescale
|
//-----------------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------------
|
|
|
//butterfly IDCT
|
//butterfly IDCT
|
//1D DC:from coeffLevel
|
//1D DC:from coeffLevel
|
// Intra16x16 :(0,0) :from DC_output
|
// Intra16x16 :(0,0) :from DC_output
|
// others:from rescale_output
|
// others:from rescale_output
|
// ChromaAC_Cb:(0,0) :from DC_output
|
// ChromaAC_Cb:(0,0) :from DC_output
|
// others:from rescale_output
|
// others:from rescale_output
|
// ChromaAC_Cr:(0,0) :from DC_output
|
// ChromaAC_Cr:(0,0) :from DC_output
|
// others:from rescale_output
|
// others:from rescale_output
|
// others :from rescale_output
|
// others :from rescale_output
|
//
|
//
|
//2D All from OneD_output
|
//2D All from OneD_output
|
assign IsHadamard = (res_DC == 1'b1 && (OneD_counter != 0 || TwoD_counter != 0))? 1'b1:1'b0;
|
assign IsHadamard = (res_DC == 1'b1 && (OneD_counter != 0 || TwoD_counter != 0))? 1'b1:1'b0;
|
|
|
butterfly butterfly (
|
butterfly butterfly (
|
.D0(butterfly_D0),
|
.D0(butterfly_D0),
|
.D1(butterfly_D1),
|
.D1(butterfly_D1),
|
.D2(butterfly_D2),
|
.D2(butterfly_D2),
|
.D3(butterfly_D3),
|
.D3(butterfly_D3),
|
.F0(butterfly_F0),
|
.F0(butterfly_F0),
|
.F1(butterfly_F1),
|
.F1(butterfly_F1),
|
.F2(butterfly_F2),
|
.F2(butterfly_F2),
|
.F3(butterfly_F3),
|
.F3(butterfly_F3),
|
.IsHadamard(IsHadamard)
|
.IsHadamard(IsHadamard)
|
);
|
);
|
|
|
always @ (i4x4_CbCr or OneD_counter or TwoD_counter or blk4x4_rec_counter[3:0] or residual_state or res_AC
|
always @ (i4x4_CbCr or OneD_counter or TwoD_counter or blk4x4_rec_counter[3:0] or residual_state or res_AC
|
or res_LumaDCBlk_IsZero or res_ChromaDCBlk_Cb_IsZero or res_ChromaDCBlk_Cr_IsZero
|
or res_LumaDCBlk_IsZero or res_ChromaDCBlk_Cb_IsZero or res_ChromaDCBlk_Cr_IsZero
|
or DC_output[0] or DC_output[1] or DC_output[2] or DC_output[3]
|
or DC_output[0] or DC_output[1] or DC_output[2] or DC_output[3]
|
or DC_output[4] or DC_output[5] or DC_output[6] or DC_output[7]
|
or DC_output[4] or DC_output[5] or DC_output[6] or DC_output[7]
|
or DC_output[8] or DC_output[9] or DC_output[10] or DC_output[11]
|
or DC_output[8] or DC_output[9] or DC_output[10] or DC_output[11]
|
or DC_output[12] or DC_output[13] or DC_output[14] or DC_output[15]
|
or DC_output[12] or DC_output[13] or DC_output[14] or DC_output[15]
|
or coeffLevel_ext_0 or coeffLevel_ext_1 or coeffLevel_ext_2 or coeffLevel_ext_3
|
or coeffLevel_ext_0 or coeffLevel_ext_1 or coeffLevel_ext_2 or coeffLevel_ext_3
|
or coeffLevel_ext_4 or coeffLevel_ext_5 or coeffLevel_ext_6 or coeffLevel_ext_7
|
or coeffLevel_ext_4 or coeffLevel_ext_5 or coeffLevel_ext_6 or coeffLevel_ext_7
|
or coeffLevel_ext_8 or coeffLevel_ext_9 or coeffLevel_ext_10 or coeffLevel_ext_11
|
or coeffLevel_ext_8 or coeffLevel_ext_9 or coeffLevel_ext_10 or coeffLevel_ext_11
|
or coeffLevel_ext_12 or coeffLevel_ext_13 or coeffLevel_ext_14 or coeffLevel_ext_15
|
or coeffLevel_ext_12 or coeffLevel_ext_13 or coeffLevel_ext_14 or coeffLevel_ext_15
|
or OneD_output[0] or OneD_output[1] or OneD_output[2] or OneD_output[3]
|
or OneD_output[0] or OneD_output[1] or OneD_output[2] or OneD_output[3]
|
or OneD_output[4] or OneD_output[5] or OneD_output[6] or OneD_output[7]
|
or OneD_output[4] or OneD_output[5] or OneD_output[6] or OneD_output[7]
|
or OneD_output[8] or OneD_output[9] or OneD_output[10] or OneD_output[11]
|
or OneD_output[8] or OneD_output[9] or OneD_output[10] or OneD_output[11]
|
or OneD_output[12] or OneD_output[13] or OneD_output[14] or OneD_output[15]
|
or OneD_output[12] or OneD_output[13] or OneD_output[14] or OneD_output[15]
|
or rescale_output[0] or rescale_output[1] or rescale_output[2] or rescale_output[3])
|
or rescale_output[0] or rescale_output[1] or rescale_output[2] or rescale_output[3])
|
if (OneD_counter != 0)
|
if (OneD_counter != 0)
|
case (OneD_counter)
|
case (OneD_counter)
|
3'b100:
|
3'b100:
|
begin
|
begin
|
case (residual_state)
|
case (residual_state)
|
`Intra16x16ACLevel_s:
|
`Intra16x16ACLevel_s:
|
if (res_LumaDCBlk_IsZero == 1'b1)
|
if (res_LumaDCBlk_IsZero == 1'b1)
|
butterfly_D0 <= 0;
|
butterfly_D0 <= 0;
|
else
|
else
|
case (blk4x4_rec_counter[3:0])
|
case (blk4x4_rec_counter[3:0])
|
4'b0000: butterfly_D0 <= DC_output[0];
|
4'b0000: butterfly_D0 <= DC_output[0];
|
4'b0001: butterfly_D0 <= DC_output[1];
|
4'b0001: butterfly_D0 <= DC_output[1];
|
4'b0010: butterfly_D0 <= DC_output[2];
|
4'b0010: butterfly_D0 <= DC_output[2];
|
4'b0011: butterfly_D0 <= DC_output[3];
|
4'b0011: butterfly_D0 <= DC_output[3];
|
4'b0100: butterfly_D0 <= DC_output[4];
|
4'b0100: butterfly_D0 <= DC_output[4];
|
4'b0101: butterfly_D0 <= DC_output[5];
|
4'b0101: butterfly_D0 <= DC_output[5];
|
4'b0110: butterfly_D0 <= DC_output[6];
|
4'b0110: butterfly_D0 <= DC_output[6];
|
4'b0111: butterfly_D0 <= DC_output[7];
|
4'b0111: butterfly_D0 <= DC_output[7];
|
4'b1000: butterfly_D0 <= DC_output[8];
|
4'b1000: butterfly_D0 <= DC_output[8];
|
4'b1001: butterfly_D0 <= DC_output[9];
|
4'b1001: butterfly_D0 <= DC_output[9];
|
4'b1010: butterfly_D0 <= DC_output[10];
|
4'b1010: butterfly_D0 <= DC_output[10];
|
4'b1011: butterfly_D0 <= DC_output[11];
|
4'b1011: butterfly_D0 <= DC_output[11];
|
4'b1100: butterfly_D0 <= DC_output[12];
|
4'b1100: butterfly_D0 <= DC_output[12];
|
4'b1101: butterfly_D0 <= DC_output[13];
|
4'b1101: butterfly_D0 <= DC_output[13];
|
4'b1110: butterfly_D0 <= DC_output[14];
|
4'b1110: butterfly_D0 <= DC_output[14];
|
4'b1111: butterfly_D0 <= DC_output[15];
|
4'b1111: butterfly_D0 <= DC_output[15];
|
endcase
|
endcase
|
`ChromaACLevel_Cb_s:
|
`ChromaACLevel_Cb_s:
|
if(res_ChromaDCBlk_Cb_IsZero)
|
if(res_ChromaDCBlk_Cb_IsZero)
|
butterfly_D0 <= 0;
|
butterfly_D0 <= 0;
|
else
|
else
|
case (i4x4_CbCr)
|
case (i4x4_CbCr)
|
2'b00:butterfly_D0 <= DC_output[0];
|
2'b00:butterfly_D0 <= DC_output[0];
|
2'b01:butterfly_D0 <= DC_output[1];
|
2'b01:butterfly_D0 <= DC_output[1];
|
2'b10:butterfly_D0 <= DC_output[2];
|
2'b10:butterfly_D0 <= DC_output[2];
|
2'b11:butterfly_D0 <= DC_output[3];
|
2'b11:butterfly_D0 <= DC_output[3];
|
endcase
|
endcase
|
`ChromaACLevel_Cr_s:
|
`ChromaACLevel_Cr_s:
|
if(res_ChromaDCBlk_Cr_IsZero)
|
if(res_ChromaDCBlk_Cr_IsZero)
|
butterfly_D0 <= 0;
|
butterfly_D0 <= 0;
|
else
|
else
|
case (i4x4_CbCr)
|
case (i4x4_CbCr)
|
2'b00:butterfly_D0 <= DC_output[4];
|
2'b00:butterfly_D0 <= DC_output[4];
|
2'b01:butterfly_D0 <= DC_output[5];
|
2'b01:butterfly_D0 <= DC_output[5];
|
2'b10:butterfly_D0 <= DC_output[6];
|
2'b10:butterfly_D0 <= DC_output[6];
|
2'b11:butterfly_D0 <= DC_output[7];
|
2'b11:butterfly_D0 <= DC_output[7];
|
endcase
|
endcase
|
default: //luma DC,chroma DC,luma4x4 AC
|
default: //luma DC,chroma DC,luma4x4 AC
|
butterfly_D0 <= (res_AC == 1'b1)? rescale_output[0]:coeffLevel_ext_0;
|
butterfly_D0 <= (res_AC == 1'b1)? rescale_output[0]:coeffLevel_ext_0;
|
endcase
|
endcase
|
butterfly_D1 <= (res_AC == 1'b1)? rescale_output[1]:coeffLevel_ext_1;
|
butterfly_D1 <= (res_AC == 1'b1)? rescale_output[1]:coeffLevel_ext_1;
|
butterfly_D2 <= (res_AC == 1'b1)? rescale_output[2]:coeffLevel_ext_5;
|
butterfly_D2 <= (res_AC == 1'b1)? rescale_output[2]:coeffLevel_ext_5;
|
butterfly_D3 <= (res_AC == 1'b1)? rescale_output[3]:coeffLevel_ext_6;
|
butterfly_D3 <= (res_AC == 1'b1)? rescale_output[3]:coeffLevel_ext_6;
|
end
|
end
|
3'b011:
|
3'b011:
|
begin
|
begin
|
butterfly_D0 <= (res_AC == 1'b1)? rescale_output[0]:coeffLevel_ext_2;
|
butterfly_D0 <= (res_AC == 1'b1)? rescale_output[0]:coeffLevel_ext_2;
|
butterfly_D1 <= (res_AC == 1'b1)? rescale_output[1]:coeffLevel_ext_4;
|
butterfly_D1 <= (res_AC == 1'b1)? rescale_output[1]:coeffLevel_ext_4;
|
butterfly_D2 <= (res_AC == 1'b1)? rescale_output[2]:coeffLevel_ext_7;
|
butterfly_D2 <= (res_AC == 1'b1)? rescale_output[2]:coeffLevel_ext_7;
|
butterfly_D3 <= (res_AC == 1'b1)? rescale_output[3]:coeffLevel_ext_12;
|
butterfly_D3 <= (res_AC == 1'b1)? rescale_output[3]:coeffLevel_ext_12;
|
end
|
end
|
3'b010:
|
3'b010:
|
begin
|
begin
|
butterfly_D0 <= (res_AC == 1'b1)? rescale_output[0]:coeffLevel_ext_3;
|
butterfly_D0 <= (res_AC == 1'b1)? rescale_output[0]:coeffLevel_ext_3;
|
butterfly_D1 <= (res_AC == 1'b1)? rescale_output[1]:coeffLevel_ext_8;
|
butterfly_D1 <= (res_AC == 1'b1)? rescale_output[1]:coeffLevel_ext_8;
|
butterfly_D2 <= (res_AC == 1'b1)? rescale_output[2]:coeffLevel_ext_11;
|
butterfly_D2 <= (res_AC == 1'b1)? rescale_output[2]:coeffLevel_ext_11;
|
butterfly_D3 <= (res_AC == 1'b1)? rescale_output[3]:coeffLevel_ext_13;
|
butterfly_D3 <= (res_AC == 1'b1)? rescale_output[3]:coeffLevel_ext_13;
|
end
|
end
|
3'b001:
|
3'b001:
|
begin
|
begin
|
//luma DC
|
//luma DC
|
if (residual_state == `Intra16x16DCLevel_s)
|
if (residual_state == `Intra16x16DCLevel_s)
|
begin
|
begin
|
butterfly_D0 <= coeffLevel_ext_9; butterfly_D1 <= coeffLevel_ext_10;
|
butterfly_D0 <= coeffLevel_ext_9; butterfly_D1 <= coeffLevel_ext_10;
|
butterfly_D2 <= coeffLevel_ext_14; butterfly_D3 <= coeffLevel_ext_15;
|
butterfly_D2 <= coeffLevel_ext_14; butterfly_D3 <= coeffLevel_ext_15;
|
end
|
end
|
//chroma DC
|
//chroma DC
|
else if (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)
|
else if (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)
|
begin
|
begin
|
butterfly_D0 <= coeffLevel_ext_0; butterfly_D1 <= coeffLevel_ext_1;
|
butterfly_D0 <= coeffLevel_ext_0; butterfly_D1 <= coeffLevel_ext_1;
|
butterfly_D2 <= coeffLevel_ext_2; butterfly_D3 <= coeffLevel_ext_3;
|
butterfly_D2 <= coeffLevel_ext_2; butterfly_D3 <= coeffLevel_ext_3;
|
end
|
end
|
//AC
|
//AC
|
else
|
else
|
begin
|
begin
|
butterfly_D0 <= rescale_output[0]; butterfly_D1 <= rescale_output[1];
|
butterfly_D0 <= rescale_output[0]; butterfly_D1 <= rescale_output[1];
|
butterfly_D2 <= rescale_output[2]; butterfly_D3 <= rescale_output[3];
|
butterfly_D2 <= rescale_output[2]; butterfly_D3 <= rescale_output[3];
|
end
|
end
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
butterfly_D0 <= 0; butterfly_D1 <= 0;
|
butterfly_D0 <= 0; butterfly_D1 <= 0;
|
butterfly_D2 <= 0; butterfly_D3 <= 0;
|
butterfly_D2 <= 0; butterfly_D3 <= 0;
|
end
|
end
|
endcase
|
endcase
|
else if (TwoD_counter != 0)
|
else if (TwoD_counter != 0)
|
case (TwoD_counter)
|
case (TwoD_counter)
|
3'b100:
|
3'b100:
|
begin
|
begin
|
butterfly_D0 <= OneD_output[0];butterfly_D1 <= OneD_output[4];
|
butterfly_D0 <= OneD_output[0];butterfly_D1 <= OneD_output[4];
|
butterfly_D2 <= OneD_output[8];butterfly_D3 <= OneD_output[12];
|
butterfly_D2 <= OneD_output[8];butterfly_D3 <= OneD_output[12];
|
end
|
end
|
3'b011:
|
3'b011:
|
begin
|
begin
|
butterfly_D0 <= OneD_output[1];butterfly_D1 <= OneD_output[5];
|
butterfly_D0 <= OneD_output[1];butterfly_D1 <= OneD_output[5];
|
butterfly_D2 <= OneD_output[9];butterfly_D3 <= OneD_output[13];
|
butterfly_D2 <= OneD_output[9];butterfly_D3 <= OneD_output[13];
|
end
|
end
|
3'b010:
|
3'b010:
|
begin
|
begin
|
butterfly_D0 <= OneD_output[2]; butterfly_D1 <= OneD_output[6];
|
butterfly_D0 <= OneD_output[2]; butterfly_D1 <= OneD_output[6];
|
butterfly_D2 <= OneD_output[10];butterfly_D3 <= OneD_output[14];
|
butterfly_D2 <= OneD_output[10];butterfly_D3 <= OneD_output[14];
|
end
|
end
|
3'b001:
|
3'b001:
|
begin
|
begin
|
butterfly_D0 <= OneD_output[3]; butterfly_D1 <= OneD_output[7];
|
butterfly_D0 <= OneD_output[3]; butterfly_D1 <= OneD_output[7];
|
butterfly_D2 <= OneD_output[11];butterfly_D3 <= OneD_output[15];
|
butterfly_D2 <= OneD_output[11];butterfly_D3 <= OneD_output[15];
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
butterfly_D0 <= 0; butterfly_D1 <= 0;
|
butterfly_D0 <= 0; butterfly_D1 <= 0;
|
butterfly_D2 <= 0; butterfly_D3 <= 0;
|
butterfly_D2 <= 0; butterfly_D3 <= 0;
|
end
|
end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
butterfly_D0 <= 0; butterfly_D1 <= 0;
|
butterfly_D0 <= 0; butterfly_D1 <= 0;
|
butterfly_D2 <= 0; butterfly_D3 <= 0;
|
butterfly_D2 <= 0; butterfly_D3 <= 0;
|
end
|
end
|
|
|
assign QP = (res_luma == 1'b1)? QPy:QPc;
|
assign QP = (res_luma == 1'b1)? QPy:QPc;
|
mod6 mod6 (
|
mod6 mod6 (
|
.qp(QP),
|
.qp(QP),
|
.mod(QPmod6)
|
.mod(QPmod6)
|
);
|
);
|
|
|
// Specify LevelScale parameter: LevelScale_DC & LevelScale_AC
|
// Specify LevelScale parameter: LevelScale_DC & LevelScale_AC
|
always @ (rescale_counter or res_DC or QPmod6)
|
always @ (rescale_counter or res_DC or QPmod6)
|
if (rescale_counter != 0 && res_DC == 1'b1)
|
if (rescale_counter != 0 && res_DC == 1'b1)
|
case (QPmod6)
|
case (QPmod6)
|
0:LevelScale_DC <= 10;
|
0:LevelScale_DC <= 10;
|
1:LevelScale_DC <= 11;
|
1:LevelScale_DC <= 11;
|
2:LevelScale_DC <= 13;
|
2:LevelScale_DC <= 13;
|
3:LevelScale_DC <= 14;
|
3:LevelScale_DC <= 14;
|
4:LevelScale_DC <= 16;
|
4:LevelScale_DC <= 16;
|
5:LevelScale_DC <= 18;
|
5:LevelScale_DC <= 18;
|
default:LevelScale_DC <= 0;
|
default:LevelScale_DC <= 0;
|
endcase
|
endcase
|
else
|
else
|
LevelScale_DC <= 0;
|
LevelScale_DC <= 0;
|
|
|
always @ (rescale_counter or res_AC or QPmod6)
|
always @ (rescale_counter or res_AC or QPmod6)
|
if (rescale_counter != 0 && res_AC == 1'b1)
|
if (rescale_counter != 0 && res_AC == 1'b1)
|
case (rescale_counter)
|
case (rescale_counter)
|
3'b100,3'b010: //1 & 3 row
|
3'b100,3'b010: //1 & 3 row
|
case (QPmod6)
|
case (QPmod6)
|
3'b000:begin LevelScale_AC[0] <= 10; LevelScale_AC[1] <= 13; LevelScale_AC[2] <= 10; LevelScale_AC[3] <= 13; end
|
3'b000:begin LevelScale_AC[0] <= 10; LevelScale_AC[1] <= 13; LevelScale_AC[2] <= 10; LevelScale_AC[3] <= 13; end
|
3'b001:begin LevelScale_AC[0] <= 11; LevelScale_AC[1] <= 14; LevelScale_AC[2] <= 11; LevelScale_AC[3] <= 14; end
|
3'b001:begin LevelScale_AC[0] <= 11; LevelScale_AC[1] <= 14; LevelScale_AC[2] <= 11; LevelScale_AC[3] <= 14; end
|
3'b010:begin LevelScale_AC[0] <= 13; LevelScale_AC[1] <= 16; LevelScale_AC[2] <= 13; LevelScale_AC[3] <= 16; end
|
3'b010:begin LevelScale_AC[0] <= 13; LevelScale_AC[1] <= 16; LevelScale_AC[2] <= 13; LevelScale_AC[3] <= 16; end
|
3'b011:begin LevelScale_AC[0] <= 14; LevelScale_AC[1] <= 18; LevelScale_AC[2] <= 14; LevelScale_AC[3] <= 18; end
|
3'b011:begin LevelScale_AC[0] <= 14; LevelScale_AC[1] <= 18; LevelScale_AC[2] <= 14; LevelScale_AC[3] <= 18; end
|
3'b100:begin LevelScale_AC[0] <= 16; LevelScale_AC[1] <= 20; LevelScale_AC[2] <= 16; LevelScale_AC[3] <= 20; end
|
3'b100:begin LevelScale_AC[0] <= 16; LevelScale_AC[1] <= 20; LevelScale_AC[2] <= 16; LevelScale_AC[3] <= 20; end
|
3'b101:begin LevelScale_AC[0] <= 18; LevelScale_AC[1] <= 23; LevelScale_AC[2] <= 18; LevelScale_AC[3] <= 23; end
|
3'b101:begin LevelScale_AC[0] <= 18; LevelScale_AC[1] <= 23; LevelScale_AC[2] <= 18; LevelScale_AC[3] <= 23; end
|
default:begin LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0; LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0; end
|
default:begin LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0; LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0; end
|
endcase
|
endcase
|
3'b011,3'b001: //2 & 4 row
|
3'b011,3'b001: //2 & 4 row
|
case (QPmod6)
|
case (QPmod6)
|
3'b000:begin LevelScale_AC[0] <= 13; LevelScale_AC[1] <= 16; LevelScale_AC[2] <= 13; LevelScale_AC[3] <= 16; end
|
3'b000:begin LevelScale_AC[0] <= 13; LevelScale_AC[1] <= 16; LevelScale_AC[2] <= 13; LevelScale_AC[3] <= 16; end
|
3'b001:begin LevelScale_AC[0] <= 14; LevelScale_AC[1] <= 18; LevelScale_AC[2] <= 14; LevelScale_AC[3] <= 18; end
|
3'b001:begin LevelScale_AC[0] <= 14; LevelScale_AC[1] <= 18; LevelScale_AC[2] <= 14; LevelScale_AC[3] <= 18; end
|
3'b010:begin LevelScale_AC[0] <= 16; LevelScale_AC[1] <= 20; LevelScale_AC[2] <= 16; LevelScale_AC[3] <= 20; end
|
3'b010:begin LevelScale_AC[0] <= 16; LevelScale_AC[1] <= 20; LevelScale_AC[2] <= 16; LevelScale_AC[3] <= 20; end
|
3'b011:begin LevelScale_AC[0] <= 18; LevelScale_AC[1] <= 23; LevelScale_AC[2] <= 18; LevelScale_AC[3] <= 23; end
|
3'b011:begin LevelScale_AC[0] <= 18; LevelScale_AC[1] <= 23; LevelScale_AC[2] <= 18; LevelScale_AC[3] <= 23; end
|
3'b100:begin LevelScale_AC[0] <= 20; LevelScale_AC[1] <= 25; LevelScale_AC[2] <= 20; LevelScale_AC[3] <= 25; end
|
3'b100:begin LevelScale_AC[0] <= 20; LevelScale_AC[1] <= 25; LevelScale_AC[2] <= 20; LevelScale_AC[3] <= 25; end
|
3'b101:begin LevelScale_AC[0] <= 23; LevelScale_AC[1] <= 29; LevelScale_AC[2] <= 23; LevelScale_AC[3] <= 29; end
|
3'b101:begin LevelScale_AC[0] <= 23; LevelScale_AC[1] <= 29; LevelScale_AC[2] <= 23; LevelScale_AC[3] <= 29; end
|
default:begin LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0; LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0; end
|
default:begin LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0; LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0; end
|
endcase
|
endcase
|
default:begin LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0; LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0; end
|
default:begin LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0; LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0; end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0;
|
LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0;
|
LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0;
|
LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0;
|
end
|
end
|
|
|
assign LevelScale[0] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[0]:LevelScale_DC);
|
assign LevelScale[0] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[0]:LevelScale_DC);
|
assign LevelScale[1] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[1]:LevelScale_DC);
|
assign LevelScale[1] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[1]:LevelScale_DC);
|
assign LevelScale[2] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[2]:LevelScale_DC);
|
assign LevelScale[2] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[2]:LevelScale_DC);
|
assign LevelScale[3] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[3]:LevelScale_DC);
|
assign LevelScale[3] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[3]:LevelScale_DC);
|
|
|
// Specify rescale multiplier input
|
// Specify rescale multiplier input
|
always @ (residual_state or res_DC or rescale_counter
|
always @ (residual_state or res_DC or rescale_counter
|
or OneD_output[0] or OneD_output[1] or OneD_output[2] or OneD_output[3]
|
or OneD_output[0] or OneD_output[1] or OneD_output[2] or OneD_output[3]
|
or OneD_output[4] or OneD_output[5] or OneD_output[6] or OneD_output[7]
|
or OneD_output[4] or OneD_output[5] or OneD_output[6] or OneD_output[7]
|
or OneD_output[8] or OneD_output[9] or OneD_output[10] or OneD_output[11]
|
or OneD_output[8] or OneD_output[9] or OneD_output[10] or OneD_output[11]
|
or OneD_output[12] or OneD_output[13] or OneD_output[14] or OneD_output[15]
|
or OneD_output[12] or OneD_output[13] or OneD_output[14] or OneD_output[15]
|
or TwoD_output[0] or TwoD_output[1] or TwoD_output[2] or TwoD_output[3]
|
or TwoD_output[0] or TwoD_output[1] or TwoD_output[2] or TwoD_output[3]
|
or coeffLevel_ext_0 or coeffLevel_ext_1 or coeffLevel_ext_2 or coeffLevel_ext_3
|
or coeffLevel_ext_0 or coeffLevel_ext_1 or coeffLevel_ext_2 or coeffLevel_ext_3
|
or coeffLevel_ext_4 or coeffLevel_ext_5 or coeffLevel_ext_6 or coeffLevel_ext_7
|
or coeffLevel_ext_4 or coeffLevel_ext_5 or coeffLevel_ext_6 or coeffLevel_ext_7
|
or coeffLevel_ext_8 or coeffLevel_ext_9 or coeffLevel_ext_10 or coeffLevel_ext_11
|
or coeffLevel_ext_8 or coeffLevel_ext_9 or coeffLevel_ext_10 or coeffLevel_ext_11
|
or coeffLevel_ext_12 or coeffLevel_ext_13 or coeffLevel_ext_14 or coeffLevel_ext_15)
|
or coeffLevel_ext_12 or coeffLevel_ext_13 or coeffLevel_ext_14 or coeffLevel_ext_15)
|
if (residual_state == `Intra16x16DCLevel_s && rescale_counter != 0) //Intra16x16DC
|
if (residual_state == `Intra16x16DCLevel_s && rescale_counter != 0) //Intra16x16DC
|
begin
|
begin
|
mult0_a <= TwoD_output[0]; mult1_a <= TwoD_output[1];
|
mult0_a <= TwoD_output[0]; mult1_a <= TwoD_output[1];
|
mult2_a <= TwoD_output[2]; mult3_a <= TwoD_output[3];
|
mult2_a <= TwoD_output[2]; mult3_a <= TwoD_output[3];
|
end
|
end
|
else if (res_DC == 1'b1 && rescale_counter != 0) //ChromaDC
|
else if (res_DC == 1'b1 && rescale_counter != 0) //ChromaDC
|
begin
|
begin
|
mult0_a <= OneD_output[12]; mult1_a <= OneD_output[15];
|
mult0_a <= OneD_output[12]; mult1_a <= OneD_output[15];
|
mult2_a <= OneD_output[13]; mult3_a <= OneD_output[14];
|
mult2_a <= OneD_output[13]; mult3_a <= OneD_output[14];
|
end
|
end
|
else if (rescale_counter != 0) //AC
|
else if (rescale_counter != 0) //AC
|
case (rescale_counter)
|
case (rescale_counter)
|
3'b100:
|
3'b100:
|
begin
|
begin
|
mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_0:0;
|
mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_0:0;
|
mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_1:coeffLevel_ext_0;
|
mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_1:coeffLevel_ext_0;
|
mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_5:coeffLevel_ext_4;
|
mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_5:coeffLevel_ext_4;
|
mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_6:coeffLevel_ext_5;
|
mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_6:coeffLevel_ext_5;
|
end
|
end
|
3'b011:
|
3'b011:
|
begin
|
begin
|
mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_2:coeffLevel_ext_1;
|
mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_2:coeffLevel_ext_1;
|
mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_4:coeffLevel_ext_3;
|
mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_4:coeffLevel_ext_3;
|
mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_7:coeffLevel_ext_6;
|
mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_7:coeffLevel_ext_6;
|
mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_12:coeffLevel_ext_11;
|
mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_12:coeffLevel_ext_11;
|
end
|
end
|
3'b010:
|
3'b010:
|
begin
|
begin
|
mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_3:coeffLevel_ext_2;
|
mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_3:coeffLevel_ext_2;
|
mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_8:coeffLevel_ext_7;
|
mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_8:coeffLevel_ext_7;
|
mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_11:coeffLevel_ext_10;
|
mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_11:coeffLevel_ext_10;
|
mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_13:coeffLevel_ext_12;
|
mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_13:coeffLevel_ext_12;
|
end
|
end
|
3'b001:
|
3'b001:
|
begin
|
begin
|
mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_9:coeffLevel_ext_8;
|
mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_9:coeffLevel_ext_8;
|
mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_10:coeffLevel_ext_9;
|
mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_10:coeffLevel_ext_9;
|
mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_14:coeffLevel_ext_13;
|
mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_14:coeffLevel_ext_13;
|
mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_15:coeffLevel_ext_14;
|
mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_15:coeffLevel_ext_14;
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
mult0_a <= 0; mult1_a <= 0;
|
mult0_a <= 0; mult1_a <= 0;
|
mult2_a <= 0; mult3_a <= 0;
|
mult2_a <= 0; mult3_a <= 0;
|
end
|
end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
mult0_a <= 0; mult1_a <= 0;
|
mult0_a <= 0; mult1_a <= 0;
|
mult2_a <= 0; mult3_a <= 0;
|
mult2_a <= 0; mult3_a <= 0;
|
end
|
end
|
|
|
//rescale multiplier
|
//rescale multiplier
|
assign product0 = (rescale_counter == 0)? 0:mult0_a * {1'b0,LevelScale[0]};
|
assign product0 = (rescale_counter == 0)? 0:mult0_a * {1'b0,LevelScale[0]};
|
assign product1 = (rescale_counter == 0)? 0:mult1_a * {1'b0,LevelScale[1]};
|
assign product1 = (rescale_counter == 0)? 0:mult1_a * {1'b0,LevelScale[1]};
|
assign product2 = (rescale_counter == 0)? 0:mult2_a * {1'b0,LevelScale[2]};
|
assign product2 = (rescale_counter == 0)? 0:mult2_a * {1'b0,LevelScale[2]};
|
assign product3 = (rescale_counter == 0)? 0:mult3_a * {1'b0,LevelScale[3]};
|
assign product3 = (rescale_counter == 0)? 0:mult3_a * {1'b0,LevelScale[3]};
|
|
|
always @ (res_AC or res_luma or QPy or QPc)
|
always @ (res_AC or res_luma or QPy or QPc)
|
if (res_AC == 1'b1)
|
if (res_AC == 1'b1)
|
IsLeftShift <= 1'b1;
|
IsLeftShift <= 1'b1;
|
else if (res_luma == 1'b1)
|
else if (res_luma == 1'b1)
|
IsLeftShift <= (QPy < 12)? 1'b0:1'b1;
|
IsLeftShift <= (QPy < 12)? 1'b0:1'b1;
|
else
|
else
|
IsLeftShift <= (QPc < 6)? 1'b0:1'b1;
|
IsLeftShift <= (QPc < 6)? 1'b0:1'b1;
|
|
|
div6 div6 (
|
div6 div6 (
|
.qp(QP),
|
.qp(QP),
|
.div(QPdiv6)
|
.div(QPdiv6)
|
);
|
);
|
|
|
always @ (residual_state or res_DC or QPdiv6)
|
always @ (residual_state or res_DC or QPdiv6)
|
if (residual_state == `Intra16x16DCLevel_s) //Intra16x16DC
|
if (residual_state == `Intra16x16DCLevel_s) //Intra16x16DC
|
case (QPdiv6)
|
case (QPdiv6)
|
4'b0000:shift_len <= 2;
|
4'b0000:shift_len <= 2;
|
4'b0001:shift_len <= 1;
|
4'b0001:shift_len <= 1;
|
default:shift_len <= QPdiv6 - 2;
|
default:shift_len <= QPdiv6 - 2;
|
endcase
|
endcase
|
else if (res_DC) //ChromaDC
|
else if (res_DC) //ChromaDC
|
case (QPdiv6)
|
case (QPdiv6)
|
4'b0000:shift_len <= 1;
|
4'b0000:shift_len <= 1;
|
default:shift_len <= QPdiv6 - 1;
|
default:shift_len <= QPdiv6 - 1;
|
endcase
|
endcase
|
else //AC
|
else //AC
|
shift_len <= QPdiv6;
|
shift_len <= QPdiv6;
|
|
|
rescale_shift rescale_shift0 (
|
rescale_shift rescale_shift0 (
|
.IsLeftShift(IsLeftShift),
|
.IsLeftShift(IsLeftShift),
|
.shift_input(product0),
|
.shift_input(product0),
|
.shift_len(shift_len),
|
.shift_len(shift_len),
|
.shift_output(shift_output0)
|
.shift_output(shift_output0)
|
);
|
);
|
rescale_shift rescale_shift1 (
|
rescale_shift rescale_shift1 (
|
.IsLeftShift(IsLeftShift),
|
.IsLeftShift(IsLeftShift),
|
.shift_input(product1),
|
.shift_input(product1),
|
.shift_len(shift_len),
|
.shift_len(shift_len),
|
.shift_output(shift_output1)
|
.shift_output(shift_output1)
|
);
|
);
|
rescale_shift rescale_shift2 (
|
rescale_shift rescale_shift2 (
|
.IsLeftShift(IsLeftShift),
|
.IsLeftShift(IsLeftShift),
|
.shift_input(product2),
|
.shift_input(product2),
|
.shift_len(shift_len),
|
.shift_len(shift_len),
|
.shift_output(shift_output2)
|
.shift_output(shift_output2)
|
);
|
);
|
rescale_shift rescale_shift3 (
|
rescale_shift rescale_shift3 (
|
.IsLeftShift(IsLeftShift),
|
.IsLeftShift(IsLeftShift),
|
.shift_input(product3),
|
.shift_input(product3),
|
.shift_len(shift_len),
|
.shift_len(shift_len),
|
.shift_output(shift_output3)
|
.shift_output(shift_output3)
|
);
|
);
|
//-----------------------------------------------------------------------
|
//-----------------------------------------------------------------------
|
//rounding
|
//rounding
|
//-----------------------------------------------------------------------
|
//-----------------------------------------------------------------------
|
assign before_rounding0 = (rounding_counter != 0)? TwoD_output[0]:0;
|
assign before_rounding0 = (rounding_counter != 0)? TwoD_output[0]:0;
|
assign before_rounding1 = (rounding_counter != 0)? TwoD_output[1]:0;
|
assign before_rounding1 = (rounding_counter != 0)? TwoD_output[1]:0;
|
assign before_rounding2 = (rounding_counter != 0)? TwoD_output[2]:0;
|
assign before_rounding2 = (rounding_counter != 0)? TwoD_output[2]:0;
|
assign before_rounding3 = (rounding_counter != 0)? TwoD_output[3]:0;
|
assign before_rounding3 = (rounding_counter != 0)? TwoD_output[3]:0;
|
|
|
assign rounding_sum0 = before_rounding0[14:5] + 1;
|
assign rounding_sum0 = before_rounding0[14:5] + 1;
|
assign rounding_sum1 = before_rounding1[14:5] + 1;
|
assign rounding_sum1 = before_rounding1[14:5] + 1;
|
assign rounding_sum2 = before_rounding2[14:5] + 1;
|
assign rounding_sum2 = before_rounding2[14:5] + 1;
|
assign rounding_sum3 = before_rounding3[14:5] + 1;
|
assign rounding_sum3 = before_rounding3[14:5] + 1;
|
|
|
//-----------------------------------------------------------------------
|
//-----------------------------------------------------------------------
|
// Strore results
|
// Strore results
|
//-----------------------------------------------------------------------
|
//-----------------------------------------------------------------------
|
//1. Store OneD_output
|
//1. Store OneD_output
|
integer i;
|
integer i;
|
always @ (posedge gclk_1D or negedge reset_n)
|
always @ (posedge gclk_1D or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
for (i=0;i<16;i=i+1)
|
for (i=0;i<16;i=i+1)
|
OneD_output[i] <= 0;
|
OneD_output[i] <= 0;
|
else if (OneD_counter != 0)
|
else if (OneD_counter != 0)
|
case (OneD_counter)
|
case (OneD_counter)
|
3'b100:
|
3'b100:
|
begin
|
begin
|
OneD_output[0] <= butterfly_F0;OneD_output[1] <= butterfly_F1;
|
OneD_output[0] <= butterfly_F0;OneD_output[1] <= butterfly_F1;
|
OneD_output[2] <= butterfly_F2;OneD_output[3] <= butterfly_F3;
|
OneD_output[2] <= butterfly_F2;OneD_output[3] <= butterfly_F3;
|
end
|
end
|
3'b011:
|
3'b011:
|
begin
|
begin
|
OneD_output[4] <= butterfly_F0;OneD_output[5] <= butterfly_F1;
|
OneD_output[4] <= butterfly_F0;OneD_output[5] <= butterfly_F1;
|
OneD_output[6] <= butterfly_F2;OneD_output[7] <= butterfly_F3;
|
OneD_output[6] <= butterfly_F2;OneD_output[7] <= butterfly_F3;
|
end
|
end
|
3'b010:
|
3'b010:
|
begin
|
begin
|
OneD_output[8] <= butterfly_F0;OneD_output[9] <= butterfly_F1;
|
OneD_output[8] <= butterfly_F0;OneD_output[9] <= butterfly_F1;
|
OneD_output[10] <= butterfly_F2;OneD_output[11] <= butterfly_F3;
|
OneD_output[10] <= butterfly_F2;OneD_output[11] <= butterfly_F3;
|
end
|
end
|
3'b001:
|
3'b001:
|
begin
|
begin
|
OneD_output[12] <= butterfly_F0;OneD_output[13] <= butterfly_F1;
|
OneD_output[12] <= butterfly_F0;OneD_output[13] <= butterfly_F1;
|
OneD_output[14] <= butterfly_F2;OneD_output[15] <= butterfly_F3;
|
OneD_output[14] <= butterfly_F2;OneD_output[15] <= butterfly_F3;
|
end
|
end
|
endcase
|
endcase
|
|
|
//2. Store TwoD_output
|
//2. Store TwoD_output
|
integer j;
|
integer j;
|
always @ (posedge gclk_2D or negedge reset_n)
|
always @ (posedge gclk_2D or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
for (j=0;j<4;j=j+1)
|
for (j=0;j<4;j=j+1)
|
TwoD_output[j] <= 0;
|
TwoD_output[j] <= 0;
|
else if (TwoD_counter != 0)
|
else if (TwoD_counter != 0)
|
begin
|
begin
|
TwoD_output[0] <= butterfly_F0; TwoD_output[1] <= butterfly_F1;
|
TwoD_output[0] <= butterfly_F0; TwoD_output[1] <= butterfly_F1;
|
TwoD_output[2] <= butterfly_F2; TwoD_output[3] <= butterfly_F3;
|
TwoD_output[2] <= butterfly_F2; TwoD_output[3] <= butterfly_F3;
|
end
|
end
|
|
|
//3.1 Store rescale_output as DC_output
|
//3.1 Store rescale_output as DC_output
|
integer m;
|
integer m;
|
always @ (posedge gclk_rescale or negedge reset_n)
|
always @ (posedge gclk_rescale or negedge reset_n)
|
if (reset_n == 1'b0)
|
if (reset_n == 1'b0)
|
for (m=0;m<16;m=m+1)
|
for (m=0;m<16;m=m+1)
|
DC_output[m] <= 0;
|
DC_output[m] <= 0;
|
else if (res_DC == 1'b1)
|
else if (res_DC == 1'b1)
|
case (rescale_counter)
|
case (rescale_counter)
|
3'b100:
|
3'b100:
|
begin
|
begin
|
DC_output[0] <= shift_output0; DC_output[2] <= shift_output1;
|
DC_output[0] <= shift_output0; DC_output[2] <= shift_output1;
|
DC_output[8] <= shift_output2; DC_output[10] <= shift_output3;
|
DC_output[8] <= shift_output2; DC_output[10] <= shift_output3;
|
end
|
end
|
3'b011:
|
3'b011:
|
begin
|
begin
|
DC_output[1] <= shift_output0; DC_output[3] <= shift_output1;
|
DC_output[1] <= shift_output0; DC_output[3] <= shift_output1;
|
DC_output[9] <= shift_output2; DC_output[11] <= shift_output3;
|
DC_output[9] <= shift_output2; DC_output[11] <= shift_output3;
|
end
|
end
|
3'b010:
|
3'b010:
|
begin
|
begin
|
DC_output[4] <= shift_output0; DC_output[6] <= shift_output1;
|
DC_output[4] <= shift_output0; DC_output[6] <= shift_output1;
|
DC_output[12] <= shift_output2; DC_output[14] <= shift_output3;
|
DC_output[12] <= shift_output2; DC_output[14] <= shift_output3;
|
end
|
end
|
3'b001:
|
3'b001:
|
if (residual_state == `ChromaDCLevel_Cb_s)
|
if (residual_state == `ChromaDCLevel_Cb_s)
|
begin
|
begin
|
DC_output[0] <= shift_output0; DC_output[1] <= shift_output1;
|
DC_output[0] <= shift_output0; DC_output[1] <= shift_output1;
|
DC_output[2] <= shift_output2; DC_output[3] <= shift_output3;
|
DC_output[2] <= shift_output2; DC_output[3] <= shift_output3;
|
end
|
end
|
else if (residual_state == `ChromaDCLevel_Cr_s)
|
else if (residual_state == `ChromaDCLevel_Cr_s)
|
begin
|
begin
|
DC_output[4] <= shift_output0; DC_output[5] <= shift_output1;
|
DC_output[4] <= shift_output0; DC_output[5] <= shift_output1;
|
DC_output[6] <= shift_output2; DC_output[7] <= shift_output3;
|
DC_output[6] <= shift_output2; DC_output[7] <= shift_output3;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
DC_output[5] <= shift_output0; DC_output[7] <= shift_output1;
|
DC_output[5] <= shift_output0; DC_output[7] <= shift_output1;
|
DC_output[13] <= shift_output2; DC_output[15] <= shift_output3;
|
DC_output[13] <= shift_output2; DC_output[15] <= shift_output3;
|
end
|
end
|
endcase
|
endcase
|
|
|
//3.2 Store rescale_output as AC_output
|
//3.2 Store rescale_output as AC_output
|
integer n;
|
integer n;
|
always @ (posedge gclk_rescale or negedge reset_n)
|
always @ (posedge gclk_rescale or negedge reset_n)
|
if (reset_n == 1'b0)
|
if (reset_n == 1'b0)
|
for (n=0;n<4;n=n+1)
|
for (n=0;n<4;n=n+1)
|
rescale_output[n] <= 0;
|
rescale_output[n] <= 0;
|
else if (res_AC == 1'b1 && rescale_counter != 0)
|
else if (res_AC == 1'b1 && rescale_counter != 0)
|
begin
|
begin
|
rescale_output[0] <= shift_output0; rescale_output[1] <= shift_output1;
|
rescale_output[0] <= shift_output0; rescale_output[1] <= shift_output1;
|
rescale_output[2] <= shift_output2; rescale_output[3] <= shift_output3;
|
rescale_output[2] <= shift_output2; rescale_output[3] <= shift_output3;
|
end
|
end
|
|
|
//4. Store rounding_output
|
//4. Store rounding_output
|
always @ (posedge gclk_rounding or negedge reset_n)
|
always @ (posedge gclk_rounding or negedge reset_n)
|
if (reset_n == 1'b0)
|
if (reset_n == 1'b0)
|
begin
|
begin
|
rounding_output_0 <= 0;rounding_output_1 <= 0;rounding_output_2 <= 0;rounding_output_3 <= 0;
|
rounding_output_0 <= 0;rounding_output_1 <= 0;rounding_output_2 <= 0;rounding_output_3 <= 0;
|
rounding_output_4 <= 0;rounding_output_5 <= 0;rounding_output_6 <= 0;rounding_output_7 <= 0;
|
rounding_output_4 <= 0;rounding_output_5 <= 0;rounding_output_6 <= 0;rounding_output_7 <= 0;
|
rounding_output_8 <= 0;rounding_output_9 <= 0;rounding_output_10 <= 0;rounding_output_11 <= 0;
|
rounding_output_8 <= 0;rounding_output_9 <= 0;rounding_output_10 <= 0;rounding_output_11 <= 0;
|
rounding_output_12 <= 0;rounding_output_13 <= 0;rounding_output_14 <= 0;rounding_output_15 <= 0;
|
rounding_output_12 <= 0;rounding_output_13 <= 0;rounding_output_14 <= 0;rounding_output_15 <= 0;
|
end
|
end
|
else
|
else
|
case (rounding_counter)
|
case (rounding_counter)
|
3'b100:
|
3'b100:
|
begin
|
begin
|
rounding_output_0 <= rounding_sum0[9:1];
|
rounding_output_0 <= rounding_sum0[9:1];
|
rounding_output_4 <= rounding_sum1[9:1];
|
rounding_output_4 <= rounding_sum1[9:1];
|
rounding_output_8 <= rounding_sum2[9:1];
|
rounding_output_8 <= rounding_sum2[9:1];
|
rounding_output_12 <= rounding_sum3[9:1];
|
rounding_output_12 <= rounding_sum3[9:1];
|
end
|
end
|
3'b011:
|
3'b011:
|
begin
|
begin
|
rounding_output_1 <= rounding_sum0[9:1];
|
rounding_output_1 <= rounding_sum0[9:1];
|
rounding_output_5 <= rounding_sum1[9:1];
|
rounding_output_5 <= rounding_sum1[9:1];
|
rounding_output_9 <= rounding_sum2[9:1];
|
rounding_output_9 <= rounding_sum2[9:1];
|
rounding_output_13 <= rounding_sum3[9:1];
|
rounding_output_13 <= rounding_sum3[9:1];
|
end
|
end
|
3'b010:
|
3'b010:
|
begin
|
begin
|
rounding_output_2 <= rounding_sum0[9:1];
|
rounding_output_2 <= rounding_sum0[9:1];
|
rounding_output_6 <= rounding_sum1[9:1];
|
rounding_output_6 <= rounding_sum1[9:1];
|
rounding_output_10 <= rounding_sum2[9:1];
|
rounding_output_10 <= rounding_sum2[9:1];
|
rounding_output_14 <= rounding_sum3[9:1];
|
rounding_output_14 <= rounding_sum3[9:1];
|
end
|
end
|
3'b001:
|
3'b001:
|
begin
|
begin
|
rounding_output_3 <= rounding_sum0[9:1];
|
rounding_output_3 <= rounding_sum0[9:1];
|
rounding_output_7 <= rounding_sum1[9:1];
|
rounding_output_7 <= rounding_sum1[9:1];
|
rounding_output_11 <= rounding_sum2[9:1];
|
rounding_output_11 <= rounding_sum2[9:1];
|
rounding_output_15 <= rounding_sum3[9:1];
|
rounding_output_15 <= rounding_sum3[9:1];
|
end
|
end
|
endcase
|
endcase
|
assign end_of_ACBlk4x4_IQIT = (rounding_counter == 3'b001)? 1'b1:1'b0;
|
assign end_of_ACBlk4x4_IQIT = (rounding_counter == 3'b001)? 1'b1:1'b0;
|
assign end_of_DCBlk_IQIT = ((residual_state == `Intra16x16DCLevel_s || residual_state == `ChromaDCLevel_Cb_s ||
|
assign end_of_DCBlk_IQIT = ((residual_state == `Intra16x16DCLevel_s || residual_state == `ChromaDCLevel_Cb_s ||
|
residual_state == `ChromaDCLevel_Cr_s) && rescale_counter == 3'b001)? 1'b1:1'b0;
|
residual_state == `ChromaDCLevel_Cr_s) && rescale_counter == 3'b001)? 1'b1:1'b0;
|
endmodule
|
endmodule
|
|
|
module butterfly (D0,D1,D2,D3,F0,F1,F2,F3,IsHadamard);
|
module butterfly (D0,D1,D2,D3,F0,F1,F2,F3,IsHadamard);
|
input [15:0] D0,D1,D2,D3;
|
input [15:0] D0,D1,D2,D3;
|
input IsHadamard;
|
input IsHadamard;
|
output [15:0] F0,F1,F2,F3;
|
output [15:0] F0,F1,F2,F3;
|
|
|
wire [15:0] T0,T1,T2,T3;
|
wire [15:0] T0,T1,T2,T3;
|
wire [15:0] D1_scale,D3_scale;
|
wire [15:0] D1_scale,D3_scale;
|
|
|
assign D1_scale = (IsHadamard == 1'b1)? D1:{D1[15],D1[15:1]};
|
assign D1_scale = (IsHadamard == 1'b1)? D1:{D1[15],D1[15:1]};
|
assign D3_scale = (IsHadamard == 1'b1)? D3:{D3[15],D3[15:1]};
|
assign D3_scale = (IsHadamard == 1'b1)? D3:{D3[15],D3[15:1]};
|
|
|
assign T0 = D0 + D2;
|
assign T0 = D0 + D2;
|
assign T1 = D0 - D2;
|
assign T1 = D0 - D2;
|
assign T2 = D1_scale - D3;
|
assign T2 = D1_scale - D3;
|
assign T3 = D1 + D3_scale;
|
assign T3 = D1 + D3_scale;
|
|
|
assign F0 = T0 + T3;
|
assign F0 = T0 + T3;
|
assign F1 = T1 + T2;
|
assign F1 = T1 + T2;
|
assign F2 = T1 - T2;
|
assign F2 = T1 - T2;
|
assign F3 = T0 - T3;
|
assign F3 = T0 - T3;
|
endmodule
|
endmodule
|
|
|
module mod6 (qp,mod);
|
module mod6 (qp,mod);
|
input [5:0] qp;
|
input [5:0] qp;
|
output [2:0] mod;
|
output [2:0] mod;
|
reg [2:0] mod;
|
reg [2:0] mod;
|
always @ (qp)
|
always @ (qp)
|
case (qp)
|
case (qp)
|
0, 6,12,18,24,30,36,42,48:mod <= 3'b000;
|
0, 6,12,18,24,30,36,42,48:mod <= 3'b000;
|
1, 7,13,19,25,31,37,43,49:mod <= 3'b001;
|
1, 7,13,19,25,31,37,43,49:mod <= 3'b001;
|
2, 8,14,20,26,32,38,44,50:mod <= 3'b010;
|
2, 8,14,20,26,32,38,44,50:mod <= 3'b010;
|
3, 9,15,21,27,33,39,45,51:mod <= 3'b011;
|
3, 9,15,21,27,33,39,45,51:mod <= 3'b011;
|
4,10,16,22,28,34,40,46 :mod <= 3'b100;
|
4,10,16,22,28,34,40,46 :mod <= 3'b100;
|
5,11,17,23,29,35,41,47 :mod <= 3'b101;
|
5,11,17,23,29,35,41,47 :mod <= 3'b101;
|
default :mod <= 3'b000;
|
default :mod <= 3'b000;
|
endcase
|
endcase
|
endmodule
|
endmodule
|
|
|
module div6 (qp,div);
|
module div6 (qp,div);
|
input [5:0] qp;
|
input [5:0] qp;
|
output [3:0] div;
|
output [3:0] div;
|
reg [3:0] div;
|
reg [3:0] div;
|
always @ (qp)
|
always @ (qp)
|
case (qp)
|
case (qp)
|
0, 1, 2, 3, 4, 5 :div <= 4'b0000;
|
0, 1, 2, 3, 4, 5 :div <= 4'b0000;
|
6, 7, 8, 9, 10,11:div <= 4'b0001;
|
6, 7, 8, 9, 10,11:div <= 4'b0001;
|
12,13,14,15,16,17:div <= 4'b0010;
|
12,13,14,15,16,17:div <= 4'b0010;
|
18,19,20,21,22,23:div <= 4'b0011;
|
18,19,20,21,22,23:div <= 4'b0011;
|
24,25,26,27,28,29:div <= 4'b0100;
|
24,25,26,27,28,29:div <= 4'b0100;
|
30,31,32,33,34,35:div <= 4'b0101;
|
30,31,32,33,34,35:div <= 4'b0101;
|
36,37,38,39,40,41:div <= 4'b0110;
|
36,37,38,39,40,41:div <= 4'b0110;
|
42,43,44,45,46,47:div <= 4'b0111;
|
42,43,44,45,46,47:div <= 4'b0111;
|
48,49,50,51 :div <= 4'b1000;
|
48,49,50,51 :div <= 4'b1000;
|
default :div <= 0;
|
default :div <= 0;
|
endcase
|
endcase
|
endmodule
|
endmodule
|
|
|
module rescale_shift (IsLeftShift,shift_input,shift_len,shift_output);
|
module rescale_shift (IsLeftShift,shift_input,shift_len,shift_output);
|
input IsLeftShift;
|
input IsLeftShift;
|
input signed [15:0] shift_input;
|
input signed [15:0] shift_input;
|
input [3:0] shift_len;
|
input [3:0] shift_len;
|
output signed [15:0] shift_output;
|
output signed [15:0] shift_output;
|
|
|
assign shift_output = (IsLeftShift == 1'b1)? (shift_input <<< shift_len):(shift_input >>> shift_len);
|
assign shift_output = (IsLeftShift == 1'b1)? (shift_input <<< shift_len):(shift_input >>> shift_len);
|
endmodule
|
endmodule
|
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