//--------------------------------------------------------------------------------------------------
|
//--------------------------------------------------------------------------------------------------
|
// Design : nova
|
// Design : nova
|
// Author(s) : Ke Xu
|
// Author(s) : Ke Xu
|
// Email : eexuke@yahoo.com
|
// Email : eexuke@yahoo.com
|
// File : nC_decoding.v
|
// File : nC_decoding.v
|
// Generated : May 18, 2005
|
// Generated : May 18, 2005
|
// Copyright (C) 2008 Ke Xu
|
// Copyright (C) 2008 Ke Xu
|
//-------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
// Description
|
// Description
|
// Devive the number of none-zero coeff during nC decoding for TotalCoeff & TrailingOnes LUT
|
// Devive the number of none-zero coeff during nC decoding for TotalCoeff & TrailingOnes LUT
|
//-------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
|
|
// synopsys translate_off
|
// synopsys translate_off
|
`include "timescale.v"
|
`include "timescale.v"
|
// synopsys translate_on
|
// synopsys translate_on
|
`include "nova_defines.v"
|
`include "nova_defines.v"
|
|
|
module nC_decoding (clk,reset_n,gclk_end_of_MB_DEC,
|
module nC_decoding (clk,reset_n,gclk_end_of_MB_DEC,
|
cavlc_decoder_state,residual_state,slice_data_state,
|
cavlc_decoder_state,residual_state,slice_data_state,
|
mb_num_h,mb_num_v,i8x8,i4x4,i4x4_CbCr,CodedBlockPatternLuma,CodedBlockPatternChroma,
|
mb_num_h,mb_num_v,i8x8,i4x4,i4x4_CbCr,CodedBlockPatternLuma,CodedBlockPatternChroma,
|
LumaLevel_mbAddrB_dout,ChromaLevel_Cb_mbAddrB_dout,ChromaLevel_Cr_mbAddrB_dout,
|
LumaLevel_mbAddrB_dout,ChromaLevel_Cb_mbAddrB_dout,ChromaLevel_Cr_mbAddrB_dout,
|
end_of_one_residual_block,TotalCoeff,
|
end_of_one_residual_block,TotalCoeff,
|
|
|
nC,
|
nC,
|
Luma_8x8_AllZeroCoeff_mbAddrA,LumaLevel_mbAddrA,
|
Luma_8x8_AllZeroCoeff_mbAddrA,LumaLevel_mbAddrA,
|
LumaLevel_CurrMb0,LumaLevel_CurrMb1,LumaLevel_CurrMb2,LumaLevel_CurrMb3,
|
LumaLevel_CurrMb0,LumaLevel_CurrMb1,LumaLevel_CurrMb2,LumaLevel_CurrMb3,
|
LumaLevel_mbAddrB_cs_n,LumaLevel_mbAddrB_wr_n,LumaLevel_mbAddrB_rd_addr,
|
LumaLevel_mbAddrB_cs_n,LumaLevel_mbAddrB_wr_n,LumaLevel_mbAddrB_rd_addr,
|
LumaLevel_mbAddrB_wr_addr,LumaLevel_mbAddrB_din,
|
LumaLevel_mbAddrB_wr_addr,LumaLevel_mbAddrB_din,
|
ChromaLevel_Cb_mbAddrB_cs_n,ChromaLevel_Cb_mbAddrB_wr_n,ChromaLevel_Cb_mbAddrB_rd_addr,
|
ChromaLevel_Cb_mbAddrB_cs_n,ChromaLevel_Cb_mbAddrB_wr_n,ChromaLevel_Cb_mbAddrB_rd_addr,
|
ChromaLevel_Cb_mbAddrB_wr_addr,ChromaLevel_Cb_mbAddrB_din,
|
ChromaLevel_Cb_mbAddrB_wr_addr,ChromaLevel_Cb_mbAddrB_din,
|
ChromaLevel_Cr_mbAddrB_cs_n,ChromaLevel_Cr_mbAddrB_wr_n,ChromaLevel_Cr_mbAddrB_rd_addr,
|
ChromaLevel_Cr_mbAddrB_cs_n,ChromaLevel_Cr_mbAddrB_wr_n,ChromaLevel_Cr_mbAddrB_rd_addr,
|
ChromaLevel_Cr_mbAddrB_wr_addr,ChromaLevel_Cr_mbAddrB_din);
|
ChromaLevel_Cr_mbAddrB_wr_addr,ChromaLevel_Cr_mbAddrB_din);
|
|
|
input clk,reset_n;
|
input clk,reset_n;
|
input gclk_end_of_MB_DEC;
|
input gclk_end_of_MB_DEC;
|
input [3:0] cavlc_decoder_state;
|
input [3:0] cavlc_decoder_state;
|
input [3:0] residual_state;
|
input [3:0] residual_state;
|
input [3:0] slice_data_state;
|
input [3:0] slice_data_state;
|
input [3:0] mb_num_h;
|
input [3:0] mb_num_h;
|
input [3:0] mb_num_v;
|
input [3:0] mb_num_v;
|
input [1:0] i8x8,i4x4;
|
input [1:0] i8x8,i4x4;
|
input [1:0] i4x4_CbCr;
|
input [1:0] i4x4_CbCr;
|
input [3:0] CodedBlockPatternLuma;
|
input [3:0] CodedBlockPatternLuma;
|
input [1:0] CodedBlockPatternChroma;
|
input [1:0] CodedBlockPatternChroma;
|
input [19:0] LumaLevel_mbAddrB_dout;
|
input [19:0] LumaLevel_mbAddrB_dout;
|
input [9:0] ChromaLevel_Cb_mbAddrB_dout,ChromaLevel_Cr_mbAddrB_dout;
|
input [9:0] ChromaLevel_Cb_mbAddrB_dout,ChromaLevel_Cr_mbAddrB_dout;
|
input end_of_one_residual_block;
|
input end_of_one_residual_block;
|
input [4:0] TotalCoeff;
|
input [4:0] TotalCoeff;
|
|
|
output [4:0] nC;
|
output [4:0] nC;
|
output [1:0] Luma_8x8_AllZeroCoeff_mbAddrA;
|
output [1:0] Luma_8x8_AllZeroCoeff_mbAddrA;
|
output [19:0] LumaLevel_mbAddrA;
|
output [19:0] LumaLevel_mbAddrA;
|
output [19:0] LumaLevel_CurrMb0,LumaLevel_CurrMb1,LumaLevel_CurrMb2,LumaLevel_CurrMb3;
|
output [19:0] LumaLevel_CurrMb0,LumaLevel_CurrMb1,LumaLevel_CurrMb2,LumaLevel_CurrMb3;
|
output LumaLevel_mbAddrB_cs_n,LumaLevel_mbAddrB_wr_n;
|
output LumaLevel_mbAddrB_cs_n,LumaLevel_mbAddrB_wr_n;
|
output [3:0] LumaLevel_mbAddrB_rd_addr,LumaLevel_mbAddrB_wr_addr;
|
output [3:0] LumaLevel_mbAddrB_rd_addr,LumaLevel_mbAddrB_wr_addr;
|
output [19:0]LumaLevel_mbAddrB_din;
|
output [19:0]LumaLevel_mbAddrB_din;
|
output ChromaLevel_Cb_mbAddrB_cs_n,ChromaLevel_Cb_mbAddrB_wr_n;
|
output ChromaLevel_Cb_mbAddrB_cs_n,ChromaLevel_Cb_mbAddrB_wr_n;
|
output [3:0] ChromaLevel_Cb_mbAddrB_rd_addr,ChromaLevel_Cb_mbAddrB_wr_addr;
|
output [3:0] ChromaLevel_Cb_mbAddrB_rd_addr,ChromaLevel_Cb_mbAddrB_wr_addr;
|
output [9:0] ChromaLevel_Cb_mbAddrB_din;
|
output [9:0] ChromaLevel_Cb_mbAddrB_din;
|
output ChromaLevel_Cr_mbAddrB_cs_n,ChromaLevel_Cr_mbAddrB_wr_n;
|
output ChromaLevel_Cr_mbAddrB_cs_n,ChromaLevel_Cr_mbAddrB_wr_n;
|
output [3:0] ChromaLevel_Cr_mbAddrB_rd_addr,ChromaLevel_Cr_mbAddrB_wr_addr;
|
output [3:0] ChromaLevel_Cr_mbAddrB_rd_addr,ChromaLevel_Cr_mbAddrB_wr_addr;
|
output [9:0] ChromaLevel_Cr_mbAddrB_din;
|
output [9:0] ChromaLevel_Cr_mbAddrB_din;
|
|
|
reg [4:0] nC;
|
reg [4:0] nC;
|
reg LumaLevel_mbAddrB_cs_n,LumaLevel_mbAddrB_wr_n;
|
reg LumaLevel_mbAddrB_cs_n,LumaLevel_mbAddrB_wr_n;
|
reg [3:0] LumaLevel_mbAddrB_rd_addr,LumaLevel_mbAddrB_wr_addr;
|
reg [3:0] LumaLevel_mbAddrB_rd_addr,LumaLevel_mbAddrB_wr_addr;
|
reg [19:0]LumaLevel_mbAddrB_din;
|
reg [19:0]LumaLevel_mbAddrB_din;
|
reg ChromaLevel_Cb_mbAddrB_cs_n,ChromaLevel_Cb_mbAddrB_wr_n;
|
reg ChromaLevel_Cb_mbAddrB_cs_n,ChromaLevel_Cb_mbAddrB_wr_n;
|
reg [3:0] ChromaLevel_Cb_mbAddrB_rd_addr,ChromaLevel_Cb_mbAddrB_wr_addr;
|
reg [3:0] ChromaLevel_Cb_mbAddrB_rd_addr,ChromaLevel_Cb_mbAddrB_wr_addr;
|
reg [9:0] ChromaLevel_Cb_mbAddrB_din;
|
reg [9:0] ChromaLevel_Cb_mbAddrB_din;
|
reg ChromaLevel_Cr_mbAddrB_cs_n,ChromaLevel_Cr_mbAddrB_wr_n;
|
reg ChromaLevel_Cr_mbAddrB_cs_n,ChromaLevel_Cr_mbAddrB_wr_n;
|
reg [3:0] ChromaLevel_Cr_mbAddrB_rd_addr,ChromaLevel_Cr_mbAddrB_wr_addr;
|
reg [3:0] ChromaLevel_Cr_mbAddrB_rd_addr,ChromaLevel_Cr_mbAddrB_wr_addr;
|
reg [9:0] ChromaLevel_Cr_mbAddrB_din;
|
reg [9:0] ChromaLevel_Cr_mbAddrB_din;
|
|
|
reg nA_availability,nB_availability;
|
reg nA_availability,nB_availability;
|
reg nA_availability_reg,nB_availability_reg;
|
reg nA_availability_reg,nB_availability_reg;
|
reg [4:0] nA,nB;
|
reg [4:0] nA,nB;
|
reg [19:0] LumaLevel_mbAddrA;
|
reg [19:0] LumaLevel_mbAddrA;
|
reg [19:0] LumaLevel_CurrMb0,LumaLevel_CurrMb1,LumaLevel_CurrMb2,LumaLevel_CurrMb3;
|
reg [19:0] LumaLevel_CurrMb0,LumaLevel_CurrMb1,LumaLevel_CurrMb2,LumaLevel_CurrMb3;
|
reg [19:0] ChromaLevel_Cb_CurrMb;
|
reg [19:0] ChromaLevel_Cb_CurrMb;
|
reg [9:0] ChromaLevel_Cb_mbAddrA;
|
reg [9:0] ChromaLevel_Cb_mbAddrA;
|
reg [19:0] ChromaLevel_Cr_CurrMb;
|
reg [19:0] ChromaLevel_Cr_CurrMb;
|
reg [9:0] ChromaLevel_Cr_mbAddrA;
|
reg [9:0] ChromaLevel_Cr_mbAddrA;
|
reg [1:0] Luma_8x8_AllZeroCoeff_mbAddrA;
|
reg [1:0] Luma_8x8_AllZeroCoeff_mbAddrA;
|
reg [0:21] Luma_8x8_AllZeroCoeff_mbAddrB_reg;
|
reg [0:21] Luma_8x8_AllZeroCoeff_mbAddrB_reg;
|
reg [0:1] Luma_8x8_AllZeroCoeff_mbAddrB;
|
reg [0:1] Luma_8x8_AllZeroCoeff_mbAddrB;
|
reg Chroma_8x8_AllZeroCoeff_mbAddrA;
|
reg Chroma_8x8_AllZeroCoeff_mbAddrA;
|
reg [10:0] Chroma_8x8_AllZeroCoeff_mbAddrB_reg;
|
reg [10:0] Chroma_8x8_AllZeroCoeff_mbAddrB_reg;
|
reg Chroma_8x8_AllZeroCoeff_mbAddrB;
|
reg Chroma_8x8_AllZeroCoeff_mbAddrB;
|
|
|
always @ (mb_num_h or Luma_8x8_AllZeroCoeff_mbAddrB_reg)
|
always @ (mb_num_h or Luma_8x8_AllZeroCoeff_mbAddrB_reg)
|
case (mb_num_h)
|
case (mb_num_h)
|
0 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[0:1];
|
0 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[0:1];
|
1 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[2:3];
|
1 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[2:3];
|
2 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[4:5];
|
2 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[4:5];
|
3 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[6:7];
|
3 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[6:7];
|
4 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[8:9];
|
4 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[8:9];
|
5 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[10:11];
|
5 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[10:11];
|
6 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[12:13];
|
6 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[12:13];
|
7 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[14:15];
|
7 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[14:15];
|
8 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[16:17];
|
8 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[16:17];
|
9 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[18:19];
|
9 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[18:19];
|
10:Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[20:21];
|
10:Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[20:21];
|
default:Luma_8x8_AllZeroCoeff_mbAddrB <= 0;
|
default:Luma_8x8_AllZeroCoeff_mbAddrB <= 0;
|
endcase
|
endcase
|
always @ (mb_num_h or Chroma_8x8_AllZeroCoeff_mbAddrB_reg)
|
always @ (mb_num_h or Chroma_8x8_AllZeroCoeff_mbAddrB_reg)
|
case (mb_num_h)
|
case (mb_num_h)
|
0 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[0];
|
0 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[0];
|
1 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[1];
|
1 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[1];
|
2 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[2];
|
2 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[2];
|
3 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[3];
|
3 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[3];
|
4 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[4];
|
4 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[4];
|
5 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[5];
|
5 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[5];
|
6 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[6];
|
6 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[6];
|
7 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[7];
|
7 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[7];
|
8 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[8];
|
8 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[8];
|
9 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[9];
|
9 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[9];
|
10:Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[10];
|
10:Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[10];
|
default:Chroma_8x8_AllZeroCoeff_mbAddrB <= 0;
|
default:Chroma_8x8_AllZeroCoeff_mbAddrB <= 0;
|
endcase
|
endcase
|
//----------------------------
|
//----------------------------
|
//Update 8x8_AllZero registers
|
//Update 8x8_AllZero registers
|
//----------------------------
|
//----------------------------
|
always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
|
always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
Luma_8x8_AllZeroCoeff_mbAddrA <= 0;
|
Luma_8x8_AllZeroCoeff_mbAddrA <= 0;
|
else if (slice_data_state == `skip_run_duration)
|
else if (slice_data_state == `skip_run_duration)
|
Luma_8x8_AllZeroCoeff_mbAddrA <= 0;
|
Luma_8x8_AllZeroCoeff_mbAddrA <= 0;
|
else //update 8x8_AllZero reg when finished one MB residual parsing
|
else //update 8x8_AllZero reg when finished one MB residual parsing
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrA[0] <= (CodedBlockPatternLuma[1] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrA[0] <= (CodedBlockPatternLuma[1] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrA[1] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrA[1] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
|
always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg <= 0;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg <= 0;
|
else if (slice_data_state == `skip_run_duration)
|
else if (slice_data_state == `skip_run_duration)
|
case (mb_num_h)
|
case (mb_num_h)
|
0 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[0:1] <= 0;
|
0 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[0:1] <= 0;
|
1 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[2:3] <= 0;
|
1 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[2:3] <= 0;
|
2 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[4:5] <= 0;
|
2 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[4:5] <= 0;
|
3 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[6:7] <= 0;
|
3 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[6:7] <= 0;
|
4 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[8:9] <= 0;
|
4 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[8:9] <= 0;
|
5 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[10:11] <= 0;
|
5 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[10:11] <= 0;
|
6 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[12:13] <= 0;
|
6 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[12:13] <= 0;
|
7 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[14:15] <= 0;
|
7 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[14:15] <= 0;
|
8 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[16:17] <= 0;
|
8 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[16:17] <= 0;
|
9 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[18:19] <= 0;
|
9 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[18:19] <= 0;
|
10:Luma_8x8_AllZeroCoeff_mbAddrB_reg[20:21] <= 0;
|
10:Luma_8x8_AllZeroCoeff_mbAddrB_reg[20:21] <= 0;
|
endcase
|
endcase
|
else //update 8x8_AllZero reg when finished one MB residual parsing
|
else //update 8x8_AllZero reg when finished one MB residual parsing
|
case (mb_num_h)
|
case (mb_num_h)
|
0:
|
0:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [0] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [0] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [1] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [1] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
1:
|
1:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [2] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [2] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [3] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [3] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
2:
|
2:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [4] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [4] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [5] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [5] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
3:
|
3:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [6] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [6] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [7] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [7] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
4:
|
4:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [8] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [8] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [9] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [9] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
5:
|
5:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [10] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [10] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [11] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [11] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
6:
|
6:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [12] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [12] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [13] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [13] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
7:
|
7:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [14] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [14] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [15] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [15] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
8:
|
8:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [16] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [16] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [17] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [17] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
9:
|
9:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [18] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [18] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [19] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [19] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
10:
|
10:
|
begin
|
begin
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [20] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [20] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [21] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
Luma_8x8_AllZeroCoeff_mbAddrB_reg [21] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
|
end
|
end
|
endcase
|
endcase
|
always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
|
always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
Chroma_8x8_AllZeroCoeff_mbAddrA <= 0;
|
Chroma_8x8_AllZeroCoeff_mbAddrA <= 0;
|
else if (slice_data_state == `skip_run_duration)
|
else if (slice_data_state == `skip_run_duration)
|
Chroma_8x8_AllZeroCoeff_mbAddrA <= 0;
|
Chroma_8x8_AllZeroCoeff_mbAddrA <= 0;
|
else //update 8x8_AllZero reg when finished one MB residual parsing
|
else //update 8x8_AllZero reg when finished one MB residual parsing
|
Chroma_8x8_AllZeroCoeff_mbAddrA <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
Chroma_8x8_AllZeroCoeff_mbAddrA <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
|
always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
Chroma_8x8_AllZeroCoeff_mbAddrB_reg <= 0;
|
Chroma_8x8_AllZeroCoeff_mbAddrB_reg <= 0;
|
else if (slice_data_state == `skip_run_duration)
|
else if (slice_data_state == `skip_run_duration)
|
case (mb_num_h)
|
case (mb_num_h)
|
0 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[0] <= 0;
|
0 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[0] <= 0;
|
1 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[1] <= 0;
|
1 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[1] <= 0;
|
2 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[2] <= 0;
|
2 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[2] <= 0;
|
3 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[3] <= 0;
|
3 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[3] <= 0;
|
4 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[4] <= 0;
|
4 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[4] <= 0;
|
5 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[5] <= 0;
|
5 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[5] <= 0;
|
6 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[6] <= 0;
|
6 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[6] <= 0;
|
7 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[7] <= 0;
|
7 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[7] <= 0;
|
8 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[8] <= 0;
|
8 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[8] <= 0;
|
9 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[9] <= 0;
|
9 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[9] <= 0;
|
10:Chroma_8x8_AllZeroCoeff_mbAddrB_reg[10] <= 0;
|
10:Chroma_8x8_AllZeroCoeff_mbAddrB_reg[10] <= 0;
|
endcase
|
endcase
|
else if (mb_num_v != 8)
|
else if (mb_num_v != 8)
|
case (mb_num_h)
|
case (mb_num_h)
|
0 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[0] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
0 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[0] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
1 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[1] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
1 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[1] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
2 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[2] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
2 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[2] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
3 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[3] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
3 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[3] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
4 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[4] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
4 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[4] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
5 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[5] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
5 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[5] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
6 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[6] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
6 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[6] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
7 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[7] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
7 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[7] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
8 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[8] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
8 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[8] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
9 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[9] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
9 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[9] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
10:Chroma_8x8_AllZeroCoeff_mbAddrB_reg[10] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
10:Chroma_8x8_AllZeroCoeff_mbAddrB_reg[10] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
endcase
|
endcase
|
//-------------------
|
//-------------------
|
//nA_availability
|
//nA_availability
|
//-------------------
|
//-------------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
nA_availability_reg <= 0;
|
nA_availability_reg <= 0;
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
nA_availability_reg <= nA_availability;
|
nA_availability_reg <= nA_availability;
|
always @ (reset_n or cavlc_decoder_state or residual_state or mb_num_h or i8x8 or i4x4 or i4x4_CbCr or nA_availability_reg)
|
always @ (reset_n or cavlc_decoder_state or residual_state or mb_num_h or i8x8 or i4x4 or i4x4_CbCr or nA_availability_reg)
|
if (reset_n == 1'b0)
|
if (reset_n == 1'b0)
|
nA_availability <= 1'b0;
|
nA_availability <= 1'b0;
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
case (residual_state)
|
case (residual_state)
|
//luma
|
//luma
|
`Intra16x16DCLevel_s:nA_availability <= (mb_num_h == 0)? 1'b0:1'b1;
|
`Intra16x16DCLevel_s:nA_availability <= (mb_num_h == 0)? 1'b0:1'b1;
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
if ((i8x8 == 0 || i8x8 == 2) && (i4x4 == 0 || i4x4 == 2))
|
if ((i8x8 == 0 || i8x8 == 2) && (i4x4 == 0 || i4x4 == 2))
|
nA_availability <= (mb_num_h == 0)? 1'b0:1'b1;
|
nA_availability <= (mb_num_h == 0)? 1'b0:1'b1;
|
else
|
else
|
nA_availability <= 1'b1;
|
nA_availability <= 1'b1;
|
//chroma
|
//chroma
|
`ChromaACLevel_Cb_s,`ChromaACLevel_Cr_s:
|
`ChromaACLevel_Cb_s,`ChromaACLevel_Cr_s:
|
nA_availability <= (mb_num_h == 0 && i4x4_CbCr[0] == 0)? 1'b0:1'b1;
|
nA_availability <= (mb_num_h == 0 && i4x4_CbCr[0] == 0)? 1'b0:1'b1;
|
default:nA_availability <= 1'b0;
|
default:nA_availability <= 1'b0;
|
endcase
|
endcase
|
else
|
else
|
nA_availability <= nA_availability_reg;
|
nA_availability <= nA_availability_reg;
|
//-------------------
|
//-------------------
|
//nB_availability
|
//nB_availability
|
//-------------------
|
//-------------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
nB_availability_reg <= 0;
|
nB_availability_reg <= 0;
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
nB_availability_reg <= nB_availability;
|
nB_availability_reg <= nB_availability;
|
always @ (reset_n or cavlc_decoder_state or residual_state or mb_num_v or i8x8 or i4x4 or i4x4_CbCr
|
always @ (reset_n or cavlc_decoder_state or residual_state or mb_num_v or i8x8 or i4x4 or i4x4_CbCr
|
or nB_availability_reg)
|
or nB_availability_reg)
|
if (reset_n == 1'b0)
|
if (reset_n == 1'b0)
|
nB_availability <= 1'b0;
|
nB_availability <= 1'b0;
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
case (residual_state)
|
case (residual_state)
|
//luma
|
//luma
|
`Intra16x16DCLevel_s:nB_availability <= (mb_num_v == 0)? 1'b0:1'b1;
|
`Intra16x16DCLevel_s:nB_availability <= (mb_num_v == 0)? 1'b0:1'b1;
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
if ((i8x8 == 0 || i8x8 == 1) && (i4x4 == 0 || i4x4 == 1))
|
if ((i8x8 == 0 || i8x8 == 1) && (i4x4 == 0 || i4x4 == 1))
|
nB_availability <= (mb_num_v == 0)? 1'b0:1'b1;
|
nB_availability <= (mb_num_v == 0)? 1'b0:1'b1;
|
else
|
else
|
nB_availability <= 1'b1;
|
nB_availability <= 1'b1;
|
//chroma
|
//chroma
|
`ChromaACLevel_Cb_s,`ChromaACLevel_Cr_s:
|
`ChromaACLevel_Cb_s,`ChromaACLevel_Cr_s:
|
nB_availability <= (mb_num_v == 0 && i4x4_CbCr[1] == 0)? 1'b0:1'b1;
|
nB_availability <= (mb_num_v == 0 && i4x4_CbCr[1] == 0)? 1'b0:1'b1;
|
default:nB_availability <= 1'b0;
|
default:nB_availability <= 1'b0;
|
endcase
|
endcase
|
else
|
else
|
nB_availability <= nB_availability_reg;
|
nB_availability <= nB_availability_reg;
|
//------------
|
//------------
|
//Derive nA
|
//Derive nA
|
//------------
|
//------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
nA <= 0;
|
nA <= 0;
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nA_availability == 1)
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nA_availability == 1)
|
case (residual_state)
|
case (residual_state)
|
//luma
|
//luma
|
`Intra16x16DCLevel_s:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[0] == 0)? 0:LumaLevel_mbAddrA[4:0];
|
`Intra16x16DCLevel_s:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[0] == 0)? 0:LumaLevel_mbAddrA[4:0];
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
case (i8x8)
|
case (i8x8)
|
0:
|
0:
|
case (i4x4)
|
case (i4x4)
|
0:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[0] == 0)? 0:LumaLevel_mbAddrA[4:0];
|
0:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[0] == 0)? 0:LumaLevel_mbAddrA[4:0];
|
1:nA <= LumaLevel_CurrMb0[4:0];
|
1:nA <= LumaLevel_CurrMb0[4:0];
|
2:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[0] == 0)? 0:LumaLevel_mbAddrA[9:5];
|
2:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[0] == 0)? 0:LumaLevel_mbAddrA[9:5];
|
3:nA <= LumaLevel_CurrMb0[14:10];
|
3:nA <= LumaLevel_CurrMb0[14:10];
|
endcase
|
endcase
|
1:
|
1:
|
case (i4x4)
|
case (i4x4)
|
0:nA <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[9:5];
|
0:nA <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[9:5];
|
1:nA <= LumaLevel_CurrMb1[4:0];
|
1:nA <= LumaLevel_CurrMb1[4:0];
|
2:nA <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[19:15];
|
2:nA <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[19:15];
|
3:nA <= LumaLevel_CurrMb1[14:10];
|
3:nA <= LumaLevel_CurrMb1[14:10];
|
endcase
|
endcase
|
2:
|
2:
|
case (i4x4)
|
case (i4x4)
|
0:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[1] == 0)? 0:LumaLevel_mbAddrA[14:10];
|
0:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[1] == 0)? 0:LumaLevel_mbAddrA[14:10];
|
1:nA <= LumaLevel_CurrMb2[4:0];
|
1:nA <= LumaLevel_CurrMb2[4:0];
|
2:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[1] == 0)? 0:LumaLevel_mbAddrA[19:15];
|
2:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[1] == 0)? 0:LumaLevel_mbAddrA[19:15];
|
3:nA <= LumaLevel_CurrMb2[14:10];
|
3:nA <= LumaLevel_CurrMb2[14:10];
|
endcase
|
endcase
|
3:
|
3:
|
case (i4x4)
|
case (i4x4)
|
0:nA <= (CodedBlockPatternLuma[2] == 0)? 0:LumaLevel_CurrMb2[9:5];
|
0:nA <= (CodedBlockPatternLuma[2] == 0)? 0:LumaLevel_CurrMb2[9:5];
|
1:nA <= LumaLevel_CurrMb3[4:0];
|
1:nA <= LumaLevel_CurrMb3[4:0];
|
2:nA <= (CodedBlockPatternLuma[2] == 0)? 0:LumaLevel_CurrMb2[19:15];
|
2:nA <= (CodedBlockPatternLuma[2] == 0)? 0:LumaLevel_CurrMb2[19:15];
|
3:nA <= LumaLevel_CurrMb3[14:10];
|
3:nA <= LumaLevel_CurrMb3[14:10];
|
endcase
|
endcase
|
endcase
|
endcase
|
//chroma
|
//chroma
|
`ChromaACLevel_Cb_s:
|
`ChromaACLevel_Cb_s:
|
case (i4x4_CbCr)
|
case (i4x4_CbCr)
|
2'b00:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cb_mbAddrA[4:0];
|
2'b00:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cb_mbAddrA[4:0];
|
2'b10:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cb_mbAddrA[9:5];
|
2'b10:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cb_mbAddrA[9:5];
|
2'b01:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cb_CurrMb[4:0];
|
2'b01:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cb_CurrMb[4:0];
|
2'b11:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cb_CurrMb[14:10];
|
2'b11:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cb_CurrMb[14:10];
|
endcase
|
endcase
|
`ChromaACLevel_Cr_s:
|
`ChromaACLevel_Cr_s:
|
case (i4x4_CbCr)
|
case (i4x4_CbCr)
|
2'b00:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cr_mbAddrA[4:0];
|
2'b00:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cr_mbAddrA[4:0];
|
2'b10:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cr_mbAddrA[9:5];
|
2'b10:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cr_mbAddrA[9:5];
|
2'b01:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cr_CurrMb[4:0];
|
2'b01:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cr_CurrMb[4:0];
|
2'b11:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cr_CurrMb[14:10];
|
2'b11:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cr_CurrMb[14:10];
|
endcase
|
endcase
|
endcase
|
endcase
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nA_availability == 0)
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nA_availability == 0)
|
nA <= 0;
|
nA <= 0;
|
//------------
|
//------------
|
//Derive nB
|
//Derive nB
|
//------------
|
//------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
nB <= 0;
|
nB <= 0;
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1)
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1)
|
case (residual_state)
|
case (residual_state)
|
`Intra16x16DCLevel_s:
|
`Intra16x16DCLevel_s:
|
nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)? 0:LumaLevel_mbAddrB_dout[19:15];
|
nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)? 0:LumaLevel_mbAddrB_dout[19:15];
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
case (i8x8)
|
case (i8x8)
|
0:
|
0:
|
case (i4x4)
|
case (i4x4)
|
0:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)? 0:LumaLevel_mbAddrB_dout[19:15];
|
0:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)? 0:LumaLevel_mbAddrB_dout[19:15];
|
1:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)? 0:LumaLevel_mbAddrB_dout[14:10];
|
1:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)? 0:LumaLevel_mbAddrB_dout[14:10];
|
2:nB <= LumaLevel_CurrMb0[4:0];
|
2:nB <= LumaLevel_CurrMb0[4:0];
|
3:nB <= LumaLevel_CurrMb0[9:5];
|
3:nB <= LumaLevel_CurrMb0[9:5];
|
endcase
|
endcase
|
1:
|
1:
|
case (i4x4)
|
case (i4x4)
|
0:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[1] == 0)? 0:LumaLevel_mbAddrB_dout[9:5];
|
0:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[1] == 0)? 0:LumaLevel_mbAddrB_dout[9:5];
|
1:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[1] == 0)? 0:LumaLevel_mbAddrB_dout[4:0];
|
1:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[1] == 0)? 0:LumaLevel_mbAddrB_dout[4:0];
|
2:nB <= LumaLevel_CurrMb1[4:0];
|
2:nB <= LumaLevel_CurrMb1[4:0];
|
3:nB <= LumaLevel_CurrMb1[9:5];
|
3:nB <= LumaLevel_CurrMb1[9:5];
|
endcase
|
endcase
|
2:
|
2:
|
case (i4x4)
|
case (i4x4)
|
0:nB <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[14:10];
|
0:nB <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[14:10];
|
1:nB <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[19:15];
|
1:nB <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[19:15];
|
2:nB <= LumaLevel_CurrMb2[4:0];
|
2:nB <= LumaLevel_CurrMb2[4:0];
|
3:nB <= LumaLevel_CurrMb2[9:5];
|
3:nB <= LumaLevel_CurrMb2[9:5];
|
endcase
|
endcase
|
3:
|
3:
|
case (i4x4)
|
case (i4x4)
|
0:nB <= (CodedBlockPatternLuma[1] == 0)? 0:LumaLevel_CurrMb1[14:10];
|
0:nB <= (CodedBlockPatternLuma[1] == 0)? 0:LumaLevel_CurrMb1[14:10];
|
1:nB <= (CodedBlockPatternLuma[1] == 0)? 0:LumaLevel_CurrMb1[19:15];
|
1:nB <= (CodedBlockPatternLuma[1] == 0)? 0:LumaLevel_CurrMb1[19:15];
|
2:nB <= LumaLevel_CurrMb3[4:0];
|
2:nB <= LumaLevel_CurrMb3[4:0];
|
3:nB <= LumaLevel_CurrMb3[9:5];
|
3:nB <= LumaLevel_CurrMb3[9:5];
|
endcase
|
endcase
|
endcase
|
endcase
|
`ChromaACLevel_Cb_s:
|
`ChromaACLevel_Cb_s:
|
case (i4x4_CbCr)
|
case (i4x4_CbCr)
|
0:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cb_mbAddrB_dout[9:5];
|
0:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cb_mbAddrB_dout[9:5];
|
1:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cb_mbAddrB_dout[4:0];
|
1:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cb_mbAddrB_dout[4:0];
|
2:nB <= ChromaLevel_Cb_CurrMb[4:0];
|
2:nB <= ChromaLevel_Cb_CurrMb[4:0];
|
3:nB <= ChromaLevel_Cb_CurrMb[9:5];
|
3:nB <= ChromaLevel_Cb_CurrMb[9:5];
|
endcase
|
endcase
|
`ChromaACLevel_Cr_s:
|
`ChromaACLevel_Cr_s:
|
case (i4x4_CbCr)
|
case (i4x4_CbCr)
|
0:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cr_mbAddrB_dout[9:5];
|
0:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cr_mbAddrB_dout[9:5];
|
1:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cr_mbAddrB_dout[4:0];
|
1:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cr_mbAddrB_dout[4:0];
|
2:nB <= ChromaLevel_Cr_CurrMb[4:0];
|
2:nB <= ChromaLevel_Cr_CurrMb[4:0];
|
3:nB <= ChromaLevel_Cr_CurrMb[9:5];
|
3:nB <= ChromaLevel_Cr_CurrMb[9:5];
|
endcase
|
endcase
|
default: nB <= 0;
|
default: nB <= 0;
|
endcase
|
endcase
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 0)
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 0)
|
nB <= 0;
|
nB <= 0;
|
//------------
|
//------------
|
//Derive nC
|
//Derive nC
|
//------------
|
//------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
nC <= 0;
|
nC <= 0;
|
else if (cavlc_decoder_state == `nC_decoding_s)
|
else if (cavlc_decoder_state == `nC_decoding_s)
|
begin
|
begin
|
if (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)
|
if (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)
|
nC <= 5'b11111;
|
nC <= 5'b11111;
|
else if (nA_availability == 1 && nB_availability == 1)
|
else if (nA_availability == 1 && nB_availability == 1)
|
nC <= (nA + nB + 1) >> 1;
|
nC <= (nA + nB + 1) >> 1;
|
else
|
else
|
nC <= nA + nB;
|
nC <= nA + nB;
|
end
|
end
|
//-----------------------
|
//-----------------------
|
//LumaLevel_CurrMb write
|
//LumaLevel_CurrMb write
|
//-----------------------
|
//-----------------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
begin
|
begin
|
LumaLevel_CurrMb0 <= 0; LumaLevel_CurrMb1 <= 0;
|
LumaLevel_CurrMb0 <= 0; LumaLevel_CurrMb1 <= 0;
|
LumaLevel_CurrMb2 <= 0; LumaLevel_CurrMb3 <= 0;
|
LumaLevel_CurrMb2 <= 0; LumaLevel_CurrMb3 <= 0;
|
end
|
end
|
else if (end_of_one_residual_block == 1 && (residual_state == `Intra16x16ACLevel_s ||
|
else if (end_of_one_residual_block == 1 && (residual_state == `Intra16x16ACLevel_s ||
|
residual_state == `LumaLevel_s))
|
residual_state == `LumaLevel_s))
|
case (i8x8)
|
case (i8x8)
|
0:
|
0:
|
case (i4x4)
|
case (i4x4)
|
0:LumaLevel_CurrMb0[4:0] <= TotalCoeff;
|
0:LumaLevel_CurrMb0[4:0] <= TotalCoeff;
|
1:LumaLevel_CurrMb0[9:5] <= TotalCoeff;
|
1:LumaLevel_CurrMb0[9:5] <= TotalCoeff;
|
2:LumaLevel_CurrMb0[14:10] <= TotalCoeff;
|
2:LumaLevel_CurrMb0[14:10] <= TotalCoeff;
|
3:LumaLevel_CurrMb0[19:15] <= TotalCoeff;
|
3:LumaLevel_CurrMb0[19:15] <= TotalCoeff;
|
endcase
|
endcase
|
1:
|
1:
|
case (i4x4)
|
case (i4x4)
|
0:LumaLevel_CurrMb1[4:0] <= TotalCoeff;
|
0:LumaLevel_CurrMb1[4:0] <= TotalCoeff;
|
1:LumaLevel_CurrMb1[9:5] <= TotalCoeff;
|
1:LumaLevel_CurrMb1[9:5] <= TotalCoeff;
|
2:LumaLevel_CurrMb1[14:10] <= TotalCoeff;
|
2:LumaLevel_CurrMb1[14:10] <= TotalCoeff;
|
3:LumaLevel_CurrMb1[19:15] <= TotalCoeff;
|
3:LumaLevel_CurrMb1[19:15] <= TotalCoeff;
|
endcase
|
endcase
|
2:
|
2:
|
case (i4x4)
|
case (i4x4)
|
0:LumaLevel_CurrMb2[4:0] <= TotalCoeff;
|
0:LumaLevel_CurrMb2[4:0] <= TotalCoeff;
|
1:LumaLevel_CurrMb2[9:5] <= TotalCoeff;
|
1:LumaLevel_CurrMb2[9:5] <= TotalCoeff;
|
2:LumaLevel_CurrMb2[14:10] <= TotalCoeff;
|
2:LumaLevel_CurrMb2[14:10] <= TotalCoeff;
|
3:LumaLevel_CurrMb2[19:15] <= TotalCoeff;
|
3:LumaLevel_CurrMb2[19:15] <= TotalCoeff;
|
endcase
|
endcase
|
3:
|
3:
|
case (i4x4)
|
case (i4x4)
|
0:LumaLevel_CurrMb3[4:0] <= TotalCoeff;
|
0:LumaLevel_CurrMb3[4:0] <= TotalCoeff;
|
1:LumaLevel_CurrMb3[9:5] <= TotalCoeff;
|
1:LumaLevel_CurrMb3[9:5] <= TotalCoeff;
|
2:LumaLevel_CurrMb3[14:10] <= TotalCoeff;
|
2:LumaLevel_CurrMb3[14:10] <= TotalCoeff;
|
3:LumaLevel_CurrMb3[19:15] <= TotalCoeff;
|
3:LumaLevel_CurrMb3[19:15] <= TotalCoeff;
|
endcase
|
endcase
|
endcase
|
endcase
|
//---------------------------
|
//---------------------------
|
//ChromaLevel_Cb_CurrMb write
|
//ChromaLevel_Cb_CurrMb write
|
//---------------------------
|
//---------------------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
ChromaLevel_Cb_CurrMb <= 0;
|
ChromaLevel_Cb_CurrMb <= 0;
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cb_s)
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cb_s)
|
case (i4x4_CbCr)
|
case (i4x4_CbCr)
|
0:ChromaLevel_Cb_CurrMb[4:0] <= TotalCoeff;
|
0:ChromaLevel_Cb_CurrMb[4:0] <= TotalCoeff;
|
1:ChromaLevel_Cb_CurrMb[9:5] <= TotalCoeff;
|
1:ChromaLevel_Cb_CurrMb[9:5] <= TotalCoeff;
|
2:ChromaLevel_Cb_CurrMb[14:10] <= TotalCoeff;
|
2:ChromaLevel_Cb_CurrMb[14:10] <= TotalCoeff;
|
3:ChromaLevel_Cb_CurrMb[19:15] <= TotalCoeff;
|
3:ChromaLevel_Cb_CurrMb[19:15] <= TotalCoeff;
|
endcase
|
endcase
|
//---------------------------
|
//---------------------------
|
//ChromaLevel_Cr_CurrMb write
|
//ChromaLevel_Cr_CurrMb write
|
//---------------------------
|
//---------------------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
ChromaLevel_Cr_CurrMb <= 0;
|
ChromaLevel_Cr_CurrMb <= 0;
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cr_s)
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cr_s)
|
case (i4x4_CbCr)
|
case (i4x4_CbCr)
|
0:ChromaLevel_Cr_CurrMb[4:0] <= TotalCoeff;
|
0:ChromaLevel_Cr_CurrMb[4:0] <= TotalCoeff;
|
1:ChromaLevel_Cr_CurrMb[9:5] <= TotalCoeff;
|
1:ChromaLevel_Cr_CurrMb[9:5] <= TotalCoeff;
|
2:ChromaLevel_Cr_CurrMb[14:10] <= TotalCoeff;
|
2:ChromaLevel_Cr_CurrMb[14:10] <= TotalCoeff;
|
3:ChromaLevel_Cr_CurrMb[19:15] <= TotalCoeff;
|
3:ChromaLevel_Cr_CurrMb[19:15] <= TotalCoeff;
|
endcase
|
endcase
|
//-----------------------
|
//-----------------------
|
//LumaLevel_mbAddrA write
|
//LumaLevel_mbAddrA write
|
//-----------------------
|
//-----------------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
LumaLevel_mbAddrA <= 0;
|
LumaLevel_mbAddrA <= 0;
|
else if (end_of_one_residual_block == 1 && (residual_state == `Intra16x16ACLevel_s || residual_state == `LumaLevel_s) && mb_num_h != 10)
|
else if (end_of_one_residual_block == 1 && (residual_state == `Intra16x16ACLevel_s || residual_state == `LumaLevel_s) && mb_num_h != 10)
|
case (i8x8)
|
case (i8x8)
|
1:
|
1:
|
case (i4x4)
|
case (i4x4)
|
1:LumaLevel_mbAddrA[4:0] <= TotalCoeff;
|
1:LumaLevel_mbAddrA[4:0] <= TotalCoeff;
|
3:LumaLevel_mbAddrA[9:5] <= TotalCoeff;
|
3:LumaLevel_mbAddrA[9:5] <= TotalCoeff;
|
endcase
|
endcase
|
3:
|
3:
|
case (i4x4)
|
case (i4x4)
|
1:LumaLevel_mbAddrA[14:10] <= TotalCoeff;
|
1:LumaLevel_mbAddrA[14:10] <= TotalCoeff;
|
3:LumaLevel_mbAddrA[19:15] <= TotalCoeff;
|
3:LumaLevel_mbAddrA[19:15] <= TotalCoeff;
|
endcase
|
endcase
|
endcase
|
endcase
|
//----------------------------
|
//----------------------------
|
//ChromaLevel_Cb_mbAddrA write
|
//ChromaLevel_Cb_mbAddrA write
|
//----------------------------
|
//----------------------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
ChromaLevel_Cb_mbAddrA <= 0;
|
ChromaLevel_Cb_mbAddrA <= 0;
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cb_s && mb_num_h != 10)
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cb_s && mb_num_h != 10)
|
begin
|
begin
|
if (i4x4_CbCr == 1)
|
if (i4x4_CbCr == 1)
|
ChromaLevel_Cb_mbAddrA[4:0] <= TotalCoeff;
|
ChromaLevel_Cb_mbAddrA[4:0] <= TotalCoeff;
|
if (i4x4_CbCr == 3)
|
if (i4x4_CbCr == 3)
|
ChromaLevel_Cb_mbAddrA[9:5] <= TotalCoeff;
|
ChromaLevel_Cb_mbAddrA[9:5] <= TotalCoeff;
|
end
|
end
|
//----------------------------
|
//----------------------------
|
//ChromaLevel_Cr_mbAddrA write
|
//ChromaLevel_Cr_mbAddrA write
|
//----------------------------
|
//----------------------------
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
ChromaLevel_Cr_mbAddrA <= 0;
|
ChromaLevel_Cr_mbAddrA <= 0;
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cr_s && mb_num_h != 10)
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cr_s && mb_num_h != 10)
|
begin
|
begin
|
if (i4x4_CbCr == 1)
|
if (i4x4_CbCr == 1)
|
ChromaLevel_Cr_mbAddrA[4:0] <= TotalCoeff;
|
ChromaLevel_Cr_mbAddrA[4:0] <= TotalCoeff;
|
if (i4x4_CbCr == 3)
|
if (i4x4_CbCr == 3)
|
ChromaLevel_Cr_mbAddrA[9:5] <= TotalCoeff;
|
ChromaLevel_Cr_mbAddrA[9:5] <= TotalCoeff;
|
end
|
end
|
//------------------------------
|
//------------------------------
|
//LumaLevel_mbAddrB read & write
|
//LumaLevel_mbAddrB read & write
|
//------------------------------
|
//------------------------------
|
always @ (reset_n or cavlc_decoder_state or residual_state or nB_availability or
|
always @ (reset_n or cavlc_decoder_state or residual_state or nB_availability or
|
Luma_8x8_AllZeroCoeff_mbAddrB or i8x8 or i4x4 or end_of_one_residual_block or
|
Luma_8x8_AllZeroCoeff_mbAddrB or i8x8 or i4x4 or end_of_one_residual_block or
|
mb_num_v or mb_num_h or CodedBlockPatternLuma or LumaLevel_CurrMb2 or LumaLevel_CurrMb3 or TotalCoeff)
|
mb_num_v or mb_num_h or CodedBlockPatternLuma or LumaLevel_CurrMb2 or LumaLevel_CurrMb3 or TotalCoeff)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
//--read--
|
//--read--
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1) //read
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1) //read
|
case (residual_state)
|
case (residual_state)
|
`Intra16x16DCLevel_s:
|
`Intra16x16DCLevel_s:
|
if (Luma_8x8_AllZeroCoeff_mbAddrB == 0)
|
if (Luma_8x8_AllZeroCoeff_mbAddrB == 0)
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= mb_num_h; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= mb_num_h; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
case (i8x8)
|
case (i8x8)
|
0:
|
0:
|
if (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)
|
if (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= mb_num_h; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= mb_num_h; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
1:
|
1:
|
if (Luma_8x8_AllZeroCoeff_mbAddrB[1] == 0)
|
if (Luma_8x8_AllZeroCoeff_mbAddrB[1] == 0)
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= mb_num_h; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= mb_num_h; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
endcase
|
endcase
|
default:
|
default:
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
endcase
|
endcase
|
//--write--
|
//--write--
|
else if ((residual_state == `Intra16x16ACLevel_s || residual_state == `LumaLevel_s) && end_of_one_residual_block == 1 && mb_num_v != 8)
|
else if ((residual_state == `Intra16x16ACLevel_s || residual_state == `LumaLevel_s) && end_of_one_residual_block == 1 && mb_num_v != 8)
|
case (CodedBlockPatternLuma[3:2])
|
case (CodedBlockPatternLuma[3:2])
|
2'b00:
|
2'b00:
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
2'b10,2'b11:
|
2'b10,2'b11:
|
if (i8x8 == 3 && i4x4 == 3)
|
if (i8x8 == 3 && i4x4 == 3)
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 0;
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= mb_num_h;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= mb_num_h;
|
LumaLevel_mbAddrB_din <= (CodedBlockPatternLuma[3:2] == 2'b10)?
|
LumaLevel_mbAddrB_din <= (CodedBlockPatternLuma[3:2] == 2'b10)?
|
{10'b0, LumaLevel_CurrMb3[14:10],TotalCoeff}:
|
{10'b0, LumaLevel_CurrMb3[14:10],TotalCoeff}:
|
{LumaLevel_CurrMb2[14:10],LumaLevel_CurrMb2[19:15],LumaLevel_CurrMb3[14:10],TotalCoeff};
|
{LumaLevel_CurrMb2[14:10],LumaLevel_CurrMb2[19:15],LumaLevel_CurrMb3[14:10],TotalCoeff};
|
end
|
end
|
else
|
else
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
2'b01:
|
2'b01:
|
if (i8x8 == 2 && i4x4 == 3)
|
if (i8x8 == 2 && i4x4 == 3)
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 0;
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= mb_num_h;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= mb_num_h;
|
LumaLevel_mbAddrB_din <= {LumaLevel_CurrMb2[14:10],TotalCoeff,10'b0};
|
LumaLevel_mbAddrB_din <= {LumaLevel_CurrMb2[14:10],TotalCoeff,10'b0};
|
end
|
end
|
else
|
else
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
LumaLevel_mbAddrB_din <= 0;
|
end
|
end
|
//-----------------------------------
|
//-----------------------------------
|
//ChromaLevel_Cb_mbAddrB read & write
|
//ChromaLevel_Cb_mbAddrB read & write
|
//-----------------------------------
|
//-----------------------------------
|
always @ (reset_n or cavlc_decoder_state or residual_state or nB_availability or i4x4_CbCr or ChromaLevel_Cb_CurrMb
|
always @ (reset_n or cavlc_decoder_state or residual_state or nB_availability or i4x4_CbCr or ChromaLevel_Cb_CurrMb
|
or Chroma_8x8_AllZeroCoeff_mbAddrB or mb_num_h or mb_num_v or TotalCoeff or end_of_one_residual_block)
|
or Chroma_8x8_AllZeroCoeff_mbAddrB or mb_num_h or mb_num_v or TotalCoeff or end_of_one_residual_block)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
begin
|
begin
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
end
|
end
|
//--read--
|
//--read--
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1 &&
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1 &&
|
residual_state == `ChromaACLevel_Cb_s)
|
residual_state == `ChromaACLevel_Cb_s)
|
begin
|
begin
|
if (i4x4_CbCr[1] == 0 && Chroma_8x8_AllZeroCoeff_mbAddrB == 1)
|
if (i4x4_CbCr[1] == 0 && Chroma_8x8_AllZeroCoeff_mbAddrB == 1)
|
begin
|
begin
|
ChromaLevel_Cb_mbAddrB_cs_n <= 0; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_cs_n <= 0; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= mb_num_h; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= mb_num_h; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
end
|
end
|
end
|
end
|
//--write--
|
//--write--
|
else if (residual_state == `ChromaACLevel_Cb_s && end_of_one_residual_block == 1 && mb_num_v != 8)
|
else if (residual_state == `ChromaACLevel_Cb_s && end_of_one_residual_block == 1 && mb_num_v != 8)
|
begin
|
begin
|
if (i4x4_CbCr == 3)
|
if (i4x4_CbCr == 3)
|
begin
|
begin
|
ChromaLevel_Cb_mbAddrB_cs_n <= 0; ChromaLevel_Cb_mbAddrB_wr_n <= 0;
|
ChromaLevel_Cb_mbAddrB_cs_n <= 0; ChromaLevel_Cb_mbAddrB_wr_n <= 0;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= mb_num_h;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= mb_num_h;
|
ChromaLevel_Cb_mbAddrB_din <= {ChromaLevel_Cb_CurrMb[14:10],TotalCoeff};
|
ChromaLevel_Cb_mbAddrB_din <= {ChromaLevel_Cb_CurrMb[14:10],TotalCoeff};
|
end
|
end
|
else
|
else
|
begin
|
begin
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
end
|
end
|
end
|
end
|
else
|
else
|
begin
|
begin
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
end
|
end
|
//-----------------------------------
|
//-----------------------------------
|
//ChromaLevel_Cr_mbAddrB read & write
|
//ChromaLevel_Cr_mbAddrB read & write
|
//-----------------------------------
|
//-----------------------------------
|
always @ (reset_n or cavlc_decoder_state or residual_state or nB_availability or i4x4_CbCr
|
always @ (reset_n or cavlc_decoder_state or residual_state or nB_availability or i4x4_CbCr
|
or ChromaLevel_Cr_CurrMb or Chroma_8x8_AllZeroCoeff_mbAddrB or mb_num_h or mb_num_v or TotalCoeff
|
or ChromaLevel_Cr_CurrMb or Chroma_8x8_AllZeroCoeff_mbAddrB or mb_num_h or mb_num_v or TotalCoeff
|
or end_of_one_residual_block)
|
or end_of_one_residual_block)
|
if (reset_n == 0)
|
if (reset_n == 0)
|
begin
|
begin
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
end
|
end
|
//--read--
|
//--read--
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1 && residual_state == `ChromaACLevel_Cr_s) //read
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1 && residual_state == `ChromaACLevel_Cr_s) //read
|
begin
|
begin
|
if (i4x4_CbCr[1] == 0 && Chroma_8x8_AllZeroCoeff_mbAddrB == 1)
|
if (i4x4_CbCr[1] == 0 && Chroma_8x8_AllZeroCoeff_mbAddrB == 1)
|
begin
|
begin
|
ChromaLevel_Cr_mbAddrB_cs_n <= 0; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_cs_n <= 0; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= mb_num_h; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= mb_num_h; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
end
|
end
|
end
|
end
|
//--write--
|
//--write--
|
else if (residual_state == `ChromaACLevel_Cr_s && end_of_one_residual_block == 1 && mb_num_v != 8)
|
else if (residual_state == `ChromaACLevel_Cr_s && end_of_one_residual_block == 1 && mb_num_v != 8)
|
begin
|
begin
|
if (i4x4_CbCr == 3)
|
if (i4x4_CbCr == 3)
|
begin
|
begin
|
ChromaLevel_Cr_mbAddrB_cs_n <= 0; ChromaLevel_Cr_mbAddrB_wr_n <= 0;
|
ChromaLevel_Cr_mbAddrB_cs_n <= 0; ChromaLevel_Cr_mbAddrB_wr_n <= 0;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= mb_num_h;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= mb_num_h;
|
ChromaLevel_Cr_mbAddrB_din <= {ChromaLevel_Cr_CurrMb[14:10],TotalCoeff};
|
ChromaLevel_Cr_mbAddrB_din <= {ChromaLevel_Cr_CurrMb[14:10],TotalCoeff};
|
end
|
end
|
else
|
else
|
begin
|
begin
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
end
|
end
|
end
|
end
|
else
|
else
|
begin
|
begin
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
end
|
end
|
endmodule
|
endmodule
|
|
|
