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library IEEE;
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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entity counter is
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entity counter is
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generic (
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generic (
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stage : natural := 3);
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stage : natural := 3);
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port (
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port (
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clk : in std_logic;
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clk : in std_logic;
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rst : in std_logic;
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rst : in std_logic;
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mem_ready : in std_logic;
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mem_ready : in std_logic;
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mem_bk : out std_logic;
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mem_bk : out std_logic;
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count : out std_logic_vector(2*stage+2 downto 0));
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count : out std_logic_vector(2*stage+2 downto 0));
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end counter;
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end counter;
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architecture counter of counter is
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architecture counter of counter is
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signal aux_mem_bk : std_logic;
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signal aux_mem_bk : std_logic;
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signal count_aux : std_logic_vector(2*stage+2 downto 0);
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signal count_aux : std_logic_vector(2*stage+2 downto 0);
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constant max_count : std_logic_vector(2*stage+2 downto 0) := conv_std_logic_vector(stage-1,3)&conv_std_logic_vector(-1,2*stage);
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constant max_count : std_logic_vector(2*stage+2 downto 0) := conv_std_logic_vector(stage-1,3)&conv_std_logic_vector(-1,2*stage);
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begin
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begin
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count <= count_aux;
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count <= count_aux;
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mem_bk <= aux_mem_bk;
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mem_bk <= aux_mem_bk;
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process (clk, rst)
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process (clk, rst)
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variable initialize : std_logic_vector(1 downto 0);
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variable initialize : std_logic_vector(1 downto 0);
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begin -- process
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begin -- process
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if rst = '1' then -- asynchronous reset (active low)
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if rst = '1' then -- asynchronous reset (active low)
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count_aux <= max_count;
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count_aux <= max_count;
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aux_mem_bk <= '1';
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aux_mem_bk <= '1';
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elsif clk'event and clk = '1' then -- rising clock edge
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elsif clk'event and clk = '1' then -- rising clock edge
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if count_aux = max_count then
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if count_aux = max_count then
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if mem_ready = '1' then
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if mem_ready = '1' then
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aux_mem_bk <= not(aux_mem_bk);
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aux_mem_bk <= not(aux_mem_bk);
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count_aux <= (others => '0');
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count_aux <= (others => '0');
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end if;
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end if;
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else
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else
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count_aux <= count_aux + 1;
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count_aux <= count_aux + 1;
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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end counter;
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end counter;
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