--
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--
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-- file: p2r_CordicPipe.vhd
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-- file: p2r_CordicPipe.vhd
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-- author: Richard Herveille
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-- author: Richard Herveille
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-- rev. 1.0 initial release
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-- rev. 1.0 initial release
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--
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--
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--
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--
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-- This file is come from WWW.OPENCORES.ORG
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-- This file is come from WWW.OPENCORES.ORG
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---------------------------------------------------------------------------------------------------
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---------------------------------------------------------------------------------------------------
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--
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--
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-- Title : p2r_CordicPipe
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-- Title : p2r_CordicPipe
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-- Design : cfft
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-- Design : cfft
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--
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--
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---------------------------------------------------------------------------------------------------
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---------------------------------------------------------------------------------------------------
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--
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--
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-- File : p2r_CordicPipe.vhd
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-- File : p2r_CordicPipe.vhd
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--
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--
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---------------------------------------------------------------------------------------------------
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---------------------------------------------------------------------------------------------------
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--
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--
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-- Description : Cordic arith pilepline
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-- Description : Cordic arith pilepline
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--
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--
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---------------------------------------------------------------------------------------------------
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---------------------------------------------------------------------------------------------------
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--
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--
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-- Revisions : 0
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-- Revisions : 0
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-- Revision Number : 1
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-- Revision Number : 1
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-- Version : 1
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-- Version : 1
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-- Date : Oct 17 2002
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-- Date : Oct 17 2002
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-- Modifier : ZHAO Ming <sradio@opencores.org>
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-- Modifier : ZHAO Ming <sradio@opencores.org>
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-- Desccription : Data width configurable
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-- Desccription : Data width configurable
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--
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--
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---------------------------------------------------------------------------------------------------
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---------------------------------------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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entity p2r_CordicPipe is
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entity p2r_CordicPipe is
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generic(
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generic(
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WIDTH : natural := 16;
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WIDTH : natural := 16;
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PIPEID : natural := 1
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PIPEID : natural := 1
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);
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);
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port(
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port(
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clk : in std_logic;
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clk : in std_logic;
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ena : in std_logic;
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ena : in std_logic;
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Xi : in signed(WIDTH -1 downto 0);
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Xi : in signed(WIDTH -1 downto 0);
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Yi : in signed(WIDTH -1 downto 0);
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Yi : in signed(WIDTH -1 downto 0);
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Zi : in signed(19 downto 0);
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Zi : in signed(19 downto 0);
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Xo : out signed(WIDTH -1 downto 0);
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Xo : out signed(WIDTH -1 downto 0);
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Yo : out signed(WIDTH -1 downto 0);
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Yo : out signed(WIDTH -1 downto 0);
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Zo : out signed(19 downto 0)
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Zo : out signed(19 downto 0)
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);
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);
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end entity p2r_CordicPipe;
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end entity p2r_CordicPipe;
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architecture dataflow of p2r_CordicPipe is
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architecture dataflow of p2r_CordicPipe is
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--
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--
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-- functions
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-- functions
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--
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--
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-- Function CATAN (constante arc-tangent).
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-- Function CATAN (constante arc-tangent).
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-- This is a lookup table containing pre-calculated arc-tangents.
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-- This is a lookup table containing pre-calculated arc-tangents.
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-- 'n' is the number of the pipe, returned is a 20bit arc-tangent value.
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-- 'n' is the number of the pipe, returned is a 20bit arc-tangent value.
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-- The numbers are calculated as follows: Z(n) = atan(1/2^n)
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-- The numbers are calculated as follows: Z(n) = atan(1/2^n)
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-- examples:
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-- examples:
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-- 20bit values => 2^20 = 2pi(rad)
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-- 20bit values => 2^20 = 2pi(rad)
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-- 1(rad) = 2^20/2pi = 166886.053....
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-- 1(rad) = 2^20/2pi = 166886.053....
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-- n:0, atan(1/1) = 0.7853...(rad)
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-- n:0, atan(1/1) = 0.7853...(rad)
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-- 0.7853... * 166886.053... = 131072(dec) = 20000(hex)
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-- 0.7853... * 166886.053... = 131072(dec) = 20000(hex)
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-- n:1, atan(1/2) = 0.4636...(rad)
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-- n:1, atan(1/2) = 0.4636...(rad)
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-- 0.4636... * 166886.053... = 77376.32(dec) = 12E40(hex)
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-- 0.4636... * 166886.053... = 77376.32(dec) = 12E40(hex)
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-- n:2, atan(1/4) = 0.2449...(rad)
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-- n:2, atan(1/4) = 0.2449...(rad)
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-- 0.2449... * 166886.053... = 40883.52(dec) = 9FB3(hex)
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-- 0.2449... * 166886.053... = 40883.52(dec) = 9FB3(hex)
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-- n:3, atan(1/8) = 0.1243...(rad)
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-- n:3, atan(1/8) = 0.1243...(rad)
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-- 0.1243... * 166886.053... = 20753.11(dec) = 5111(hex)
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-- 0.1243... * 166886.053... = 20753.11(dec) = 5111(hex)
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--
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--
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function CATAN(n :natural) return integer is
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function CATAN(n :natural) return integer is
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variable result :integer;
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variable result :integer;
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begin
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begin
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case n is
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case n is
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when 0 => result := 16#020000#;
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when 0 => result := 16#020000#;
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when 1 => result := 16#012E40#;
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when 1 => result := 16#012E40#;
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when 2 => result := 16#09FB4#;
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when 2 => result := 16#09FB4#;
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when 3 => result := 16#05111#;
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when 3 => result := 16#05111#;
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when 4 => result := 16#028B1#;
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when 4 => result := 16#028B1#;
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when 5 => result := 16#0145D#;
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when 5 => result := 16#0145D#;
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when 6 => result := 16#0A2F#;
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when 6 => result := 16#0A2F#;
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when 7 => result := 16#0518#;
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when 7 => result := 16#0518#;
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when 8 => result := 16#028C#;
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when 8 => result := 16#028C#;
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when 9 => result := 16#0146#;
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when 9 => result := 16#0146#;
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when 10 => result := 16#0A3#;
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when 10 => result := 16#0A3#;
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when 11 => result := 16#051#;
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when 11 => result := 16#051#;
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when 12 => result := 16#029#;
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when 12 => result := 16#029#;
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when 13 => result := 16#014#;
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when 13 => result := 16#014#;
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when 14 => result := 16#0A#;
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when 14 => result := 16#0A#;
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when 15 => result := 16#05#;
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when 15 => result := 16#05#;
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when 16 => result := 16#03#;
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when 16 => result := 16#03#;
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when 17 => result := 16#01#;
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when 17 => result := 16#01#;
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when others => result := 16#0#;
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when others => result := 16#0#;
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end case;
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end case;
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return result;
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return result;
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end CATAN;
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end CATAN;
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-- function Delta is actually an arithmatic shift right
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-- function Delta is actually an arithmatic shift right
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-- This strange construction is needed for compatibility with Xilinx WebPack
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-- This strange construction is needed for compatibility with Xilinx WebPack
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function Delta(Arg : signed; Cnt : natural) return signed is
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function Delta(Arg : signed; Cnt : natural) return signed is
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variable tmp : signed(Arg'range);
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variable tmp : signed(Arg'range);
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constant lo : integer := Arg'high -cnt +1;
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constant lo : integer := Arg'high -cnt +1;
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begin
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begin
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for n in Arg'high downto lo loop
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for n in Arg'high downto lo loop
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tmp(n) := Arg(Arg'high);
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tmp(n) := Arg(Arg'high);
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end loop;
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end loop;
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for n in Arg'high -cnt downto 0 loop
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for n in Arg'high -cnt downto 0 loop
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tmp(n) := Arg(n +cnt);
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tmp(n) := Arg(n +cnt);
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end loop;
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end loop;
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return tmp;
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return tmp;
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end function Delta;
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end function Delta;
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function AddSub(dataa, datab : in signed; add_sub : in std_logic) return signed is
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function AddSub(dataa, datab : in signed; add_sub : in std_logic) return signed is
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begin
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begin
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if (add_sub = '1') then
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if (add_sub = '1') then
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return dataa + datab;
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return dataa + datab;
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else
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else
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return dataa - datab;
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return dataa - datab;
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end if;
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end if;
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end;
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end;
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--
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--
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-- ARCHITECTURE BODY
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-- ARCHITECTURE BODY
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--
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--
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signal dX, Xresult : signed(WIDTH -1 downto 0);
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signal dX, Xresult : signed(WIDTH -1 downto 0);
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signal dY, Yresult : signed(WIDTH -1 downto 0);
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signal dY, Yresult : signed(WIDTH -1 downto 0);
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signal atan, Zresult : signed(19 downto 0);
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signal atan, Zresult : signed(19 downto 0);
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signal Zneg, Zpos : std_logic;
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signal Zneg, Zpos : std_logic;
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begin
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begin
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dX <= Delta(Xi, PIPEID);
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dX <= Delta(Xi, PIPEID);
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dY <= Delta(Yi, PIPEID);
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dY <= Delta(Yi, PIPEID);
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atan <= conv_signed( catan(PIPEID), 20);
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atan <= conv_signed( catan(PIPEID), 20);
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-- generate adder structures
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-- generate adder structures
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Zneg <= Zi(19);
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Zneg <= Zi(19);
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Zpos <= not Zi(19);
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Zpos <= not Zi(19);
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-- xadd
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-- xadd
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Xresult <= AddSub(Xi, dY, Zneg);
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Xresult <= AddSub(Xi, dY, Zneg);
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-- yadd
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-- yadd
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Yresult <= AddSub(Yi, dX, Zpos);
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Yresult <= AddSub(Yi, dX, Zpos);
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-- zadd
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-- zadd
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Zresult <= AddSub(Zi, atan, Zneg);
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Zresult <= AddSub(Zi, atan, Zneg);
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gen_regs: process(clk)
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gen_regs: process(clk)
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begin
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begin
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if(clk'event and clk='1') then
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if(clk'event and clk='1') then
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if (ena = '1') then
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if (ena = '1') then
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Xo <= Xresult;
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Xo <= Xresult;
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Yo <= Yresult;
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Yo <= Yresult;
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Zo <= Zresult;
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Zo <= Zresult;
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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end architecture dataflow;
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end architecture dataflow;
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