-- Copyright (c)2006, Jeremy Seth Henry
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-- Copyright (c)2006,2011,2012,2013,2015 Jeremy Seth Henry
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-- All rights reserved.
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-- All rights reserved.
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--
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--
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-- Redistribution and use in source and binary forms, with or without
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-- Redistribution and use in source and binary forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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-- modification, are permitted provided that the following conditions are met:
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-- * Redistributions of source code must retain the above copyright
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-- * Redistributions of source code must retain the above copyright
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-- notice, this list of conditions and the following disclaimer.
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-- notice, this list of conditions and the following disclaimer.
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-- * Redistributions in binary form must reproduce the above copyright
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-- * Redistributions in binary form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution,
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-- documentation and/or other materials provided with the distribution,
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-- where applicable (as part of a user interface, debugging port, etc.)
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-- where applicable (as part of a user interface, debugging port, etc.)
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--
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--
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-- THIS SOFTWARE IS PROVIDED BY JEREMY SETH HENRY ``AS IS'' AND ANY
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-- THIS SOFTWARE IS PROVIDED BY JEREMY SETH HENRY ``AS IS'' AND ANY
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-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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-- DISCLAIMED. IN NO EVENT SHALL JEREMY SETH HENRY BE LIABLE FOR ANY
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-- DISCLAIMED. IN NO EVENT SHALL JEREMY SETH HENRY BE LIABLE FOR ANY
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-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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-- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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-- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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-- VHDL Units : Open8_pkg
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-- VHDL Units : Open8_pkg
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-- Description: Contains constant definitions for the Open8 processor
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-- Description: Contains constant definitions for the Open8 processor
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-- Revision History
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-- Revision History
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-- Author Date Change
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-- Author Date Change
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------------------ -------- ---------------------------------------------------
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------------------ -------- ---------------------------------------------------
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-- Seth Henry 07/22/06 Design Start
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-- Seth Henry 07/22/06 Design Start
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-- Seth Henry 02/03/12 Updated generics to match current model
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-- Seth Henry 10/29/15 Migrated type/constant definitions to this file
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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package Open8_pkg is
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package Open8_pkg is
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-------------------------------------------------------------------------------
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-- External constants and type declarations
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--
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-- These subtypes can be used with external peripherals to simplify
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-- These subtypes can be used with external peripherals to simplify
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-- connection to the core.
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-- connection to the core.
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subtype ADDRESS_TYPE is std_logic_vector(15 downto 0);
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-------------------------------------------------------------------------------
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subtype DATA_TYPE is std_logic_vector(7 downto 0);
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-- These must never be changed, as the core requires them to be these static
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-- values for proper operation. These are ONLY defined here to allow user
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-- code to dynamically configure itself to match the Open8 core ONLY.
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constant OPEN8_ADDR_WIDTH : integer := 16; -- DON'T EVEN CONTEMPLATE
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constant OPEN8_DATA_WIDTH : integer := 8; -- CHANGING THESE!
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subtype ADDRESS_TYPE is std_logic_vector(OPEN8_ADDR_WIDTH - 1 downto 0);
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subtype DATA_TYPE is std_logic_vector(OPEN8_DATA_WIDTH - 1 downto 0);
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-- Note: INTERRUPT_BUNDLE must be exactly the same width as DATA_TYPE
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-- Note: INTERRUPT_BUNDLE must be exactly the same width as DATA_TYPE
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subtype INTERRUPT_BUNDLE is DATA_TYPE;
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subtype INTERRUPT_BUNDLE is DATA_TYPE;
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constant DATA_WIDTH : integer := 8;
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-- Component declaration
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-- Component declaration
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-- (assumes a 1K RAM at 0x0000 and ROM at the end of the memory map)
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component Open8_CPU is
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component Open8_CPU is
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generic(
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generic(
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Stack_Start_Addr : ADDRESS_TYPE;
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Program_Start_Addr : ADDRESS_TYPE := x"8000"; -- Initial PC location
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Allow_Stack_Address_Move : std_logic := '0';
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ISR_Start_Addr : ADDRESS_TYPE := x"FFF0"; -- Bottom of ISR vec's
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ISR_Start_Addr : ADDRESS_TYPE;
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Stack_Start_Addr : ADDRESS_TYPE := x"03FF"; -- Top of Stack
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Program_Start_Addr : ADDRESS_TYPE;
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Allow_Stack_Address_Move : boolean := false; -- Use Normal v8 RSP
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Default_Interrupt_Mask : DATA_TYPE;
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Enable_Auto_Increment : boolean := false; -- Modify indexed instr
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Enable_CPU_Halt : std_logic := '0';
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BRK_Implements_WAI : boolean := false; -- BRK -> Wait for Int
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Enable_Auto_Increment : std_logic := '0' );
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Enable_NMI : boolean := true; -- Force INTR0 enabled
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Default_Interrupt_Mask : DATA_TYPE := x"FF"; -- Enable all Ints
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Reset_Level : std_logic := '0' ); -- Active reset level
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port(
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port(
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Clock : in std_logic;
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Clock : in std_logic;
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Reset : in std_logic;
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Reset : in std_logic;
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CPU_Halt : in std_logic;
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Interrupts : in INTERRUPT_BUNDLE;
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Interrupts : in INTERRUPT_BUNDLE;
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Address : out ADDRESS_TYPE;
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Address : out ADDRESS_TYPE;
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Rd_Data : in DATA_TYPE;
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Rd_Data : in DATA_TYPE;
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Rd_Enable : out std_logic;
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Rd_Enable : out std_logic;
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Wr_Data : out DATA_TYPE;
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Wr_Data : out DATA_TYPE;
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Wr_Enable : out std_logic );
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Wr_Enable : out std_logic );
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end component;
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end component;
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-------------------------------------------------------------------------------
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-- Internal constants and type declarations.
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--
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-- These are only used in the actual model, and aren't generally useful for
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-- external application.
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-------------------------------------------------------------------------------
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subtype OPCODE_TYPE is std_logic_vector(4 downto 0);
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subtype SUBOP_TYPE is std_logic_vector(2 downto 0);
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-- All opcodes should be identical to the opcode used by the assembler
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-- In this case, they match the original V8/ARC uRISC ISA
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constant OP_INC : OPCODE_TYPE := "00000";
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constant OP_ADC : OPCODE_TYPE := "00001";
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constant OP_TX0 : OPCODE_TYPE := "00010";
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constant OP_OR : OPCODE_TYPE := "00011";
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constant OP_AND : OPCODE_TYPE := "00100";
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constant OP_XOR : OPCODE_TYPE := "00101";
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constant OP_ROL : OPCODE_TYPE := "00110";
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constant OP_ROR : OPCODE_TYPE := "00111";
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constant OP_DEC : OPCODE_TYPE := "01000";
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constant OP_SBC : OPCODE_TYPE := "01001";
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constant OP_ADD : OPCODE_TYPE := "01010";
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constant OP_STP : OPCODE_TYPE := "01011";
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constant OP_BTT : OPCODE_TYPE := "01100";
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constant OP_CLP : OPCODE_TYPE := "01101";
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constant OP_T0X : OPCODE_TYPE := "01110";
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constant OP_CMP : OPCODE_TYPE := "01111";
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constant OP_PSH : OPCODE_TYPE := "10000";
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constant OP_POP : OPCODE_TYPE := "10001";
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constant OP_BR0 : OPCODE_TYPE := "10010";
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constant OP_BR1 : OPCODE_TYPE := "10011";
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constant OP_DBNZ : OPCODE_TYPE := "10100"; -- USR
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constant OP_INT : OPCODE_TYPE := "10101";
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constant OP_MUL : OPCODE_TYPE := "10110"; -- USR2
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constant OP_STK : OPCODE_TYPE := "10111";
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constant OP_UPP : OPCODE_TYPE := "11000";
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constant OP_STA : OPCODE_TYPE := "11001";
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constant OP_STX : OPCODE_TYPE := "11010";
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constant OP_STO : OPCODE_TYPE := "11011";
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constant OP_LDI : OPCODE_TYPE := "11100";
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constant OP_LDA : OPCODE_TYPE := "11101";
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constant OP_LDX : OPCODE_TYPE := "11110";
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constant OP_LDO : OPCODE_TYPE := "11111";
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-- OP_STK uses the lower 3 bits to further refine the instruction by
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-- repurposing the source register field. These "sub opcodes" are
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-- take the place of the register select for the OP_STK opcode
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constant SOP_RSP : SUBOP_TYPE := "000";
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constant SOP_RTS : SUBOP_TYPE := "001";
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constant SOP_RTI : SUBOP_TYPE := "010";
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constant SOP_BRK : SUBOP_TYPE := "011";
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constant SOP_JMP : SUBOP_TYPE := "100";
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constant SOP_SMSK : SUBOP_TYPE := "101";
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constant SOP_GMSK : SUBOP_TYPE := "110";
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constant SOP_JSR : SUBOP_TYPE := "111";
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type CPU_STATES is (
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-- Instruction fetch & Decode
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PIPE_FILL_0, PIPE_FILL_1, PIPE_FILL_2, INSTR_DECODE,
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-- Branching
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BRN_C1, DBNZ_C1, JMP_C1, JMP_C2,
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-- Loads
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LDA_C1, LDA_C2, LDA_C3, LDA_C4, LDI_C1, LDO_C1, LDX_C1, LDX_C2, LDX_C3,
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-- Stores
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STA_C1, STA_C2, STA_C3, STO_C1, STO_C2, STX_C1, STX_C2,
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-- 2-cycle math
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MUL_C1, UPP_C1,
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-- Stack
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PSH_C1, POP_C1, POP_C2, POP_C3, POP_C4,
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-- Subroutines & Interrupts
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WAIT_FOR_INT, ISR_C1, ISR_C2, ISR_C3, JSR_C1, JSR_C2,
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RTS_C1, RTS_C2, RTS_C3, RTS_C4, RTS_C5, RTI_C6,
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-- Debugging
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BRK_C1 );
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type CACHE_MODES is (CACHE_IDLE, CACHE_INSTR, CACHE_OPER1, CACHE_OPER2,
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CACHE_PREFETCH );
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type PC_MODES is ( PC_IDLE, PC_REV1, PC_REV2, PC_INCR, PC_LOAD );
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type PC_CTRL_TYPE is record
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Oper : PC_MODES;
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Offset : DATA_TYPE;
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Addr : ADDRESS_TYPE;
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end record;
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type SP_MODES is ( SP_IDLE, SP_RSET, SP_POP, SP_PUSH );
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type SP_CTRL_TYPE is record
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Oper : SP_MODES;
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Addr : ADDRESS_TYPE;
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end record;
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type DP_MODES is ( DATA_BUS_IDLE, DATA_RD_MEM,
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DATA_WR_REG, DATA_WR_FLAG, DATA_WR_PC );
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type DATA_CTRL_TYPE is record
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Src : DP_MODES;
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Reg : SUBOP_TYPE;
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end record;
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type INT_CTRL_TYPE is record
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Mask_Set : std_logic;
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Soft_Ints : INTERRUPT_BUNDLE;
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Incr_ISR : std_logic;
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end record;
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-- Most of the ALU instructions are the same as their Opcode equivalents with
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-- three exceptions (for IDLE, UPP2, and MUL2)
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constant ALU_INC : OPCODE_TYPE := "00000"; -- x"00"
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constant ALU_ADC : OPCODE_TYPE := "00001"; -- x"01"
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constant ALU_TX0 : OPCODE_TYPE := "00010"; -- x"02"
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constant ALU_OR : OPCODE_TYPE := "00011"; -- x"03"
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constant ALU_AND : OPCODE_TYPE := "00100"; -- x"04"
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constant ALU_XOR : OPCODE_TYPE := "00101"; -- x"05"
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constant ALU_ROL : OPCODE_TYPE := "00110"; -- x"06"
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constant ALU_ROR : OPCODE_TYPE := "00111"; -- x"07"
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constant ALU_DEC : OPCODE_TYPE := "01000"; -- x"08"
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constant ALU_SBC : OPCODE_TYPE := "01001"; -- x"09"
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constant ALU_ADD : OPCODE_TYPE := "01010"; -- x"0A"
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constant ALU_STP : OPCODE_TYPE := "01011"; -- x"0B"
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constant ALU_BTT : OPCODE_TYPE := "01100"; -- x"0C"
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constant ALU_CLP : OPCODE_TYPE := "01101"; -- x"0D"
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constant ALU_T0X : OPCODE_TYPE := "01110"; -- x"0E"
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constant ALU_CMP : OPCODE_TYPE := "01111"; -- x"0F"
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constant ALU_POP : OPCODE_TYPE := "10001"; -- x"11"
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constant ALU_MUL : OPCODE_TYPE := "10110"; -- x"16"
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constant ALU_UPP : OPCODE_TYPE := "11000"; -- x"18"
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constant ALU_LDI : OPCODE_TYPE := "11100"; -- x"1C"
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constant ALU_LDX : OPCODE_TYPE := "11110"; -- x"1E"
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constant ALU_IDLE : OPCODE_TYPE := "10000"; -- x"10"
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constant ALU_UPP2 : OPCODE_TYPE := "10010"; -- x"12"
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constant ALU_RFLG : OPCODE_TYPE := "10011"; -- x"13"
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constant FL_ZERO : integer := 0;
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constant FL_CARRY : integer := 1;
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constant FL_NEG : integer := 2;
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constant FL_INT_EN : integer := 3;
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constant FL_GP1 : integer := 4;
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constant FL_GP2 : integer := 5;
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constant FL_GP3 : integer := 6;
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constant FL_GP4 : integer := 7;
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type ALU_CTRL_TYPE is record
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Oper : OPCODE_TYPE;
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Reg : SUBOP_TYPE;
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Data : DATA_TYPE;
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end record;
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constant ACCUM : SUBOP_TYPE := "000";
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constant INT_FLAG : SUBOP_TYPE := "011";
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type REGFILE_TYPE is array (0 to 7) of DATA_TYPE;
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subtype FLAG_TYPE is DATA_TYPE;
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end Open8_pkg;
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end Open8_pkg;
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package body Open8_pkg is
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package body Open8_pkg is
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end package body;
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end package body;
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