URL
https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
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Rev 148 |
Rev 166 |
SCRIPT_NAME=elf
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SCRIPT_NAME=elf
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OUTPUT_FORMAT="elf64-tilegx"
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OUTPUT_FORMAT="elf64-tilegx-le"
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BIG_OUTPUT_FORMAT="elf64-tilegx-be"
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LITTLE_OUTPUT_FORMAT="elf64-tilegx-le"
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TEXT_START_ADDR=0x10000
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TEXT_START_ADDR=0x10000
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NO_REL_RELOCS=yes
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NO_REL_RELOCS=yes
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MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
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MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
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COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
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COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
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# See also `include/elf/tilegx.h'
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# See also `include/elf/tilegx.h'
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ARCH=tilegx
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ARCH=tilegx
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ALIGNMENT=64
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ALIGNMENT=64
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MACHINE=
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MACHINE=
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NOP=0
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NOP=0
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# Note that "elf32.em" actually handles elf64 also.
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# Note that "elf32.em" actually handles elf64 also.
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TEMPLATE_NAME=elf32
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TEMPLATE_NAME=elf32
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GENERATE_SHLIB_SCRIPT=yes
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GENERATE_SHLIB_SCRIPT=yes
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GENERATE_COMBRELOC_SCRIPT=yes
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GENERATE_COMBRELOC_SCRIPT=yes
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GENERATE_PIE_SCRIPT=yes
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GENERATE_PIE_SCRIPT=yes
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NO_SMALL_DATA=yes
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NO_SMALL_DATA=yes
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SEPARATE_GOTPLT=16
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SEPARATE_GOTPLT=16
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OTHER_SECTIONS="
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OTHER_SECTIONS="
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/* TILE architecture interrupt vector areas */
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/* TILE architecture interrupt vector areas */
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.intrpt0 0xfffffffffc000000 : { KEEP(*(.intrpt0)) }
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.intrpt0 0xfffffffffc000000 : { KEEP(*(.intrpt0)) }
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.intrpt1 0xfffffffffd000000 : { KEEP(*(.intrpt1)) }
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.intrpt1 0xfffffffffd000000 : { KEEP(*(.intrpt1)) }
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.intrpt2 0xfffffffffe000000 : { KEEP(*(.intrpt2)) }
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.intrpt2 0xfffffffffe000000 : { KEEP(*(.intrpt2)) }
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.intrpt3 0xffffffffff000000 : { KEEP(*(.intrpt3)) }
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.intrpt3 0xffffffffff000000 : { KEEP(*(.intrpt3)) }
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"
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"
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