////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: eqspiscope.cpp
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// Filename: eqspiscope.cpp
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//
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//
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// Project: XuLA2-LX25 SoC based upon the ZipCPU
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// Project: XuLA2-LX25 SoC based upon the ZipCPU
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//
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//
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// Purpose: This program decodes the bits in the debugging wires output
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// Purpose: This program decodes the bits in the debugging wires output
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// from the eqspiflash module, and stored in the Wishbone Scope
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// from the eqspiflash module, and stored in the Wishbone Scope
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// device. The result is placed on the screen output, so you can see what
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// device. The result is placed on the screen output, so you can see what
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// is going on internal to the device.
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// is going on internal to the device.
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//
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//
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//
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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// Gisselquist Technology, LLC
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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//
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// This program is free software (firmware): you can redistribute it and/or
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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// your option) any later version.
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//
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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// for more details.
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//
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//
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// You should have received a copy of the GNU General Public License along
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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// <http://www.gnu.org/licenses/> for a copy.
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//
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <unistd.h>
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#include <strings.h>
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#include <strings.h>
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#include <ctype.h>
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#include <ctype.h>
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#include <string.h>
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#include <string.h>
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#include <signal.h>
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#include <signal.h>
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#include <assert.h>
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#include <assert.h>
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#include "port.h"
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#include "port.h"
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#include "regdefs.h"
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#include "regdefs.h"
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#include "scopecls.h"
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#include "scopecls.h"
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#define WBSCOPE R_QSCOPE
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#define WBSCOPE R_QSCOPE
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#define WBSCOPEDATA R_QSCOPED
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#define WBSCOPEDATA R_QSCOPED
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FPGA *m_fpga;
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FPGA *m_fpga;
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void closeup(int v) {
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void closeup(int v) {
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m_fpga->kill();
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m_fpga->kill();
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exit(0);
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exit(0);
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}
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}
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class EQSPISCOPE : public SCOPE {
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class EQSPISCOPE : public SCOPE {
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// While I put these in at one time, they really mess up other scopes,
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// While I put these in at one time, they really mess up other scopes,
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// since setting parameters based upon the debug word forces the decoder
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// since setting parameters based upon the debug word forces the decoder
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// to be non-constant, calling methods change, etc., etc., etc.
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// to be non-constant, calling methods change, etc., etc., etc.
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//
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//
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// int m_oword[2], m_iword[2], m_p;
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// int m_oword[2], m_iword[2], m_p;
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public:
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public:
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EQSPISCOPE(FPGA *fpga, unsigned addr, bool vecread)
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EQSPISCOPE(FPGA *fpga, unsigned addr, bool vecread)
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: SCOPE(fpga, addr, false, false) {};
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: SCOPE(fpga, addr, false, vecread) {};
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~EQSPISCOPE(void) {}
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~EQSPISCOPE(void) {}
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virtual void decode(DEVBUS::BUSW val) const {
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virtual void decode(DEVBUS::BUSW val) const {
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int cyc, cstb, dstb, ack, back, accepted, valid, word,
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int cyc, cstb, dstb, ack, back, accepted, valid, word,
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out, cs, sck, mod, odat, idat;
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out, cs, sck, mod, odat, idat;
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cyc = (val>>31)&1;
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cyc = (val>>31)&1;
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cstb = (val>>30)&1;
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cstb = (val>>30)&1;
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dstb = (val>>29)&1;
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dstb = (val>>29)&1;
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ack = (val>>28)&1;
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ack = (val>>28)&1;
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back = (val>>27)&1;
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back = (val>>27)&1;
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accepted = (val>>26)&1;
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accepted = (val>>26)&1;
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valid = (val>>25)&1;
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valid = (val>>25)&1;
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word = (val>>18)&0x07f;
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word = (val>>18)&0x07f;
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out = (val>>12)&0x03f;
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out = (val>>12)&0x03f;
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cs = (val>>11)&1;
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cs = (val>>11)&1;
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sck = (val>>10)&1;
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sck = (val>>10)&1;
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mod = (val>> 8)&3;
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mod = (val>> 8)&3;
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odat = (val>> 4)&15;
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odat = (val>> 4)&15;
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idat = (val )&15;
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idat = (val )&15;
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/*
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/*
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m_p = (m_p^1)&1;
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m_p = (m_p^1)&1;
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if (mod&2) {
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if (mod&2) {
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m_oword[m_p] = (m_oword[m_p]<<4)|odat;
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m_oword[m_p] = (m_oword[m_p]<<4)|odat;
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m_iword[m_p] = (m_iword[m_p]<<4)|idat;
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m_iword[m_p] = (m_iword[m_p]<<4)|idat;
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} else {
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} else {
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m_oword[m_p] = (m_oword[m_p]<<1)|(odat&1);
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m_oword[m_p] = (m_oword[m_p]<<1)|(odat&1);
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m_iword[m_p] = (m_iword[m_p]<<1)|((idat&2)?1:0);
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m_iword[m_p] = (m_iword[m_p]<<1)|((idat&2)?1:0);
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}
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}
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*/
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*/
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printf("%s%s%s%s%s%s%s %02x %02x %s%s %d %x.%d-> ->%x.%d",
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printf("%s%s%s%s%s%s%s %02x %02x %s%s %d %x.%d-> ->%x.%d",
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(cyc)?"CYC ":" ",
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(cyc)?"CYC ":" ",
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(cstb)?"CSTB":" ",
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(cstb)?"CSTB":" ",
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(dstb)?"DSTB":" ",
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(dstb)?"DSTB":" ",
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(ack)?"AK":" ",
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(ack)?"AK":" ",
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(back)?"+":" ",
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(back)?"+":" ",
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(accepted)?"ACC":" ",
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(accepted)?"ACC":" ",
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(valid)?"V":" ",
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(valid)?"V":" ",
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word<<1, out<<2,
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word<<1, out<<2,
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(cs)?" ":"CS",
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(cs)?" ":"CS",
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(sck)?"CK":" ",
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(sck)?"CK":" ",
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(mod), odat, (odat&1)?1:0, idat, (idat&2)?1:0);
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(mod), odat, (odat&1)?1:0, idat, (idat&2)?1:0);
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// printf(" / %08x -> %08x", m_oword[m_p], m_iword[m_p]);
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// printf(" / %08x -> %08x", m_oword[m_p], m_iword[m_p]);
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}
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}
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};
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};
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int main(int argc, char **argv) {
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int main(int argc, char **argv) {
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int skp=0, port = FPGAPORT;
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int skp=0, port = FPGAPORT;
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bool use_usb = false;
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bool use_usb = false;
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skp=1;
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skp=1;
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for(int argn=0; argn<argc-skp; argn++) {
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for(int argn=0; argn<argc-skp; argn++) {
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if (argv[argn+skp][0] == '-') {
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if (argv[argn+skp][0] == '-') {
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if (argv[argn+skp][1] == 'u')
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if (argv[argn+skp][1] == 'u')
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use_usb = true;
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use_usb = true;
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else if (argv[argn+skp][1] == 'p') {
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else if (argv[argn+skp][1] == 'p') {
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use_usb = false;
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use_usb = false;
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if (isdigit(argv[argn+skp][2]))
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if (isdigit(argv[argn+skp][2]))
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port = atoi(&argv[argn+skp][2]);
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port = atoi(&argv[argn+skp][2]);
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}
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}
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skp++; argn--;
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skp++; argn--;
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} else
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} else
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argv[argn] = argv[argn+skp];
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argv[argn] = argv[argn+skp];
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} argc -= skp;
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} argc -= skp;
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FPGAOPEN(m_fpga);
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FPGAOPEN(m_fpga);
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signal(SIGSTOP, closeup);
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signal(SIGSTOP, closeup);
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signal(SIGHUP, closeup);
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signal(SIGHUP, closeup);
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EQSPISCOPE *scope = new EQSPISCOPE(m_fpga, WBSCOPE, false);
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EQSPISCOPE *scope = new EQSPISCOPE(m_fpga, WBSCOPE, false);
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if (!scope->ready()) {
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if (!scope->ready()) {
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printf("Scope is not yet ready:\n");
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printf("Scope is not yet ready:\n");
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scope->decode_control();
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scope->decode_control();
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} else
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} else
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scope->read();
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scope->read();
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delete m_fpga;
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delete m_fpga;
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}
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}
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