////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: flashdrvr.cpp
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// Filename: flashdrvr.cpp
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//
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//
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// Project: OpenArty, an entirely open SoC based upon the Arty platform
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// Project: OpenArty, an entirely open SoC based upon the Arty platform
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//
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//
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// Purpose: Flash driver. Encapsulates the erasing and programming (i.e.
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// Purpose: Flash driver. Encapsulates the erasing and programming (i.e.
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// writing) necessary to set the values in a flash device.
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// writing) necessary to set the values in a flash device.
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//
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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// Gisselquist Technology, LLC
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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//
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// This program is free software (firmware): you can redistribute it and/or
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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// your option) any later version.
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//
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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// for more details.
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//
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//
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// You should have received a copy of the GNU General Public License along
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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// <http://www.gnu.org/licenses/> for a copy.
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//
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <unistd.h>
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#include <strings.h>
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#include <strings.h>
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#include <ctype.h>
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#include <ctype.h>
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#include <string.h>
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#include <string.h>
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#include <signal.h>
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#include <signal.h>
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#include <assert.h>
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#include <assert.h>
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#include "port.h"
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#include "port.h"
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#include "regdefs.h"
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#include "regdefs.h"
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#include "flashdrvr.h"
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#include "flashdrvr.h"
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const bool HIGH_SPEED = false;
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const bool HIGH_SPEED = false;
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#define SETSCOPE m_fpga->writeio(R_QSCOPE, 8180)
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#define SETSCOPE m_fpga->writeio(R_QSCOPE, 8180)
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void FLASHDRVR::flwait(void) {
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void FLASHDRVR::flwait(void) {
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DEVBUS::BUSW v;
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DEVBUS::BUSW v;
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v = m_fpga->readio(R_QSPI_EREG);
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v = m_fpga->readio(R_QSPI_EREG);
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if ((v&ERASEFLAG)==0)
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if ((v&ERASEFLAG)==0)
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return;
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return;
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m_fpga->writeio(R_ICONTROL, ISPIF_DIS);
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m_fpga->writeio(R_ICONTROL, ISPIF_DIS);
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m_fpga->clear();
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m_fpga->clear();
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m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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do {
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do {
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// Start by checking that we are still erasing. The interrupt
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// Start by checking that we are still erasing. The interrupt
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// may have been generated while we were setting things up and
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// may have been generated while we were setting things up and
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// disabling things, so this just double checks for us. If
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// disabling things, so this just double checks for us. If
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// the interrupt was tripped, we're done. If not, we can now
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// the interrupt was tripped, we're done. If not, we can now
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// wait for an interrupt.
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// wait for an interrupt.
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v = m_fpga->readio(R_QSPI_EREG);
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v = m_fpga->readio(R_QSPI_EREG);
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if (v&ERASEFLAG) {
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if (v&ERASEFLAG) {
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m_fpga->usleep(400);
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m_fpga->usleep(400);
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if (m_fpga->poll()) {
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if (m_fpga->poll()) {
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m_fpga->clear();
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m_fpga->clear();
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m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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}
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}
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}
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}
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} while(v & ERASEFLAG);
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} while(v & ERASEFLAG);
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}
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}
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bool FLASHDRVR::erase_sector(const unsigned sector, const bool verify_erase) {
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bool FLASHDRVR::erase_sector(const unsigned sector, const bool verify_erase) {
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DEVBUS::BUSW page[SZPAGEW];
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DEVBUS::BUSW page[SZPAGEW];
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printf("EREG before : %08x\n", m_fpga->readio(R_QSPI_EREG));
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printf("EREG before : %08x\n", m_fpga->readio(R_QSPI_EREG));
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printf("Erasing sector: %08x\n", sector);
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printf("Erasing sector: %08x\n", sector);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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printf("EREG with WEL : %08x\n", m_fpga->readio(R_QSPI_EREG));
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printf("EREG with WEL : %08x\n", m_fpga->readio(R_QSPI_EREG));
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SETSCOPE;
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SETSCOPE;
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m_fpga->writeio(R_QSPI_EREG, ERASEFLAG + sector);
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m_fpga->writeio(R_QSPI_EREG, ERASEFLAG + sector);
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printf("EREG after : %08x\n", m_fpga->readio(R_QSPI_EREG));
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printf("EREG after : %08x\n", m_fpga->readio(R_QSPI_EREG));
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// If we're in high speed mode and we want to verify the erase, then
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// If we're in high speed mode and we want to verify the erase, then
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// we can skip waiting for the erase to complete by issueing a read
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// we can skip waiting for the erase to complete by issueing a read
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// command immediately. As soon as the erase completes the read will
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// command immediately. As soon as the erase completes the read will
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// begin sending commands back. This allows us to recover the lost
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// begin sending commands back. This allows us to recover the lost
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// time between the interrupt and the next command being received.
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// time between the interrupt and the next command being received.
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if ((!HIGH_SPEED)||(!verify_erase)) {
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if ((!HIGH_SPEED)||(!verify_erase)) {
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flwait();
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flwait();
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printf("@%08x -> %08x\n", R_QSPI_EREG,
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printf("@%08x -> %08x\n", R_QSPI_EREG,
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m_fpga->readio(R_QSPI_EREG));
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m_fpga->readio(R_QSPI_EREG));
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printf("@%08x -> %08x\n", R_QSPI_STAT,
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printf("@%08x -> %08x\n", R_QSPI_STAT,
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m_fpga->readio(R_QSPI_STAT));
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m_fpga->readio(R_QSPI_STAT));
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printf("@%08x -> %08x\n", sector,
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printf("@%08x -> %08x\n", sector,
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m_fpga->readio(sector));
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m_fpga->readio(sector));
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}
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}
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// Now, let's verify that we erased the sector properly
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// Now, let's verify that we erased the sector properly
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if (verify_erase) {
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if (verify_erase) {
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for(int i=0; i<NPAGES; i++) {
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for(int i=0; i<NPAGES; i++) {
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m_fpga->readi(sector+i*SZPAGEW, SZPAGEW, page);
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m_fpga->readi(sector+i*SZPAGEW, SZPAGEW, page);
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for(int i=0; i<SZPAGEW; i++)
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for(int i=0; i<SZPAGEW; i++)
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if (page[i] != 0xffffffff)
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if (page[i] != 0xffffffff)
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return false;
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return false;
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}
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}
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}
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}
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return true;
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return true;
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}
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}
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bool FLASHDRVR::write_page(const unsigned addr, const unsigned len,
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bool FLASHDRVR::write_page(const unsigned addr, const unsigned len,
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const unsigned *data, const bool verify_write) {
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const unsigned *data, const bool verify_write) {
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DEVBUS::BUSW buf[SZPAGEW];
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DEVBUS::BUSW buf[SZPAGEW];
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assert(len > 0);
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assert(len > 0);
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assert(len <= PGLENW);
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assert(len <= PGLENW);
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assert(PAGEOF(addr)==PAGEOF(addr+len-1));
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assert(PAGEOF(addr)==PAGEOF(addr+len-1));
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if (len <= 0)
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if (len <= 0)
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return true;
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return true;
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// Write the page
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// Write the page
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m_fpga->writeio(R_ICONTROL, ISPIF_DIS);
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m_fpga->writeio(R_ICONTROL, ISPIF_DIS);
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m_fpga->clear();
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m_fpga->clear();
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m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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printf("Writing page: 0x%08x - 0x%08x\n", addr, addr+len-1);
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printf("Writing page: 0x%08x - 0x%08x\n", addr, addr+len-1);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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SETSCOPE;
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SETSCOPE;
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m_fpga->writei(addr, len, data);
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m_fpga->writei(addr, len, data);
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// If we're in high speed mode and we want to verify the write, then
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// If we're in high speed mode and we want to verify the write, then
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// we can skip waiting for the write to complete by issueing a read
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// we can skip waiting for the write to complete by issueing a read
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// command immediately. As soon as the write completes the read will
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// command immediately. As soon as the write completes the read will
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// begin sending commands back. This allows us to recover the lost
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// begin sending commands back. This allows us to recover the lost
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// time between the interrupt and the next command being received.
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// time between the interrupt and the next command being received.
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flwait();
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flwait();
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// if ((!HIGH_SPEED)||(!verify_write)) { }
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// if ((!HIGH_SPEED)||(!verify_write)) { }
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if (verify_write) {
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if (verify_write) {
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// printf("Attempting to verify page\n");
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// printf("Attempting to verify page\n");
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// NOW VERIFY THE PAGE
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// NOW VERIFY THE PAGE
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m_fpga->readi(addr, len, buf);
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m_fpga->readi(addr, len, buf);
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for(int i=0; i<len; i++) {
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for(int i=0; i<len; i++) {
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if (buf[i] != data[i]) {
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if (buf[i] != data[i]) {
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printf("\nVERIFY FAILS[%d]: %08x\n", i, i+addr);
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printf("\nVERIFY FAILS[%d]: %08x\n", i, i+addr);
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printf("\t(Flash[%d]) %08x != %08x (Goal[%08x])\n",
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printf("\t(Flash[%d]) %08x != %08x (Goal[%08x])\n",
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i, buf[i], data[i], i+addr);
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i, buf[i], data[i], i+addr);
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return false;
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return false;
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}
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}
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} // printf("\nVerify success\n");
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} // printf("\nVerify success\n");
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} return true;
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} return true;
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}
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}
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#define VCONF_VALUE 0x8b
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#define VCONF_VALUE 0x8b
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bool FLASHDRVR::verify_config(void) {
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bool FLASHDRVR::verify_config(void) {
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unsigned cfg = m_fpga->readio(R_QSPI_VCONF);
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unsigned cfg = m_fpga->readio(R_QSPI_VCONF);
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printf("CFG = %02x\n", cfg);
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printf("CFG = %02x\n", cfg);
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return (cfg == VCONF_VALUE);
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return (cfg == VCONF_VALUE);
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}
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}
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void FLASHDRVR::set_config(void) {
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void FLASHDRVR::set_config(void) {
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// There is some delay associated with these commands, but it should
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// There is some delay associated with these commands, but it should
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// be dwarfed by the communication delay. If you wish to do this on the
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// be dwarfed by the communication delay. If you wish to do this on the
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// device itself, you may need to use some timers.
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// device itself, you may need to use some timers.
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//
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//
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// Set the write-enable latch
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// Set the write-enable latch
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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// Set the volatile configuration register
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// Set the volatile configuration register
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m_fpga->writeio(R_QSPI_VCONF, VCONF_VALUE);
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m_fpga->writeio(R_QSPI_VCONF, VCONF_VALUE);
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// Clear the write-enable latch, since it didn't clear automatically
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// Clear the write-enable latch, since it didn't clear automatically
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printf("EREG = %08x\n", m_fpga->readio(R_QSPI_EREG));
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printf("EREG = %08x\n", m_fpga->readio(R_QSPI_EREG));
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m_fpga->writeio(R_QSPI_EREG, ENABLEWP);
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m_fpga->writeio(R_QSPI_EREG, ENABLEWP);
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}
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}
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bool FLASHDRVR::write(const unsigned addr, const unsigned len,
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bool FLASHDRVR::write(const unsigned addr, const unsigned len,
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const unsigned *data, const bool verify) {
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const unsigned *data, const bool verify) {
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|
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if (!verify_config()) {
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if (!verify_config()) {
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set_config();
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set_config();
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if (!verify_config())
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if (!verify_config()) {
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printf("Invalid configuration, cannot program flash\n");
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return false;
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return false;
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}
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}
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}
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// Work through this one sector at a time.
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// Work through this one sector at a time.
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// If this buffer is equal to the sector value(s), go on
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// If this buffer is equal to the sector value(s), go on
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// If not, erase the sector
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// If not, erase the sector
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|
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// m_fpga->writeio(R_QSPI_CREG, 2);
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// m_fpga->writeio(R_QSPI_CREG, 2);
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// m_fpga->readio(R_VERSION); // Read something innocuous
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// m_fpga->readio(R_VERSION); // Read something innocuous
|
|
|
// Just to make sure the driver knows that these values are ...
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// Just to make sure the driver knows that these values are ...
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// m_fpga->readio(R_QSPI_CREG);
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// m_fpga->readio(R_QSPI_CREG);
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// m_fpga->readio(R_QSPI_SREG);
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// m_fpga->readio(R_QSPI_SREG);
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// Because the status register may invoke protections here, we
|
// Because the status register may invoke protections here, we
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// void them.
|
// void them.
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// m_fpga->writeio(R_QSPI_SREG, 0);
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// m_fpga->writeio(R_QSPI_SREG, 0);
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// m_fpga->readio(R_VERSION); // Read something innocuous
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// m_fpga->readio(R_VERSION); // Read something innocuous
|
|
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for(unsigned s=SECTOROF(addr); s<SECTOROF(addr+len+SECTORSZW-1); s+=SECTORSZW) {
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for(unsigned s=SECTOROF(addr); s<SECTOROF(addr+len+SECTORSZW-1); s+=SECTORSZW) {
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// printf("IN LOOP, s=%08x\n", s);
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// printf("IN LOOP, s=%08x\n", s);
|
// Do we need to erase?
|
// Do we need to erase?
|
bool need_erase = false;
|
bool need_erase = false;
|
unsigned newv = 0; // (s<addr)?addr:s;
|
unsigned newv = 0; // (s<addr)?addr:s;
|
{
|
{
|
DEVBUS::BUSW *sbuf = new DEVBUS::BUSW[SECTORSZW];
|
DEVBUS::BUSW *sbuf = new DEVBUS::BUSW[SECTORSZW];
|
const DEVBUS::BUSW *dp;
|
const DEVBUS::BUSW *dp;
|
unsigned base,ln;
|
unsigned base,ln;
|
base = (addr>s)?addr:s;
|
base = (addr>s)?addr:s;
|
ln=((addr+len>s+SECTORSZW)?(s+SECTORSZW):(addr+len))-base;
|
ln=((addr+len>s+SECTORSZW)?(s+SECTORSZW):(addr+len))-base;
|
m_fpga->readi(base, ln, sbuf);
|
m_fpga->readi(base, ln, sbuf);
|
|
|
dp = &data[base-addr];
|
dp = &data[base-addr];
|
|
SETSCOPE;
|
for(unsigned i=0; i<ln; i++) {
|
for(unsigned i=0; i<ln; i++) {
|
if ((sbuf[i]&dp[i]) != dp[i]) {
|
if ((sbuf[i]&dp[i]) != dp[i]) {
|
printf("\nNEED-ERASE @0x%08x ... %08x != %08x (Goal)\n",
|
printf("\nNEED-ERASE @0x%08x ... %08x != %08x (Goal)\n",
|
i+base-addr, sbuf[i], dp[i]);
|
i+base-addr, sbuf[i], dp[i]);
|
need_erase = true;
|
need_erase = true;
|
newv = i+base;
|
newv = i+base;
|
break;
|
break;
|
} else if ((sbuf[i] != dp[i])&&(newv == 0)) {
|
} else if ((sbuf[i] != dp[i])&&(newv == 0)) {
|
// if (newv == 0)
|
// if (newv == 0)
|
// printf("MEM[%08x] = %08x (!= %08x (Goal))\n",
|
// printf("MEM[%08x] = %08x (!= %08x (Goal))\n",
|
// i+base, sbuf[i], dp[i]);
|
// i+base, sbuf[i], dp[i]);
|
newv = i+base;
|
newv = i+base;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
if (newv == 0)
|
if (newv == 0)
|
continue; // This sector already matches
|
continue; // This sector already matches
|
|
|
// Just erase anyway
|
// Just erase anyway
|
if (!need_erase)
|
if (!need_erase)
|
printf("NO ERASE NEEDED\n");
|
printf("NO ERASE NEEDED\n");
|
else {
|
else {
|
printf("ERASING SECTOR: %08x\n", s);
|
printf("ERASING SECTOR: %08x\n", s);
|
if (!erase_sector(s, verify)) {
|
if (!erase_sector(s, verify)) {
|
printf("SECTOR ERASE FAILED!\n");
|
printf("SECTOR ERASE FAILED!\n");
|
return false;
|
return false;
|
} newv = (s<addr) ? addr : s;
|
} newv = (s<addr) ? addr : s;
|
}
|
}
|
for(unsigned p=newv; (p<s+SECTORSZW)&&(p<addr+len); p=PAGEOF(p+PGLENW)) {
|
for(unsigned p=newv; (p<s+SECTORSZW)&&(p<addr+len); p=PAGEOF(p+PGLENW)) {
|
unsigned start = p, len = addr+len-start;
|
unsigned start = p, len = addr+len-start;
|
|
|
// BUT! if we cross page boundaries, we need to clip
|
// BUT! if we cross page boundaries, we need to clip
|
// our results to the page boundary
|
// our results to the page boundary
|
if (PAGEOF(start+len-1)!=PAGEOF(start))
|
if (PAGEOF(start+len-1)!=PAGEOF(start))
|
len = PAGEOF(start+PGLENW)-start;
|
len = PAGEOF(start+PGLENW)-start;
|
if (!write_page(start, len, &data[p-addr], verify)) {
|
if (!write_page(start, len, &data[p-addr], verify)) {
|
printf("WRITE-PAGE FAILED!\n");
|
printf("WRITE-PAGE FAILED!\n");
|
return false;
|
return false;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
m_fpga->writeio(R_QSPI_EREG, ENABLEWP); // Re-enable write protection
|
m_fpga->writeio(R_QSPI_EREG, ENABLEWP); // Re-enable write protection
|
|
|
return true;
|
return true;
|
}
|
}
|
|
|
|
|
