/*
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/*
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* .--------------. .----------------. .------------.
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* .--------------. .----------------. .------------.
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* | .------------. | .--------------. | .----------. |
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* | .------------. | .--------------. | .----------. |
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* | | ____ ____ | | | ____ ____ | | | ______ | |
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* | | ____ ____ | | | ____ ____ | | | ______ | |
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* | ||_ || _|| | ||_ \ / _|| | | .' ___ || |
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* | ||_ || _|| | ||_ \ / _|| | | .' ___ || |
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* ___ _ __ ___ _ __ | | | |__| | | | | | \/ | | | |/ .' \_|| |
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* ___ _ __ ___ _ __ | | | |__| | | | | | \/ | | | |/ .' \_|| |
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* / _ \| '_ \ / _ \ '_ \ | | | __ | | | | | |\ /| | | | || | | |
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* / _ \| '_ \ / _ \ '_ \ | | | __ | | | | | |\ /| | | | || | | |
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* (_) | |_) | __/ | | || | _| | | |_ | | | _| |_\/_| |_ | | |\ `.___.'\| |
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* (_) | |_) | __/ | | || | _| | | |_ | | | _| |_\/_| |_ | | |\ `.___.'\| |
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* \___/| .__/ \___|_| |_|| ||____||____|| | ||_____||_____|| | | `._____.'| |
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* \___/| .__/ \___|_| |_|| ||____||____|| | ||_____||_____|| | | `._____.'| |
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* | | | | | | | | | | | |
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* | | | | | | | | | | | |
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* |_| | '------------' | '--------------' | '----------' |
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* |_| | '------------' | '--------------' | '----------' |
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* '--------------' '----------------' '------------'
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* '--------------' '----------------' '------------'
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*
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*
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* openHMC - An Open Source Hybrid Memory Cube Controller
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* openHMC - An Open Source Hybrid Memory Cube Controller
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* (C) Copyright 2014 Computer Architecture Group - University of Heidelberg
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* (C) Copyright 2014 Computer Architecture Group - University of Heidelberg
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* www.ziti.uni-heidelberg.de
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* www.ziti.uni-heidelberg.de
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* B6, 26
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* B6, 26
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* 68159 Mannheim
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* 68159 Mannheim
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* Germany
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* Germany
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*
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*
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* Contact: openhmc@ziti.uni-heidelberg.de
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* Contact: openhmc@ziti.uni-heidelberg.de
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* http://ra.ziti.uni-heidelberg.de/openhmc
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* http://ra.ziti.uni-heidelberg.de/openhmc
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*
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*
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* This source file is free software: you can redistribute it and/or modify
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* This source file is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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* (at your option) any later version.
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*
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*
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* This source file is distributed in the hope that it will be useful,
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* This source file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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* GNU Lesser General Public License for more details.
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*
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*
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* You should have received a copy of the GNU Lesser General Public License
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* You should have received a copy of the GNU Lesser General Public License
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* along with this source file. If not, see .
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* along with this source file. If not, see .
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*
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*
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*
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*
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*/
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*/
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//
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//
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//
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//
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// axi4_stream_packet hmc_monitor
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// axi4_stream_packet hmc_monitor
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//
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//
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//
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//
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`ifndef AXI4_STREAM_HMC_MONITOR_SV
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`ifndef AXI4_STREAM_HMC_MONITOR_SV
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`define AXI4_STREAM_HMC_MONITOR_SV
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`define AXI4_STREAM_HMC_MONITOR_SV
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class axi4_stream_hmc_monitor #(parameter DATA_BYTES = 16, parameter TUSER_WIDTH = 16) extends hmc_module_mon ;
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class axi4_stream_hmc_monitor #(parameter DATA_BYTES = 16, parameter TUSER_WIDTH = 16) extends hmc_module_mon ;
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int FPW ;
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int FPW ;
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int HEADERS ;
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int HEADERS ;
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int TAILS ;
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int TAILS ;
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int VALIDS ;
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int VALIDS ;
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int valids_per_cycle = 0;
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int valids_per_cycle = 0;
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int current_packet_length = 0;
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int current_packet_length = 0;
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bit request = 1;
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bit request = 1;
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int flit_delay [$];
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int flit_delay [$];
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//-- uvm_analysis_port #(hmc_packet) item_collected_port;
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//-- uvm_analysis_port #(hmc_packet) item_collected_port;
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uvm_analysis_imp #(
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uvm_analysis_imp #(
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axi4_stream_valid_cycle #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)),
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axi4_stream_valid_cycle #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)),
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axi4_stream_hmc_monitor #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH))
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axi4_stream_hmc_monitor #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH))
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) axi4_port;
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) axi4_port;
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int n_valids = 0;
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int n_valids = 0;
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int headers_seen = 0;
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int headers_seen = 0;
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int tails_seen = 0;
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int tails_seen = 0;
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typedef bit [127:0] flit_t;
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typedef bit [127:0] flit_t;
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flit_t flit_queue[$];
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flit_t flit_queue[$];
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int packets_per_cycle = 0;
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int packets_per_cycle = 0;
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hmc_packet packet_queue[$];
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hmc_packet packet_queue[$];
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//-- covergroup definition
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//-- covergroup definition
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`uvm_component_param_utils(axi4_stream_hmc_monitor #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)))
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`uvm_component_param_utils(axi4_stream_hmc_monitor #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)))
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function new ( string name="axi4_stream_hmc_monitor", uvm_component parent );
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function new ( string name="axi4_stream_hmc_monitor", uvm_component parent );
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super.new(name, parent);
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super.new(name, parent);
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axi4_port = new("axi4_port",this);
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axi4_port = new("axi4_port",this);
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hmc_pkt_cg = new();
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hmc_pkt_cg = new();
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endfunction : new
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endfunction : new
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function void build_phase(uvm_phase phase);
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function void build_phase(uvm_phase phase);
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super.build_phase(phase);
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super.build_phase(phase);
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FPW = DATA_BYTES/16;//-- convert to variables!
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FPW = DATA_BYTES/16;//-- convert to variables!
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HEADERS = FPW;
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HEADERS = FPW;
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TAILS = 2*FPW;
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TAILS = 2*FPW;
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VALIDS = 0;
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VALIDS = 0;
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endfunction : build_phase
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endfunction : build_phase
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//-- Stuff FLITs into a FIFO, separate control signals
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//-- Stuff FLITs into a FIFO, separate control signals
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function void collect_flits(input axi4_stream_valid_cycle #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)) vc);
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function void collect_flits(input axi4_stream_valid_cycle #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)) vc);
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//-- read tuser flags for valid flags
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//-- read tuser flags for valid flags
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flit_t tmp_flit;
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flit_t tmp_flit;
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flit_t current_flit;
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flit_t current_flit;
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packets_per_cycle = 0;
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packets_per_cycle = 0;
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valids_per_cycle =0;
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valids_per_cycle =0;
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for (int i = 0; i
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for (int i = 0; i
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//-- Check if valid
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//-- Check if valid
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if (vc.tuser[VALIDS+i] == 1) begin
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if (vc.tuser[VALIDS+i] == 1) begin
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valids_per_cycle ++;
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valids_per_cycle ++;
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//-- Write 2 flit queue
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//-- Write 2 flit queue
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for (int b=0; b<128; b++)
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for (int b=0; b<128; b++)
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tmp_flit[b] = vc.tdata[128*i+b];
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tmp_flit[b] = vc.tdata[128*i+b];
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flit_queue.push_back(tmp_flit);
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flit_queue.push_back(tmp_flit);
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if (vc.tuser[HEADERS+i] == 1'b1) begin
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if (vc.tuser[HEADERS+i] == 1'b1) begin
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headers_seen++; //-- Complete hmc_packets to assemble
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headers_seen++; //-- Complete hmc_packets to assemble
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packets_per_cycle++;
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packets_per_cycle++;
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flit_delay.push_back(n_valids);
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flit_delay.push_back(n_valids);
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n_valids = 0;
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n_valids = 0;
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end
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end
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//-- Check if tail for complete hmc packet
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//-- Check if tail for complete hmc packet
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if (vc.tuser[TAILS+i] == 1'b1) begin
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if (vc.tuser[TAILS+i] == 1'b1) begin
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tails_seen++; //-- Complete hmc_packets to assemble
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tails_seen++; //-- Complete hmc_packets to assemble
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assert (n_valids == 0)
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assert (n_valids == 0)
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else `uvm_fatal(get_type_name(), $psprintf("Non valid flits in pkt detected!"))
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else `uvm_fatal(get_type_name(), $psprintf("Non valid flits in pkt detected!"))
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end
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end
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//-- Check complete hmc packets
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//-- Check complete hmc packets
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assert (tails_seen<= headers_seen)
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assert (tails_seen<= headers_seen)
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else `uvm_fatal(get_type_name(), $psprintf("packet is null"))
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else `uvm_fatal(get_type_name(), $psprintf("packet is null"))
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assert (headers_seen <= tails_seen+1)
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assert (headers_seen <= tails_seen+1)
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else `uvm_fatal(get_type_name(), $psprintf("Packet without Tail detected"))
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else `uvm_fatal(get_type_name(), $psprintf("Packet without Tail detected"))
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end
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end
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else begin
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else begin
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n_valids ++;
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n_valids ++;
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end
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end
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end
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end
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if(|vc.tuser)
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`uvm_info(get_type_name(),$psprintf("%d header and %d tails available", headers_seen, tails_seen) ,UVM_HIGH)
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`uvm_info(get_type_name(),$psprintf("%d header and %d tails available", headers_seen, tails_seen) ,UVM_HIGH)
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endfunction : collect_flits
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endfunction : collect_flits
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//-- Use FLITs to form packets
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//-- Use FLITs to form packets
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function void collect_packet();
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function void collect_packet();
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flit_t current_flit;
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flit_t current_flit;
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bit bitstream[];
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bit bitstream[];
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//-- Assemble 1 hmc packet
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//-- Assemble 1 hmc packet
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flit_queue_underflow : assert (flit_queue.size() > 0);
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flit_queue_underflow : assert (flit_queue.size() > 0);
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//-- First flit is always header
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//-- First flit is always header
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current_flit = flit_queue.pop_front();
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current_flit = flit_queue.pop_front();
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no_length_mismatches_allowed : assert (current_flit[14:11] == current_flit[10:7]); //--check internal hmc_packet length
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no_length_mismatches_allowed : assert (current_flit[14:11] == current_flit[10:7]); //--check internal hmc_packet length
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current_packet_length = current_flit[10:7];
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current_packet_length = current_flit[10:7];
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`uvm_info(get_type_name(),$psprintf("packet length %0d ", current_packet_length), UVM_HIGH)
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`uvm_info(get_type_name(),$psprintf("queue size %0d ", flit_queue.size()), UVM_HIGH)
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flit_queue_underflow2 : assert (flit_queue.size() >= current_packet_length - 1); //--check check hmc_packet complete received
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flit_queue_underflow2 : assert (flit_queue.size() >= current_packet_length - 1); //--check check hmc_packet complete received
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//-- pack flits 2 bitstream
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//-- pack flits 2 bitstream
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bitstream = new[current_packet_length*128];
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bitstream = new[current_packet_length*128];
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//-- Pack first flit
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//-- Pack first flit
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for (int i=0; i<128; i=i+1)
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for (int i=0; i<128; i=i+1)
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bitstream[i] = current_flit[i];
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bitstream[i] = current_flit[i];
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//-- Get and pack the remaining flits
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//-- Get and pack the remaining flits
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for (int flit=1; flit < current_packet_length; flit ++) begin
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for (int flit=1; flit < current_packet_length; flit ++) begin
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current_flit = flit_queue.pop_front();
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current_flit = flit_queue.pop_front();
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`uvm_info(get_type_name(),$psprintf("pop flit %0d (%0x)", flit, current_flit), UVM_HIGH)
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`uvm_info(get_type_name(),$psprintf("pop flit %0d (%0x)", flit, current_flit), UVM_HIGH)
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for (int i=0; i<128; i=i+1) begin
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for (int i=0; i<128; i=i+1) begin
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bitstream[flit*128+i] = current_flit[i];
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bitstream[flit*128+i] = current_flit[i];
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end
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end
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end
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end
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packet = hmc_packet::type_id::create("packet", this);
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packet = hmc_packet::type_id::create("packet", this);
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void'(packet.unpack(bitstream));
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void'(packet.unpack(bitstream));
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packet.flit_delay = flit_delay.pop_front();
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packet.flit_delay = flit_delay.pop_front();
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hmc_pkt_cg.sample();
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hmc_pkt_cg.sample();
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//-- assembled a packet
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//-- assembled a packet
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headers_seen--;
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headers_seen--;
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tails_seen--;
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tails_seen--;
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if (packet == null) begin
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if (packet == null) begin
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`uvm_fatal(get_type_name(), $psprintf("packet is null"))
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`uvm_fatal(get_type_name(), $psprintf("packet is null"))
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end
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end
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packet_queue.push_back(packet);
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packet_queue.push_back(packet);
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if(packet.get_command_type() == HMC_RESPONSE_TYPE)begin
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if(packet.get_command_type() == HMC_RESPONSE_TYPE)begin
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`uvm_info("RESPONSE collected",$psprintf("Rsp %0d : %s",rsp_rcvd, packet.command.name()), UVM_LOW)
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`uvm_info("RESPONSE collected",$psprintf("Rsp %0d : %s",rsp_rcvd, packet.command.name()), UVM_LOW)
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rsp_rcvd++;
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rsp_rcvd++;
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end else begin
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end else begin
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`uvm_info("REQUEST collected",$psprintf("Req %0d : %s",req_rcvd, packet.command.name()), UVM_LOW)
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`uvm_info("REQUEST collected",$psprintf("Req %0d : %s",req_rcvd, packet.command.name()), UVM_LOW)
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req_rcvd++;
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req_rcvd++;
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end
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end
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`uvm_info("AXI4 to HMC Monitor",$psprintf("\n%s", packet.sprint()), UVM_HIGH)
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`uvm_info("AXI4 to HMC Monitor",$psprintf("\n%s", packet.sprint()), UVM_HIGH)
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endfunction : collect_packet
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endfunction : collect_packet
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function void write(input axi4_stream_valid_cycle #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)) vc);
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function void write(input axi4_stream_valid_cycle #(.DATA_BYTES(DATA_BYTES), .TUSER_WIDTH(TUSER_WIDTH)) vc);
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hmc_packet packet;
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hmc_packet packet;
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`uvm_info(get_type_name(),$psprintf("got valid cycle"), UVM_HIGH)
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collect_flits(vc);
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collect_flits(vc);
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//`uvm_info(get_type_name(),$psprintf("got %0d tails and %0d flits",tails_seen, flit_queue.size() ), UVM_HIGH)
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`uvm_info(get_type_name(),$psprintf("got %0d tails and %0d flits",tails_seen, flit_queue.size() ), UVM_HIGH)
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//-- Convert flit_queue to hmc_packets
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//-- Convert flit_queue to hmc_packets
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while (tails_seen >0) begin
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while (tails_seen >0) begin
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collect_packet();
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collect_packet();
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end
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end
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//-- If flit queue is not empty -> hmc packet striped over 2 axi cycles
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//-- If flit queue is not empty -> hmc packet striped over 2 axi cycles
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while (packet_queue.size()>0) begin
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while (packet_queue.size()>0) begin
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packet = packet_queue.pop_front();
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packet = packet_queue.pop_front();
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//if (packet.command != HMC_ERROR_RESPONSE)
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//if (packet.command != HMC_ERROR_RESPONSE)
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item_collected_port.write(packet);
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item_collected_port.write(packet);
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end
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end
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endfunction
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endfunction
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function void check_phase(uvm_phase phase);
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function void check_phase(uvm_phase phase);
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if (flit_queue.size() >0)
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if (flit_queue.size() >0)
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`uvm_fatal(get_type_name(),$psprintf("flit_queue is not empty: %0d", flit_queue.size()))
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`uvm_fatal(get_type_name(),$psprintf("flit_queue is not empty: %0d", flit_queue.size()))
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endfunction : check_phase
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endfunction : check_phase
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endclass : axi4_stream_hmc_monitor
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endclass : axi4_stream_hmc_monitor
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`endif // AXI4_STREAM_HMC_MONITOR_SV
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`endif // AXI4_STREAM_HMC_MONITOR_SV
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