//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// Copyright (C) 2001 Authors
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// Copyright (C) 2009 , Olivier Girard
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//
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//
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// This source file may be used and distributed without restriction provided
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// Redistribution and use in source and binary forms, with or without
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// that this copyright statement is not removed from the file and that any
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// modification, are permitted provided that the following conditions
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// derivative work contains the original copyright notice and the associated
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// are met:
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// disclaimer.
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// * Redistributions of source code must retain the above copyright
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//
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// notice, this list of conditions and the following disclaimer.
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// This source file is free software; you can redistribute it and/or modify
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// * Redistributions in binary form must reproduce the above copyright
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// it under the terms of the GNU Lesser General Public License as published
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// notice, this list of conditions and the following disclaimer in the
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// by the Free Software Foundation; either version 2.1 of the License, or
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// documentation and/or other materials provided with the distribution.
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// (at your option) any later version.
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// * Neither the name of the authors nor the names of its contributors
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//
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// may be used to endorse or promote products derived from this software
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// This source is distributed in the hope that it will be useful, but WITHOUT
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// without specific prior written permission.
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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//
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// License for more details.
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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//
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// You should have received a copy of the GNU Lesser General Public License
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// along with this source; if not, write to the Free Software Foundation,
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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// Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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// OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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// THE POSSIBILITY OF SUCH DAMAGE
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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//
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//
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// *File Name: openMSP430_defines.v
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// *File Name: openMSP430_defines.v
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//
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//
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// *Module Description:
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// *Module Description:
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// openMSP430 Configuration file
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// openMSP430 Configuration file
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//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 112 $
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// $Rev: 117 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2011-05-21 22:39:47 +0200 (Sat, 21 May 2011) $
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// $LastChangedDate: 2011-06-23 21:30:51 +0200 (Thu, 23 Jun 2011) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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//`define OMSP_NO_INCLUDE
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//`define OMSP_NO_INCLUDE
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`ifdef OMSP_NO_INCLUDE
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`ifdef OMSP_NO_INCLUDE
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`else
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`else
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`include "openMSP430_undefines.v"
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`include "openMSP430_undefines.v"
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`endif
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`endif
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//============================================================================
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//============================================================================
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//============================================================================
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//============================================================================
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// BASIC SYSTEM CONFIGURATION
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// BASIC SYSTEM CONFIGURATION
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//============================================================================
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//============================================================================
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//============================================================================
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//============================================================================
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//
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//
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// Note: the sum of program, data and peripheral memory spaces must not
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// Note: the sum of program, data and peripheral memory spaces must not
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// exceed 64 kB
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// exceed 64 kB
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//
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//
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|
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// Program Memory Size:
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// Program Memory Size:
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// Uncomment the required memory size
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// Uncomment the required memory size
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//-------------------------------------------------------
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//-------------------------------------------------------
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//`define PMEM_SIZE_59_KB
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//`define PMEM_SIZE_59_KB
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//`define PMEM_SIZE_55_KB
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//`define PMEM_SIZE_55_KB
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//`define PMEM_SIZE_54_KB
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//`define PMEM_SIZE_54_KB
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//`define PMEM_SIZE_51_KB
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//`define PMEM_SIZE_51_KB
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//`define PMEM_SIZE_48_KB
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//`define PMEM_SIZE_48_KB
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//`define PMEM_SIZE_41_KB
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//`define PMEM_SIZE_41_KB
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//`define PMEM_SIZE_32_KB
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//`define PMEM_SIZE_32_KB
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//`define PMEM_SIZE_24_KB
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//`define PMEM_SIZE_24_KB
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//`define PMEM_SIZE_16_KB
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//`define PMEM_SIZE_16_KB
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//`define PMEM_SIZE_12_KB
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//`define PMEM_SIZE_12_KB
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//`define PMEM_SIZE_8_KB
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//`define PMEM_SIZE_8_KB
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//`define PMEM_SIZE_4_KB
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//`define PMEM_SIZE_4_KB
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`define PMEM_SIZE_2_KB
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`define PMEM_SIZE_2_KB
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//`define PMEM_SIZE_1_KB
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//`define PMEM_SIZE_1_KB
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// Data Memory Size:
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// Data Memory Size:
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// Uncomment the required memory size
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// Uncomment the required memory size
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//-------------------------------------------------------
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//-------------------------------------------------------
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//`define DMEM_SIZE_32_KB
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//`define DMEM_SIZE_32_KB
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//`define DMEM_SIZE_24_KB
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//`define DMEM_SIZE_24_KB
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//`define DMEM_SIZE_16_KB
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//`define DMEM_SIZE_16_KB
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//`define DMEM_SIZE_10_KB
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//`define DMEM_SIZE_10_KB
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//`define DMEM_SIZE_8_KB
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//`define DMEM_SIZE_8_KB
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//`define DMEM_SIZE_5_KB
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//`define DMEM_SIZE_5_KB
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//`define DMEM_SIZE_4_KB
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//`define DMEM_SIZE_4_KB
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//`define DMEM_SIZE_2p5_KB
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//`define DMEM_SIZE_2p5_KB
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//`define DMEM_SIZE_2_KB
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//`define DMEM_SIZE_2_KB
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//`define DMEM_SIZE_1_KB
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//`define DMEM_SIZE_1_KB
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//`define DMEM_SIZE_512_B
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//`define DMEM_SIZE_512_B
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//`define DMEM_SIZE_256_B
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//`define DMEM_SIZE_256_B
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`define DMEM_SIZE_128_B
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`define DMEM_SIZE_128_B
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// Include/Exclude Hardware Multiplier
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// Include/Exclude Hardware Multiplier
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`define MULTIPLIER
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`define MULTIPLIER
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// Include/Exclude Serial Debug interface
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// Include/Exclude Serial Debug interface
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`define DBG_EN
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`define DBG_EN
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//============================================================================
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//============================================================================
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//============================================================================
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//============================================================================
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// ADVANCED SYSTEM CONFIGURATION (FOR EXPERIENCED USERS)
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// ADVANCED SYSTEM CONFIGURATION (FOR EXPERIENCED USERS)
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//============================================================================
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//============================================================================
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//============================================================================
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//============================================================================
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|
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//-------------------------------------------------------
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//-------------------------------------------------------
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// Peripheral Memory Space:
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// Peripheral Memory Space:
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//-------------------------------------------------------
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//-------------------------------------------------------
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// The original MSP430 architecture map the peripherals
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// The original MSP430 architecture map the peripherals
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// from 0x0000 to 0x01FF (i.e. 512B of the memory space).
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// from 0x0000 to 0x01FF (i.e. 512B of the memory space).
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// The following defines allow you to expand this space
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// The following defines allow you to expand this space
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// up to 32 kB (i.e. from 0x0000 to 0x7fff).
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// up to 32 kB (i.e. from 0x0000 to 0x7fff).
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// As a consequence, the data memory mapping will be
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// As a consequence, the data memory mapping will be
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// shifted up and a custom linker script will therefore
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// shifted up and a custom linker script will therefore
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// be required by the GCC compiler.
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// be required by the GCC compiler.
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//-------------------------------------------------------
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//-------------------------------------------------------
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//`define PER_SIZE_32_KB
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//`define PER_SIZE_32_KB
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//`define PER_SIZE_16_KB
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//`define PER_SIZE_16_KB
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//`define PER_SIZE_8_KB
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//`define PER_SIZE_8_KB
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//`define PER_SIZE_4_KB
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//`define PER_SIZE_4_KB
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//`define PER_SIZE_2_KB
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//`define PER_SIZE_2_KB
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//`define PER_SIZE_1_KB
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//`define PER_SIZE_1_KB
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`define PER_SIZE_512_B
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`define PER_SIZE_512_B
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//-------------------------------------------------------
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//-------------------------------------------------------
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// Defines the debugger CPU_CTL.RST_BRK_EN reset value
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// Defines the debugger CPU_CTL.RST_BRK_EN reset value
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// (CPU break on PUC reset)
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// (CPU break on PUC reset)
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//-------------------------------------------------------
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//-------------------------------------------------------
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// When defined, the CPU will automatically break after
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// When defined, the CPU will automatically break after
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// a PUC occurrence by default. This is typically usefull
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// a PUC occurrence by default. This is typically usefull
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// when the program memory can only be initialized through
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// when the program memory can only be initialized through
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// the serial debug interface.
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// the serial debug interface.
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//-------------------------------------------------------
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//-------------------------------------------------------
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//`define DBG_RST_BRK_EN
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//`define DBG_RST_BRK_EN
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|
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|
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//-------------------------------------------------------
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//-------------------------------------------------------
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// Custom user version number
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// Custom user version number
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//-------------------------------------------------------
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//-------------------------------------------------------
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// This 5 bit field can be freely used in order to allow
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// This 5 bit field can be freely used in order to allow
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// custom identification of the system through the debug
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// custom identification of the system through the debug
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// interface.
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// interface.
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// (see CPU_ID.USER_VERSION field in the documentation)
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// (see CPU_ID.USER_VERSION field in the documentation)
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//-------------------------------------------------------
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//-------------------------------------------------------
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`define USER_VERSION 5'b00000
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`define USER_VERSION 5'b00000
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//============================================================================
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//============================================================================
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//============================================================================
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//============================================================================
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// EXPERT SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )
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// EXPERT SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )
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//============================================================================
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//============================================================================
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//============================================================================
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//============================================================================
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//
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//
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// IMPORTANT NOTE: Please update following configuration options ONLY if
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// IMPORTANT NOTE: Please update following configuration options ONLY if
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// you have a good reason to do so... and if you know what
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// you have a good reason to do so... and if you know what
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// you are doing :-P
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// you are doing :-P
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//
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//
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//============================================================================
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//============================================================================
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|
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//-------------------------------------------------------
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//-------------------------------------------------------
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// Number of hardware breakpoint units (each unit contains
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// Number of hardware breakpoint units (each unit contains
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// two hardware address breakpoints):
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// two hardware address breakpoints):
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// - DBG_HWBRK_0 -> Include hardware breakpoints unit 0
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// - DBG_HWBRK_0 -> Include hardware breakpoints unit 0
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// - DBG_HWBRK_1 -> Include hardware breakpoints unit 1
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// - DBG_HWBRK_1 -> Include hardware breakpoints unit 1
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// - DBG_HWBRK_2 -> Include hardware breakpoints unit 2
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// - DBG_HWBRK_2 -> Include hardware breakpoints unit 2
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// - DBG_HWBRK_3 -> Include hardware breakpoints unit 3
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// - DBG_HWBRK_3 -> Include hardware breakpoints unit 3
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//-------------------------------------------------------
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//-------------------------------------------------------
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// Please keep in mind that hardware breakpoints only
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// Please keep in mind that hardware breakpoints only
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// make sense whenever the program memory is not an SRAM
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// make sense whenever the program memory is not an SRAM
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// (i.e. Flash/OTP/ROM/...) or when you are interested
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// (i.e. Flash/OTP/ROM/...) or when you are interested
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// in data breakpoints (btw. not supported by GDB).
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// in data breakpoints (btw. not supported by GDB).
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//-------------------------------------------------------
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//-------------------------------------------------------
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//`define DBG_HWBRK_0
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//`define DBG_HWBRK_0
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//`define DBG_HWBRK_1
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//`define DBG_HWBRK_1
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//`define DBG_HWBRK_2
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//`define DBG_HWBRK_2
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//`define DBG_HWBRK_3
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//`define DBG_HWBRK_3
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|
|
|
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//-------------------------------------------------------
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//-------------------------------------------------------
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// Enable/Disable the hardware breakpoint RANGE mode
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// Enable/Disable the hardware breakpoint RANGE mode
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//-------------------------------------------------------
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//-------------------------------------------------------
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// When enabled this feature allows the hardware breakpoint
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// When enabled this feature allows the hardware breakpoint
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// units to stop the cpu whenever an instruction or data
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// units to stop the cpu whenever an instruction or data
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// access lays within an address range.
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// access lays within an address range.
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// Note that this feature is not supported by GDB.
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// Note that this feature is not supported by GDB.
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//-------------------------------------------------------
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//-------------------------------------------------------
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//`define DBG_HWBRK_RANGE
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//`define DBG_HWBRK_RANGE
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|
|
|
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//-------------------------------------------------------
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//-------------------------------------------------------
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// Input synchronizers
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// Input synchronizers
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//-------------------------------------------------------
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//-------------------------------------------------------
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// In some cases, the asynchronous input ports might
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// In some cases, the asynchronous input ports might
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// already be synchronized externally.
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// already be synchronized externally.
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// If an extensive CDC design review showed that this
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// If an extensive CDC design review showed that this
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// is really the case, the individual synchronizers
|
// is really the case, the individual synchronizers
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// can be disabled with the following defines.
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// can be disabled with the following defines.
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//
|
//
|
// Notes:
|
// Notes:
|
// - the dbg_en signal will reset the debug interface
|
// - the dbg_en signal will reset the debug interface
|
// when 0. Therefore make sure it is glitch free.
|
// when 0. Therefore make sure it is glitch free.
|
//
|
//
|
// - the dbg_uart_rxd synchronizer must be set to 1
|
// - the dbg_uart_rxd synchronizer must be set to 1
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// when its reset is active.
|
// when its reset is active.
|
//-------------------------------------------------------
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//-------------------------------------------------------
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`define SYNC_CPU_EN
|
`define SYNC_CPU_EN
|
`define SYNC_DBG_EN
|
`define SYNC_DBG_EN
|
`define SYNC_DBG_UART_RXD
|
`define SYNC_DBG_UART_RXD
|
`define SYNC_NMI
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`define SYNC_NMI
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|
|
|
|
|
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//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//===== SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!! =====//
|
//===== SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!! =====//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
|
|
//
|
//
|
// PROGRAM, DATA & PERIPHERAL MEMORY CONFIGURATION
|
// PROGRAM, DATA & PERIPHERAL MEMORY CONFIGURATION
|
//==================================================
|
//==================================================
|
|
|
// Program Memory Size
|
// Program Memory Size
|
`ifdef PMEM_SIZE_59_KB
|
`ifdef PMEM_SIZE_59_KB
|
`define PMEM_AWIDTH 15
|
`define PMEM_AWIDTH 15
|
`define PMEM_SIZE 60416
|
`define PMEM_SIZE 60416
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_55_KB
|
`ifdef PMEM_SIZE_55_KB
|
`define PMEM_AWIDTH 15
|
`define PMEM_AWIDTH 15
|
`define PMEM_SIZE 56320
|
`define PMEM_SIZE 56320
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_54_KB
|
`ifdef PMEM_SIZE_54_KB
|
`define PMEM_AWIDTH 15
|
`define PMEM_AWIDTH 15
|
`define PMEM_SIZE 55296
|
`define PMEM_SIZE 55296
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_51_KB
|
`ifdef PMEM_SIZE_51_KB
|
`define PMEM_AWIDTH 15
|
`define PMEM_AWIDTH 15
|
`define PMEM_SIZE 52224
|
`define PMEM_SIZE 52224
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_48_KB
|
`ifdef PMEM_SIZE_48_KB
|
`define PMEM_AWIDTH 15
|
`define PMEM_AWIDTH 15
|
`define PMEM_SIZE 49152
|
`define PMEM_SIZE 49152
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_41_KB
|
`ifdef PMEM_SIZE_41_KB
|
`define PMEM_AWIDTH 15
|
`define PMEM_AWIDTH 15
|
`define PMEM_SIZE 41984
|
`define PMEM_SIZE 41984
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_32_KB
|
`ifdef PMEM_SIZE_32_KB
|
`define PMEM_AWIDTH 14
|
`define PMEM_AWIDTH 14
|
`define PMEM_SIZE 32768
|
`define PMEM_SIZE 32768
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_24_KB
|
`ifdef PMEM_SIZE_24_KB
|
`define PMEM_AWIDTH 14
|
`define PMEM_AWIDTH 14
|
`define PMEM_SIZE 24576
|
`define PMEM_SIZE 24576
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_16_KB
|
`ifdef PMEM_SIZE_16_KB
|
`define PMEM_AWIDTH 13
|
`define PMEM_AWIDTH 13
|
`define PMEM_SIZE 16384
|
`define PMEM_SIZE 16384
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_12_KB
|
`ifdef PMEM_SIZE_12_KB
|
`define PMEM_AWIDTH 13
|
`define PMEM_AWIDTH 13
|
`define PMEM_SIZE 12288
|
`define PMEM_SIZE 12288
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_8_KB
|
`ifdef PMEM_SIZE_8_KB
|
`define PMEM_AWIDTH 12
|
`define PMEM_AWIDTH 12
|
`define PMEM_SIZE 8192
|
`define PMEM_SIZE 8192
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_4_KB
|
`ifdef PMEM_SIZE_4_KB
|
`define PMEM_AWIDTH 11
|
`define PMEM_AWIDTH 11
|
`define PMEM_SIZE 4096
|
`define PMEM_SIZE 4096
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_2_KB
|
`ifdef PMEM_SIZE_2_KB
|
`define PMEM_AWIDTH 10
|
`define PMEM_AWIDTH 10
|
`define PMEM_SIZE 2048
|
`define PMEM_SIZE 2048
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_1_KB
|
`ifdef PMEM_SIZE_1_KB
|
`define PMEM_AWIDTH 9
|
`define PMEM_AWIDTH 9
|
`define PMEM_SIZE 1024
|
`define PMEM_SIZE 1024
|
`endif
|
`endif
|
|
|
// Data Memory Size
|
// Data Memory Size
|
`ifdef DMEM_SIZE_32_KB
|
`ifdef DMEM_SIZE_32_KB
|
`define DMEM_AWIDTH 14
|
`define DMEM_AWIDTH 14
|
`define DMEM_SIZE 32768
|
`define DMEM_SIZE 32768
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_24_KB
|
`ifdef DMEM_SIZE_24_KB
|
`define DMEM_AWIDTH 14
|
`define DMEM_AWIDTH 14
|
`define DMEM_SIZE 24576
|
`define DMEM_SIZE 24576
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_16_KB
|
`ifdef DMEM_SIZE_16_KB
|
`define DMEM_AWIDTH 13
|
`define DMEM_AWIDTH 13
|
`define DMEM_SIZE 16384
|
`define DMEM_SIZE 16384
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_10_KB
|
`ifdef DMEM_SIZE_10_KB
|
`define DMEM_AWIDTH 13
|
`define DMEM_AWIDTH 13
|
`define DMEM_SIZE 10240
|
`define DMEM_SIZE 10240
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_8_KB
|
`ifdef DMEM_SIZE_8_KB
|
`define DMEM_AWIDTH 12
|
`define DMEM_AWIDTH 12
|
`define DMEM_SIZE 8192
|
`define DMEM_SIZE 8192
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_5_KB
|
`ifdef DMEM_SIZE_5_KB
|
`define DMEM_AWIDTH 12
|
`define DMEM_AWIDTH 12
|
`define DMEM_SIZE 5120
|
`define DMEM_SIZE 5120
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_4_KB
|
`ifdef DMEM_SIZE_4_KB
|
`define DMEM_AWIDTH 11
|
`define DMEM_AWIDTH 11
|
`define DMEM_SIZE 4096
|
`define DMEM_SIZE 4096
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_2p5_KB
|
`ifdef DMEM_SIZE_2p5_KB
|
`define DMEM_AWIDTH 11
|
`define DMEM_AWIDTH 11
|
`define DMEM_SIZE 2560
|
`define DMEM_SIZE 2560
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_2_KB
|
`ifdef DMEM_SIZE_2_KB
|
`define DMEM_AWIDTH 10
|
`define DMEM_AWIDTH 10
|
`define DMEM_SIZE 2048
|
`define DMEM_SIZE 2048
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_1_KB
|
`ifdef DMEM_SIZE_1_KB
|
`define DMEM_AWIDTH 9
|
`define DMEM_AWIDTH 9
|
`define DMEM_SIZE 1024
|
`define DMEM_SIZE 1024
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_512_B
|
`ifdef DMEM_SIZE_512_B
|
`define DMEM_AWIDTH 8
|
`define DMEM_AWIDTH 8
|
`define DMEM_SIZE 512
|
`define DMEM_SIZE 512
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_256_B
|
`ifdef DMEM_SIZE_256_B
|
`define DMEM_AWIDTH 7
|
`define DMEM_AWIDTH 7
|
`define DMEM_SIZE 256
|
`define DMEM_SIZE 256
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_128_B
|
`ifdef DMEM_SIZE_128_B
|
`define DMEM_AWIDTH 6
|
`define DMEM_AWIDTH 6
|
`define DMEM_SIZE 128
|
`define DMEM_SIZE 128
|
`endif
|
`endif
|
|
|
// Peripheral Memory Size
|
// Peripheral Memory Size
|
`ifdef PER_SIZE_32_KB
|
`ifdef PER_SIZE_32_KB
|
`define PER_AWIDTH 14
|
`define PER_AWIDTH 14
|
`define PER_SIZE 32768
|
`define PER_SIZE 32768
|
`endif
|
`endif
|
`ifdef PER_SIZE_16_KB
|
`ifdef PER_SIZE_16_KB
|
`define PER_AWIDTH 13
|
`define PER_AWIDTH 13
|
`define PER_SIZE 16384
|
`define PER_SIZE 16384
|
`endif
|
`endif
|
`ifdef PER_SIZE_8_KB
|
`ifdef PER_SIZE_8_KB
|
`define PER_AWIDTH 12
|
`define PER_AWIDTH 12
|
`define PER_SIZE 8192
|
`define PER_SIZE 8192
|
`endif
|
`endif
|
`ifdef PER_SIZE_4_KB
|
`ifdef PER_SIZE_4_KB
|
`define PER_AWIDTH 11
|
`define PER_AWIDTH 11
|
`define PER_SIZE 4096
|
`define PER_SIZE 4096
|
`endif
|
`endif
|
`ifdef PER_SIZE_2_KB
|
`ifdef PER_SIZE_2_KB
|
`define PER_AWIDTH 10
|
`define PER_AWIDTH 10
|
`define PER_SIZE 2048
|
`define PER_SIZE 2048
|
`endif
|
`endif
|
`ifdef PER_SIZE_1_KB
|
`ifdef PER_SIZE_1_KB
|
`define PER_AWIDTH 9
|
`define PER_AWIDTH 9
|
`define PER_SIZE 1024
|
`define PER_SIZE 1024
|
`endif
|
`endif
|
`ifdef PER_SIZE_512_B
|
`ifdef PER_SIZE_512_B
|
`define PER_AWIDTH 8
|
`define PER_AWIDTH 8
|
`define PER_SIZE 512
|
`define PER_SIZE 512
|
`endif
|
`endif
|
|
|
// Data Memory Base Adresses
|
// Data Memory Base Adresses
|
`define DMEM_BASE `PER_SIZE
|
`define DMEM_BASE `PER_SIZE
|
|
|
// Program & Data Memory most significant address bit (for 16 bit words)
|
// Program & Data Memory most significant address bit (for 16 bit words)
|
`define PMEM_MSB `PMEM_AWIDTH-1
|
`define PMEM_MSB `PMEM_AWIDTH-1
|
`define DMEM_MSB `DMEM_AWIDTH-1
|
`define DMEM_MSB `DMEM_AWIDTH-1
|
`define PER_MSB `PER_AWIDTH-1
|
`define PER_MSB `PER_AWIDTH-1
|
|
|
//
|
//
|
// STATES, REGISTER FIELDS, ...
|
// STATES, REGISTER FIELDS, ...
|
//======================================
|
//======================================
|
|
|
// Instructions type
|
// Instructions type
|
`define INST_SO 0
|
`define INST_SO 0
|
`define INST_JMP 1
|
`define INST_JMP 1
|
`define INST_TO 2
|
`define INST_TO 2
|
|
|
// Single-operand arithmetic
|
// Single-operand arithmetic
|
`define RRC 0
|
`define RRC 0
|
`define SWPB 1
|
`define SWPB 1
|
`define RRA 2
|
`define RRA 2
|
`define SXT 3
|
`define SXT 3
|
`define PUSH 4
|
`define PUSH 4
|
`define CALL 5
|
`define CALL 5
|
`define RETI 6
|
`define RETI 6
|
`define IRQ 7
|
`define IRQ 7
|
|
|
// Conditional jump
|
// Conditional jump
|
`define JNE 0
|
`define JNE 0
|
`define JEQ 1
|
`define JEQ 1
|
`define JNC 2
|
`define JNC 2
|
`define JC 3
|
`define JC 3
|
`define JN 4
|
`define JN 4
|
`define JGE 5
|
`define JGE 5
|
`define JL 6
|
`define JL 6
|
`define JMP 7
|
`define JMP 7
|
|
|
// Two-operand arithmetic
|
// Two-operand arithmetic
|
`define MOV 0
|
`define MOV 0
|
`define ADD 1
|
`define ADD 1
|
`define ADDC 2
|
`define ADDC 2
|
`define SUBC 3
|
`define SUBC 3
|
`define SUB 4
|
`define SUB 4
|
`define CMP 5
|
`define CMP 5
|
`define DADD 6
|
`define DADD 6
|
`define BIT 7
|
`define BIT 7
|
`define BIC 8
|
`define BIC 8
|
`define BIS 9
|
`define BIS 9
|
`define XOR 10
|
`define XOR 10
|
`define AND 11
|
`define AND 11
|
|
|
// Addressing modes
|
// Addressing modes
|
`define DIR 0
|
`define DIR 0
|
`define IDX 1
|
`define IDX 1
|
`define INDIR 2
|
`define INDIR 2
|
`define INDIR_I 3
|
`define INDIR_I 3
|
`define SYMB 4
|
`define SYMB 4
|
`define IMM 5
|
`define IMM 5
|
`define ABS 6
|
`define ABS 6
|
`define CONST 7
|
`define CONST 7
|
|
|
// Instruction state machine
|
// Instruction state machine
|
`define I_IRQ_FETCH 3'h0
|
`define I_IRQ_FETCH 3'h0
|
`define I_IRQ_DONE 3'h1
|
`define I_IRQ_DONE 3'h1
|
`define I_DEC 3'h2
|
`define I_DEC 3'h2
|
`define I_EXT1 3'h3
|
`define I_EXT1 3'h3
|
`define I_EXT2 3'h4
|
`define I_EXT2 3'h4
|
`define I_IDLE 3'h5
|
`define I_IDLE 3'h5
|
|
|
// Execution state machine
|
// Execution state machine
|
`define E_IRQ_0 4'h0
|
`define E_IRQ_0 4'h0
|
`define E_IRQ_1 4'h1
|
`define E_IRQ_1 4'h1
|
`define E_IRQ_2 4'h2
|
`define E_IRQ_2 4'h2
|
`define E_IRQ_3 4'h3
|
`define E_IRQ_3 4'h3
|
`define E_IRQ_4 4'h4
|
`define E_IRQ_4 4'h4
|
`define E_SRC_AD 4'h5
|
`define E_SRC_AD 4'h5
|
`define E_SRC_RD 4'h6
|
`define E_SRC_RD 4'h6
|
`define E_SRC_WR 4'h7
|
`define E_SRC_WR 4'h7
|
`define E_DST_AD 4'h8
|
`define E_DST_AD 4'h8
|
`define E_DST_RD 4'h9
|
`define E_DST_RD 4'h9
|
`define E_DST_WR 4'hA
|
`define E_DST_WR 4'hA
|
`define E_EXEC 4'hB
|
`define E_EXEC 4'hB
|
`define E_JUMP 4'hC
|
`define E_JUMP 4'hC
|
`define E_IDLE 4'hD
|
`define E_IDLE 4'hD
|
|
|
// ALU control signals
|
// ALU control signals
|
`define ALU_SRC_INV 0
|
`define ALU_SRC_INV 0
|
`define ALU_INC 1
|
`define ALU_INC 1
|
`define ALU_INC_C 2
|
`define ALU_INC_C 2
|
`define ALU_ADD 3
|
`define ALU_ADD 3
|
`define ALU_AND 4
|
`define ALU_AND 4
|
`define ALU_OR 5
|
`define ALU_OR 5
|
`define ALU_XOR 6
|
`define ALU_XOR 6
|
`define ALU_DADD 7
|
`define ALU_DADD 7
|
`define ALU_STAT_7 8
|
`define ALU_STAT_7 8
|
`define ALU_STAT_F 9
|
`define ALU_STAT_F 9
|
`define ALU_SHIFT 10
|
`define ALU_SHIFT 10
|
`define EXEC_NO_WR 11
|
`define EXEC_NO_WR 11
|
|
|
// Debug interface
|
// Debug interface
|
`define DBG_UART_WR 18
|
`define DBG_UART_WR 18
|
`define DBG_UART_BW 17
|
`define DBG_UART_BW 17
|
`define DBG_UART_ADDR 16:11
|
`define DBG_UART_ADDR 16:11
|
|
|
// Debug interface CPU_CTL register
|
// Debug interface CPU_CTL register
|
`define HALT 0
|
`define HALT 0
|
`define RUN 1
|
`define RUN 1
|
`define ISTEP 2
|
`define ISTEP 2
|
`define SW_BRK_EN 3
|
`define SW_BRK_EN 3
|
`define FRZ_BRK_EN 4
|
`define FRZ_BRK_EN 4
|
`define RST_BRK_EN 5
|
`define RST_BRK_EN 5
|
`define CPU_RST 6
|
`define CPU_RST 6
|
|
|
// Debug interface CPU_STAT register
|
// Debug interface CPU_STAT register
|
`define HALT_RUN 0
|
`define HALT_RUN 0
|
`define PUC_PND 1
|
`define PUC_PND 1
|
`define SWBRK_PND 3
|
`define SWBRK_PND 3
|
`define HWBRK0_PND 4
|
`define HWBRK0_PND 4
|
`define HWBRK1_PND 5
|
`define HWBRK1_PND 5
|
|
|
// Debug interface BRKx_CTL register
|
// Debug interface BRKx_CTL register
|
`define BRK_MODE_RD 0
|
`define BRK_MODE_RD 0
|
`define BRK_MODE_WR 1
|
`define BRK_MODE_WR 1
|
`define BRK_MODE 1:0
|
`define BRK_MODE 1:0
|
`define BRK_EN 2
|
`define BRK_EN 2
|
`define BRK_I_EN 3
|
`define BRK_I_EN 3
|
`define BRK_RANGE 4
|
`define BRK_RANGE 4
|
|
|
// Basic clock module: BCSCTL1 Control Register
|
// Basic clock module: BCSCTL1 Control Register
|
`define DIVAx 5:4
|
`define DIVAx 5:4
|
|
|
// Basic clock module: BCSCTL2 Control Register
|
// Basic clock module: BCSCTL2 Control Register
|
`define SELS 3
|
`define SELS 3
|
`define DIVSx 2:1
|
`define DIVSx 2:1
|
|
|
|
|
//
|
//
|
// DEBUG INTERFACE EXTRA CONFIGURATION
|
// DEBUG INTERFACE EXTRA CONFIGURATION
|
//======================================
|
//======================================
|
|
|
// Debug interface: CPU version
|
// Debug interface: CPU version
|
`define CPU_VERSION 3'h1
|
`define CPU_VERSION 3'h1
|
|
|
// Debug interface: Software breakpoint opcode
|
// Debug interface: Software breakpoint opcode
|
`define DBG_SWBRK_OP 16'h4343
|
`define DBG_SWBRK_OP 16'h4343
|
|
|
// Debug UART interface auto data synchronization
|
// Debug UART interface auto data synchronization
|
// If the following define is commented out, then
|
// If the following define is commented out, then
|
// the DBG_UART_BAUD and DBG_DCO_FREQ need to be properly
|
// the DBG_UART_BAUD and DBG_DCO_FREQ need to be properly
|
// defined.
|
// defined.
|
`define DBG_UART_AUTO_SYNC
|
`define DBG_UART_AUTO_SYNC
|
|
|
// Debug UART interface data rate
|
// Debug UART interface data rate
|
// In order to properly setup the UART debug interface, you
|
// In order to properly setup the UART debug interface, you
|
// need to specify the DCO_CLK frequency (DBG_DCO_FREQ) and
|
// need to specify the DCO_CLK frequency (DBG_DCO_FREQ) and
|
// the chosen BAUD rate from the UART interface.
|
// the chosen BAUD rate from the UART interface.
|
//
|
//
|
//`define DBG_UART_BAUD 9600
|
//`define DBG_UART_BAUD 9600
|
//`define DBG_UART_BAUD 19200
|
//`define DBG_UART_BAUD 19200
|
//`define DBG_UART_BAUD 38400
|
//`define DBG_UART_BAUD 38400
|
//`define DBG_UART_BAUD 57600
|
//`define DBG_UART_BAUD 57600
|
//`define DBG_UART_BAUD 115200
|
//`define DBG_UART_BAUD 115200
|
//`define DBG_UART_BAUD 230400
|
//`define DBG_UART_BAUD 230400
|
//`define DBG_UART_BAUD 460800
|
//`define DBG_UART_BAUD 460800
|
//`define DBG_UART_BAUD 576000
|
//`define DBG_UART_BAUD 576000
|
//`define DBG_UART_BAUD 921600
|
//`define DBG_UART_BAUD 921600
|
`define DBG_UART_BAUD 2000000
|
`define DBG_UART_BAUD 2000000
|
`define DBG_DCO_FREQ 20000000
|
`define DBG_DCO_FREQ 20000000
|
`define DBG_UART_CNT ((`DBG_DCO_FREQ/`DBG_UART_BAUD)-1)
|
`define DBG_UART_CNT ((`DBG_DCO_FREQ/`DBG_UART_BAUD)-1)
|
|
|
// Debug interface selection
|
// Debug interface selection
|
// `define DBG_UART -> Enable UART (8N1) debug interface
|
// `define DBG_UART -> Enable UART (8N1) debug interface
|
// `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
|
// `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
|
//
|
//
|
`define DBG_UART
|
`define DBG_UART
|
//`define DBG_JTAG
|
//`define DBG_JTAG
|
|
|
// Enable/Disable the hardware breakpoint RANGE mode
|
// Enable/Disable the hardware breakpoint RANGE mode
|
`ifdef DBG_HWBRK_RANGE
|
`ifdef DBG_HWBRK_RANGE
|
`define HWBRK_RANGE 1'b1
|
`define HWBRK_RANGE 1'b1
|
`else
|
`else
|
`define HWBRK_RANGE 1'b0
|
`define HWBRK_RANGE 1'b0
|
`endif
|
`endif
|
|
|
// Counter width for the debug interface UART
|
// Counter width for the debug interface UART
|
`define DBG_UART_XFER_CNT_W 16
|
`define DBG_UART_XFER_CNT_W 16
|
|
|
// Check configuration
|
// Check configuration
|
`ifdef DBG_EN
|
`ifdef DBG_EN
|
`ifdef DBG_UART
|
`ifdef DBG_UART
|
`ifdef DBG_JTAG
|
`ifdef DBG_JTAG
|
CONFIGURATION ERROR: JTAG AND UART DEBUG INTERFACE ARE BOTH ENABLED
|
CONFIGURATION ERROR: JTAG AND UART DEBUG INTERFACE ARE BOTH ENABLED
|
`endif
|
`endif
|
`else
|
`else
|
`ifdef DBG_JTAG
|
`ifdef DBG_JTAG
|
CONFIGURATION ERROR: JTAG INTERFACE NOT SUPPORTED
|
CONFIGURATION ERROR: JTAG INTERFACE NOT SUPPORTED
|
`else
|
`else
|
CONFIGURATION ERROR: JTAG OR UART DEBUG INTERFACE SHOULD BE ENABLED
|
CONFIGURATION ERROR: JTAG OR UART DEBUG INTERFACE SHOULD BE ENABLED
|
`endif
|
`endif
|
`endif
|
`endif
|
`endif
|
`endif
|
|
|
//
|
//
|
// MULTIPLIER CONFIGURATION
|
// MULTIPLIER CONFIGURATION
|
//======================================
|
//======================================
|
|
|
// If uncommented, the following define selects
|
// If uncommented, the following define selects
|
// the 16x16 multiplier (1 cycle) instead of the
|
// the 16x16 multiplier (1 cycle) instead of the
|
// default 16x8 multplier (2 cycles)
|
// default 16x8 multplier (2 cycles)
|
//`define MPY_16x16
|
//`define MPY_16x16
|
|
|
