[timestart] 0
|
[timestart] 2700000
|
[size] 1680 991
|
[size] 1680 990
|
[pos] -1 -1
|
[pos] -678 -4
|
*-21.526770 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
|
*-23.404364 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
|
[treeopen] tb_openMSP430.
|
[treeopen] tb_openMSP430.
|
|
[treeopen] tb_openMSP430.dut.
|
@22
|
@22
|
tb_openMSP430.r15[15:0]
|
tb_openMSP430.r15[15:0]
|
tb_openMSP430.error[31:0]
|
tb_openMSP430.error[31:0]
|
|
tb_openMSP430.dut.pmem_dout[15:0]
|
@820
|
@820
|
tb_openMSP430.inst_full[255:0]
|
tb_openMSP430.inst_full[255:0]
|
@22
|
@22
|
tb_openMSP430.inst_pc[15:0]
|
tb_openMSP430.inst_pc[15:0]
|
@820
|
@820
|
tb_openMSP430.e_state[255:0]
|
tb_openMSP430.e_state[255:0]
|
tb_openMSP430.i_state[255:0]
|
tb_openMSP430.i_state[255:0]
|
@22
|
@22
|
tb_openMSP430.r1[15:0]
|
tb_openMSP430.r1[15:0]
|
tb_openMSP430.r4[15:0]
|
tb_openMSP430.r4[15:0]
|
tb_openMSP430.r6[15:0]
|
tb_openMSP430.r6[15:0]
|
tb_openMSP430.mem250[15:0]
|
tb_openMSP430.mem250[15:0]
|
tb_openMSP430.mem24E[15:0]
|
tb_openMSP430.mem24E[15:0]
|
|
@200
|
|
-
|
|
@28
|
|
(10)tb_openMSP430.wkup[13:0]
|
|
(10)tb_openMSP430.irq[13:0]
|
|
(11)tb_openMSP430.wkup[13:0]
|
|
(11)tb_openMSP430.irq[13:0]
|
|
@200
|
|
-
|
|
@28
|
|
tb_openMSP430.dco_wkup
|
|
tb_openMSP430.dco_enable
|
|
tb_openMSP430.dco_clk
|
|
@200
|
|
-
|
|
@28
|
|
tb_openMSP430.lfxt_wkup
|
|
tb_openMSP430.lfxt_enable
|
|
tb_openMSP430.lfxt_clk
|
|
@200
|
|
-
|
|
@28
|
|
tb_openMSP430.dut.clock_module_0.cpu_en
|
|
@29
|
|
tb_openMSP430.dut.clock_module_0.dbg_en
|
|
@28
|
|
tb_openMSP430.dut.frontend_0.cpuoff
|
|
tb_openMSP430.dut.clock_module_0.oscoff
|
|
tb_openMSP430.dut.clock_module_0.scg0
|
|
tb_openMSP430.dut.clock_module_0.scg1
|
|
@200
|
|
-
|
|
@28
|
|
tb_openMSP430.mclk
|
|
tb_openMSP430.smclk
|
|
tb_openMSP430.aclk
|
|
tb_openMSP430.dbg_clk
|
|
tb_openMSP430.dut.clock_module_0.mclk_enable
|
|
tb_openMSP430.dut.clock_module_0.mclk_wkup
|
|
[pattern_trace] 1
|
|
[pattern_trace] 0
|
|
|
