/*===========================================================================*/
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/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* Copyright (C) 2001 Authors */
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/* */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* disclaimer. */
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/* */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* (at your option) any later version. */
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/* */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* License for more details. */
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/* */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/* */
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/*===========================================================================*/
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/*===========================================================================*/
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/* SINGLE-OPERAND ARITHMETIC: CALL INSTRUCTION */
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/* SINGLE-OPERAND ARITHMETIC: CALL INSTRUCTION */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* Test the CALL instruction. */
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/* Test the CALL instruction. */
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/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 19 $ */
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/* $Rev: 19 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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.set DMEM_BASE, (__data_start )
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.include "pmem_defs.asm"
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.set DMEM_200, (__data_start+0x00)
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.set DMEM_250, (__data_start+0x50)
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.set DMEM_252, (__data_start+0x52)
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.set DMEM_300, (__data_start+0x100)
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.set WDTCTL, 0x0120
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.set IE1, 0x0000
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.set IFG1, 0x0002
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.global main
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.global main
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.macro LPM4
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.macro LPM4
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bis #0x00F0, r2
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bis #0x00F0, r2
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.endm
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.endm
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.macro LPM4_exit
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.macro LPM4_exit
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bic #0x00F0, @r1
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bic #0x00F0, @r1
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.endm
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.endm
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main:
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main:
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mov #DMEM_250, r1 ;# Initialize stack & Enable interrupts
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mov #DMEM_250, r1 ;# Initialize stack & Enable interrupts
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eint
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eint
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mov #0x0000, r6 ;# R6 will be incremented with every NMI serviced interrupts
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mov #0x0000, r6 ;# R6 will be incremented with every NMI serviced interrupts
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mov #0x0000, r7 ;# Save Status register in NMI service routine
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mov #0x0000, r7 ;# Save Status register in NMI service routine
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mov #0x0000, r8 ;# Save Stack register in NMI service routine
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mov #0x0000, r8 ;# Save Stack register in NMI service routine
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;# Test NMI disabled
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;# Test NMI disabled
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;#-----------------------
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;#-----------------------
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mov #0x1000, r15
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mov #0x1000, r15
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mov.b &IFG1, r14 ;# Check reset value
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mov.b &IFG1, r14 ;# Check reset value
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mov #0x1001, r15
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mov #0x1001, r15
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LPM4
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LPM4
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mov #0x0100, r9 ;# Wait a while while .v stimulus plays with NMI pin
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mov #0x0100, r9 ;# Wait a while while .v stimulus plays with NMI pin
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wait_loop_nmi_dis:
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wait_loop_nmi_dis:
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dec r9
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dec r9
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jnz wait_loop_nmi_dis
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jnz wait_loop_nmi_dis
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mov.b &IFG1, r13 ;# Check the flag
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mov.b &IFG1, r13 ;# Check the flag
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bic.b #0x10, &IFG1
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bic.b #0x10, &IFG1
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mov.b &IFG1, r12
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mov.b &IFG1, r12
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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mov.b &IFG1, r11 ;# Wait a while and re-check the flag
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mov.b &IFG1, r11 ;# Wait a while and re-check the flag
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mov #0x1002, r15
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mov #0x1002, r15
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;# Test NMI rising edge
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;# Test NMI rising edge
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;#-----------------------
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;#-----------------------
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mov #0x2000, r15
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mov #0x2000, r15
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mov #0x5a00, &WDTCTL ; NMI Edge selection: rising
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mov #0x5a00, &WDTCTL ; NMI Edge selection: rising
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bic.b #0x10, &IFG1 ; Clear NMI flag
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bic.b #0x10, &IFG1 ; Clear NMI flag
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bis.b #0x10, &IE1 ; Enable NMI
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bis.b #0x10, &IE1 ; Enable NMI
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mov #0x2001, r15
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mov #0x2001, r15
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LPM4
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LPM4
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mov #0x0100, r9 ;# Wait a while
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mov #0x0100, r9 ;# Wait a while
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wait_loop_nmi_re:
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wait_loop_nmi_re:
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dec r9
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dec r9
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jnz wait_loop_nmi_re
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jnz wait_loop_nmi_re
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;# Test NMI falling edge
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;# Test NMI falling edge
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;#-----------------------
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;#-----------------------
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mov #0x3000, r15
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mov #0x3000, r15
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bic.b #0x10, &IE1 ; Disable NMI
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bic.b #0x10, &IE1 ; Disable NMI
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mov #0x5a40, &WDTCTL ; NMI Edge selection: falling
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mov #0x5a40, &WDTCTL ; NMI Edge selection: falling
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bic.b #0x10, &IFG1 ; Clear NMI flag
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bic.b #0x10, &IFG1 ; Clear NMI flag
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bis.b #0x10, &IE1 ; Enable NMI
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bis.b #0x10, &IE1 ; Enable NMI
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0x3001, r15
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mov #0x3001, r15
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LPM4
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LPM4
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mov #0x0100, r9 ;# Wait a while
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mov #0x0100, r9 ;# Wait a while
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wait_loop_nmi_fe:
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wait_loop_nmi_fe:
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dec r9
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dec r9
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jnz wait_loop_nmi_fe
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jnz wait_loop_nmi_fe
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;# Test NMI nested in maskable IRQ
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;# Test NMI nested in maskable IRQ
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;#---------------------------------
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;#---------------------------------
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mov #0x4000, r15
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mov #0x4000, r15
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bic.b #0x10, &IE1 ; Disable NMI
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bic.b #0x10, &IE1 ; Disable NMI
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mov #0x5a00, &WDTCTL ; NMI Edge selection: rising
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mov #0x5a00, &WDTCTL ; NMI Edge selection: rising
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bic.b #0x10, &IFG1 ; Clear NMI flag
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bic.b #0x10, &IFG1 ; Clear NMI flag
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bis.b #0x10, &IE1 ; Enable NMI
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bis.b #0x10, &IE1 ; Enable NMI
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0x4001, r15
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mov #0x4001, r15
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LPM4
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LPM4
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mov #0x0100, r9 ;# Wait a while
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mov #0x0100, r9 ;# Wait a while
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wait_loop_nmi_nested:
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wait_loop_nmi_nested:
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dec r9
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dec r9
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jnz wait_loop_nmi_nested
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jnz wait_loop_nmi_nested
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mov #0x4002, r15
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mov #0x4002, r15
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/* ---------------------- END OF TEST --------------- */
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/* ---------------------- END OF TEST --------------- */
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end_of_test:
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end_of_test:
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nop
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nop
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br #0xffff
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br #0xffff
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/* ---------------------- FUNCTIONS --------------- */
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/* ---------------------- FUNCTIONS --------------- */
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IRQ00_ROUTINE:
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IRQ00_ROUTINE:
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mov #0x5678, r10
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mov #0x5678, r10
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add r6, r10 ; If NMI was taken before, 1 will be added to R10
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add r6, r10 ; If NMI was taken before, 1 will be added to R10
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LPM4_exit
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LPM4_exit
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reti
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reti
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NMI_ROUTINE:
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NMI_ROUTINE:
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mov #0x1234, r10
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mov #0x1234, r10
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inc r6 ; Increment R6
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inc r6 ; Increment R6
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cmp #2, r6
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cmp #2, r6
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jl end_of_nmi
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jl end_of_nmi
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LPM4_exit
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LPM4_exit
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end_of_nmi:
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end_of_nmi:
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mov r2, r7 ; Save Status register
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mov r2, r7 ; Save Status register
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mov r1, r8 ; Save Stack register
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mov r1, r8 ; Save Stack register
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bic.b #0x10, &IFG1 ; Clear NMI flag
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bic.b #0x10, &IFG1 ; Clear NMI flag
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bis.b #0x10, &IE1 ; Enable NMI
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bis.b #0x10, &IE1 ; Enable NMI
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reti
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reti
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/* ---------------------- INTERRUPT VECTORS --------------- */
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/* ---------------------- INTERRUPT VECTORS --------------- */
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.section .vectors, "a"
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.section .vectors, "a"
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.word IRQ00_ROUTINE ; Interrupt 0 (lowest priority)
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.word IRQ00_ROUTINE ; Interrupt 0 (lowest priority)
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.word end_of_test ; Interrupt 1
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.word end_of_test ; Interrupt 1
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.word end_of_test ; Interrupt 2
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.word end_of_test ; Interrupt 2
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.word end_of_test ; Interrupt 3
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.word end_of_test ; Interrupt 3
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.word end_of_test ; Interrupt 4
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.word end_of_test ; Interrupt 4
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.word end_of_test ; Interrupt 5
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.word end_of_test ; Interrupt 5
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.word end_of_test ; Interrupt 6
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.word end_of_test ; Interrupt 6
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.word end_of_test ; Interrupt 7
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.word end_of_test ; Interrupt 7
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.word end_of_test ; Interrupt 8
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.word end_of_test ; Interrupt 8
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.word end_of_test ; Interrupt 9
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.word end_of_test ; Interrupt 9
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.word end_of_test ; Interrupt 10 Watchdog timer
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.word end_of_test ; Interrupt 10 Watchdog timer
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.word end_of_test ; Interrupt 11
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.word end_of_test ; Interrupt 11
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.word end_of_test ; Interrupt 12
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.word end_of_test ; Interrupt 12
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.word end_of_test ; Interrupt 13
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.word end_of_test ; Interrupt 13
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.word NMI_ROUTINE ; Interrupt 14 NMI
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.word NMI_ROUTINE ; Interrupt 14 NMI
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.word main ; Interrupt 15 (highest priority) RESET
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.word main ; Interrupt 15 (highest priority) RESET
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