/*===========================================================================*/
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/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* Copyright (C) 2001 Authors */
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/* */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* disclaimer. */
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/* */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* (at your option) any later version. */
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/* */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* License for more details. */
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/* */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/* */
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/*===========================================================================*/
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/*===========================================================================*/
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/* CPU OPERATING MODES */
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/* CPU OPERATING MODES */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* Test the CPU Operating modes: */
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/* Test the CPU Operating modes: */
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/* - CPUOFF (<=> R2[4]): turn off CPU. */
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/* - CPUOFF (<=> R2[4]): turn off CPU. */
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/* - OSCOFF (<=> R2[5]): turn off LFXT_CLK. */
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/* - OSCOFF (<=> R2[5]): turn off LFXT_CLK. */
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/* - SCG0 (<=> R2[6]): turn off DCO. */
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/* - SCG0 (<=> R2[6]): turn off DCO. */
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/* - SCG1 (<=> R2[7]): turn off SMCLK. */
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/* - SCG1 (<=> R2[7]): turn off SMCLK. */
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/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 95 $ */
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/* $Rev: 95 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2011-02-24 21:37:57 +0100 (Thu, 24 Feb 2011) $ */
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/* $LastChangedDate: 2011-02-24 21:37:57 +0100 (Thu, 24 Feb 2011) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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integer dco_clk_cnt;
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integer dco_clk_cnt;
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always @(negedge dco_clk)
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always @(negedge dco_clk)
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dco_clk_cnt <= dco_clk_cnt+1;
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dco_clk_cnt <= dco_clk_cnt+1;
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integer mclk_cnt;
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integer mclk_cnt;
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always @(negedge mclk)
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always @(negedge mclk)
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mclk_cnt <= mclk_cnt+1;
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mclk_cnt <= mclk_cnt+1;
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integer smclk_cnt;
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integer smclk_cnt;
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always @(negedge smclk)
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always @(negedge smclk)
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smclk_cnt <= smclk_cnt+1;
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smclk_cnt <= smclk_cnt+1;
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integer aclk_cnt;
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integer aclk_cnt;
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always @(negedge aclk)
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always @(negedge aclk)
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aclk_cnt <= aclk_cnt+1;
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aclk_cnt <= aclk_cnt+1;
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integer inst_cnt;
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integer inst_cnt;
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always @(inst_number)
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always @(inst_number)
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inst_cnt = inst_cnt+1;
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inst_cnt = inst_cnt+1;
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// Wakeup synchronizer to generate IRQ
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// Wakeup synchronizer to generate IRQ
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reg [1:0] wkup2_sync;
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reg [1:0] wkup2_sync;
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always @(posedge mclk or posedge puc_rst)
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always @(posedge mclk or posedge puc_rst)
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if (puc_rst) wkup2_sync <= 2'b00;
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if (puc_rst) wkup2_sync <= 2'b00;
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else wkup2_sync <= {wkup2_sync[0], wkup[2]};
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else wkup2_sync <= {wkup2_sync[0], wkup[2]};
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always @(wkup2_sync)
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always @(wkup2_sync)
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irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2
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irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2
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// Wakeup synchronizer to generate IRQ
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// Wakeup synchronizer to generate IRQ
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reg [1:0] wkup3_sync;
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reg [1:0] wkup3_sync;
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always @(posedge mclk or posedge puc_rst)
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always @(posedge mclk or posedge puc_rst)
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if (puc_rst) wkup3_sync <= 2'b00;
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if (puc_rst) wkup3_sync <= 2'b00;
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else wkup3_sync <= {wkup3_sync[0], wkup[3]};
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else wkup3_sync <= {wkup3_sync[0], wkup[3]};
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always @(wkup3_sync)
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always @(wkup3_sync)
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irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3
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irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3
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initial
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initial
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begin
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begin
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$display(" ===============================================");
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$display(" ===============================================");
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$display("| START SIMULATION |");
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$display("| START SIMULATION |");
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$display(" ===============================================");
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$display(" ===============================================");
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repeat(5) @(posedge mclk);
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repeat(5) @(posedge mclk);
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stimulus_done = 0;
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stimulus_done = 0;
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irq[`IRQ_NR-14] = 0; // IRQ-2
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irq[`IRQ_NR-14] = 0; // IRQ-2
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wkup[2] = 0;
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wkup[2] = 0;
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irq[`IRQ_NR-13] = 0; // IRQ-3
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irq[`IRQ_NR-13] = 0; // IRQ-3
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wkup[3] = 0;
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wkup[3] = 0;
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`ifdef ASIC_CLOCKING
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`ifdef ASIC_CLOCKING
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// SCG1 (<=> R2[7]): turn off SMCLK
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// SCG1 (<=> R2[7]): turn off SMCLK
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//--------------------------------------------------------
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//--------------------------------------------------------
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@(r15==16'h1001);
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@(r15==16'h1001);
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 1: SMCLK IS NOT RUNNING =====");
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if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 1: SMCLK IS NOT RUNNING =====");
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smclk_cnt = 0;
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smclk_cnt = 0;
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@(r15==16'h1002);
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@(r15==16'h1002);
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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`ifdef SCG1_EN
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`ifdef SCG1_EN
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if (smclk_cnt !== 0) tb_error("====== SCG1 TEST 2: SMCLK IS NOT STOPPED =====");
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if (smclk_cnt !== 0) tb_error("====== SCG1 TEST 2: SMCLK IS NOT STOPPED =====");
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`else
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`else
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if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 2: SMCLK IS STOPPED =====");
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if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 2: SMCLK IS STOPPED =====");
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`endif
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`endif
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smclk_cnt = 0;
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smclk_cnt = 0;
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@(r15==16'h1003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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@(r15==16'h1003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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wkup[3] = 1'b1;
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wkup[3] = 1'b1;
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@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (50) @(posedge mclk);
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repeat (50) @(posedge mclk);
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 3: SMCLK IS NOT RUNNING DURING IRQ =====");
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 3: SMCLK IS NOT RUNNING DURING IRQ =====");
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smclk_cnt = 0;
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smclk_cnt = 0;
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@(r13==16'hbbbb);
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@(r13==16'hbbbb);
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wkup[3] = 1'b0;
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wkup[3] = 1'b0;
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@(r15==16'h1004);
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@(r15==16'h1004);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (50) @(posedge mclk);
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repeat (50) @(posedge mclk);
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 4: SMCLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 4: SMCLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
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smclk_cnt = 0;
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smclk_cnt = 0;
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@(r15==16'h1005);
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@(r15==16'h1005);
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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`ifdef SCG1_EN
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`ifdef SCG1_EN
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if (smclk_cnt !== 0) tb_error("====== SCG1 TEST 5: SMCLK IS NOT STOPPED =====");
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if (smclk_cnt !== 0) tb_error("====== SCG1 TEST 5: SMCLK IS NOT STOPPED =====");
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`else
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`else
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if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 5: SMCLK IS STOPPED =====");
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if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 5: SMCLK IS STOPPED =====");
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`endif
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`endif
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smclk_cnt = 0;
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smclk_cnt = 0;
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@(r15==16'h1006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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@(r15==16'h1006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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wkup[2] = 1'b1;
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wkup[2] = 1'b1;
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@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (50) @(posedge mclk);
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repeat (50) @(posedge mclk);
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 6: SMCLK IS NOT RUNNING DURING IRQ =====");
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 6: SMCLK IS NOT RUNNING DURING IRQ =====");
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smclk_cnt = 0;
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smclk_cnt = 0;
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@(r13==16'haaaa);
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@(r13==16'haaaa);
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wkup[2] = 1'b0;
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wkup[2] = 1'b0;
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@(r15==16'h1007);
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@(r15==16'h1007);
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (50) @(posedge mclk);
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repeat (50) @(posedge mclk);
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`ifdef SCG1_EN
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`ifdef SCG1_EN
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if (smclk_cnt !== 0) tb_error("====== SCG1 TEST 7: SMCLK IS NOT STOPPED WHEN RETURNING FROM IRQ =====");
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if (smclk_cnt !== 0) tb_error("====== SCG1 TEST 7: SMCLK IS NOT STOPPED WHEN RETURNING FROM IRQ =====");
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`else
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`else
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 7: SMCLK IS STOPPED WHEN RETURNING FROM IRQ =====");
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 7: SMCLK IS STOPPED WHEN RETURNING FROM IRQ =====");
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`endif
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`endif
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smclk_cnt = 0;
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smclk_cnt = 0;
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@(r15==16'h1008);
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@(r15==16'h1008);
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (50) @(posedge mclk);
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repeat (50) @(posedge mclk);
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 8: SMCLK IS NOT RUNNING =====");
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 8: SMCLK IS NOT RUNNING =====");
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smclk_cnt = 0;
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smclk_cnt = 0;
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// OSCOFF (<=> R2[5]): turn off LFXT1CLK
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// OSCOFF (<=> R2[5]): turn off LFXT1CLK
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//--------------------------------------------------------
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//--------------------------------------------------------
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@(r15==16'h2001);
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@(r15==16'h2001);
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (200) @(posedge mclk);
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repeat (200) @(posedge mclk);
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`ifdef LFXT_DOMAIN
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`ifdef LFXT_DOMAIN
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if (aclk_cnt !== 7) tb_error("====== OSCOFF TEST 1: ACLK IS NOT RUNNING =====");
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if (aclk_cnt !== 7) tb_error("====== OSCOFF TEST 1: ACLK IS NOT RUNNING =====");
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`else
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`else
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if (aclk_cnt !== 200) tb_error("====== OSCOFF TEST 1: ACLK IS NOT RUNNING =====");
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if (aclk_cnt !== 200) tb_error("====== OSCOFF TEST 1: ACLK IS NOT RUNNING =====");
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`endif
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`endif
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aclk_cnt = 0;
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aclk_cnt = 0;
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@(r15==16'h2002);
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@(r15==16'h2002);
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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`ifdef OSCOFF_EN
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`ifdef OSCOFF_EN
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if (aclk_cnt !== 0) tb_error("====== OSCOFF TEST 2: ACLK IS NOT STOPPED =====");
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if (aclk_cnt !== 0) tb_error("====== OSCOFF TEST 2: ACLK IS NOT STOPPED =====");
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`else
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`else
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if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 2: ACLK IS STOPPED =====");
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if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 2: ACLK IS STOPPED =====");
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`endif
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`endif
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aclk_cnt = 0;
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aclk_cnt = 0;
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@(r15==16'h2003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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@(r15==16'h2003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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wkup[3] = 1'b1;
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wkup[3] = 1'b1;
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@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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`ifdef LFXT_DOMAIN
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`ifdef LFXT_DOMAIN
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if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");
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if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");
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`else
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`else
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if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");
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if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");
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`endif
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`endif
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aclk_cnt = 0;
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aclk_cnt = 0;
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@(r13==16'hbbbb);
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@(r13==16'hbbbb);
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wkup[3] = 1'b0;
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wkup[3] = 1'b0;
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@(r15==16'h2004);
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@(r15==16'h2004);
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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`ifdef LFXT_DOMAIN
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`ifdef LFXT_DOMAIN
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if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 4: ACLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
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if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 4: ACLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
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`else
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`else
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if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 4: ACLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
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if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 4: ACLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
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`endif
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`endif
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aclk_cnt = 0;
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aclk_cnt = 0;
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@(r15==16'h2005);
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@(r15==16'h2005);
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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`ifdef OSCOFF_EN
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`ifdef OSCOFF_EN
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if (aclk_cnt !== 0) tb_error("====== OSCOFF TEST 5: ACLK IS NOT STOPPED =====");
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if (aclk_cnt !== 0) tb_error("====== OSCOFF TEST 5: ACLK IS NOT STOPPED =====");
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`else
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`else
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if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 5: ACLK IS STOPPED =====");
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if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 5: ACLK IS STOPPED =====");
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`endif
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`endif
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aclk_cnt = 0;
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aclk_cnt = 0;
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@(r15==16'h2006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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@(r15==16'h2006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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wkup[2] = 1'b1;
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wkup[2] = 1'b1;
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@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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`ifdef LFXT_DOMAIN
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`ifdef LFXT_DOMAIN
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if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");
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if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");
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`else
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`else
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if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");
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if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");
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`endif
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`endif
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aclk_cnt = 0;
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aclk_cnt = 0;
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@(r13==16'haaaa);
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@(r13==16'haaaa);
|
wkup[2] = 1'b0;
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wkup[2] = 1'b0;
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|
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@(r15==16'h2007);
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@(r15==16'h2007);
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
|
aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (100) @(posedge mclk);
|
repeat (100) @(posedge mclk);
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`ifdef OSCOFF_EN
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`ifdef OSCOFF_EN
|
if (aclk_cnt !== 0) tb_error("====== OSCOFF TEST 7: ACLK IS NOT STOPPED WHEN RETURNING FROM IRQ =====");
|
if (aclk_cnt !== 0) tb_error("====== OSCOFF TEST 7: ACLK IS NOT STOPPED WHEN RETURNING FROM IRQ =====");
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`else
|
`else
|
if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 7: ACLK IS STOPPED WHEN RETURNING FROM IRQ =====");
|
if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 7: ACLK IS STOPPED WHEN RETURNING FROM IRQ =====");
|
`endif
|
`endif
|
aclk_cnt = 0;
|
aclk_cnt = 0;
|
|
|
|
|
@(r15==16'h2008);
|
@(r15==16'h2008);
|
repeat (100) @(posedge mclk);
|
repeat (100) @(posedge mclk);
|
aclk_cnt = 0;
|
aclk_cnt = 0;
|
repeat (100) @(posedge mclk);
|
repeat (100) @(posedge mclk);
|
`ifdef LFXT_DOMAIN
|
`ifdef LFXT_DOMAIN
|
if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 8: ACLK IS NOT RUNNING =====");
|
if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 8: ACLK IS NOT RUNNING =====");
|
`else
|
`else
|
if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 8: ACLK IS NOT RUNNING =====");
|
if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 8: ACLK IS NOT RUNNING =====");
|
`endif
|
`endif
|
aclk_cnt = 0;
|
aclk_cnt = 0;
|
|
|
|
|
// CPUOFF (<=> R2[4]): turn off CPU
|
// CPUOFF (<=> R2[4]): turn off CPU
|
//--------------------------------------------------------
|
//--------------------------------------------------------
|
|
|
@(r15==16'h3001);
|
@(r15==16'h3001);
|
repeat (10) @(negedge dco_clk);
|
repeat (10) @(negedge dco_clk);
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
repeat (80) @(negedge dco_clk);
|
repeat (80) @(negedge dco_clk);
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 1: CPU IS NOT RUNNING =====");
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 1: CPU IS NOT RUNNING =====");
|
|
|
@(r15==16'h3002);
|
@(r15==16'h3002);
|
repeat (10) @(negedge dco_clk);
|
repeat (10) @(negedge dco_clk);
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
repeat (80) @(negedge dco_clk);
|
repeat (80) @(negedge dco_clk);
|
if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 2: CPU IS NOT STOPPED =====");
|
if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 2: CPU IS NOT STOPPED =====");
|
|
|
@(posedge dco_clk); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
|
@(posedge dco_clk); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
|
wkup[2] = 1'b1;
|
wkup[2] = 1'b1;
|
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
|
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
|
repeat(10) @(negedge dco_clk);
|
repeat(10) @(negedge dco_clk);
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
repeat (80) @(negedge dco_clk);
|
repeat (80) @(negedge dco_clk);
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 3: CPU IS NOT RUNNING DURING IRQ (PORT 1) =====");
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 3: CPU IS NOT RUNNING DURING IRQ (PORT 1) =====");
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
@(r13==16'haaaa);
|
@(r13==16'haaaa);
|
wkup[2] = 1'b0;
|
wkup[2] = 1'b0;
|
|
|
@(r1==(`PER_SIZE+16'h0050));
|
@(r1==(`PER_SIZE+16'h0050));
|
repeat (10) @(negedge dco_clk);
|
repeat (10) @(negedge dco_clk);
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
repeat (80) @(negedge dco_clk);
|
repeat (80) @(negedge dco_clk);
|
if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 4: CPU IS NOT STOPPED AFTER IRQ =====");
|
if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 4: CPU IS NOT STOPPED AFTER IRQ =====");
|
|
|
|
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
|
wkup[3] = 1'b1;
|
wkup[3] = 1'b1;
|
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
|
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
|
repeat (10) @(posedge dco_clk);
|
repeat (10) @(posedge dco_clk);
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
repeat (80) @(posedge dco_clk);
|
repeat (80) @(posedge dco_clk);
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 5: CPU IS NOT RUNNING DURING IRQ =====");
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 5: CPU IS NOT RUNNING DURING IRQ =====");
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
@(r13==16'hbbbb);
|
@(r13==16'hbbbb);
|
wkup[3] = 1'b0;
|
wkup[3] = 1'b0;
|
|
|
@(r1==(`PER_SIZE+16'h0050));
|
@(r1==(`PER_SIZE+16'h0050));
|
repeat (10) @(negedge dco_clk);
|
repeat (10) @(negedge dco_clk);
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
repeat (80) @(negedge dco_clk);
|
repeat (80) @(negedge dco_clk);
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 6: CPU IS NOT RUNNING AFTER IRQ =====");
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 6: CPU IS NOT RUNNING AFTER IRQ =====");
|
|
|
|
|
|
|
@(r15==16'h3003);
|
@(r15==16'h3003);
|
repeat (10) @(posedge dco_clk);
|
repeat (10) @(posedge dco_clk);
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
repeat (80) @(posedge dco_clk);
|
repeat (80) @(posedge dco_clk);
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 7: CPU IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
|
if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 7: CPU IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
|
mclk_cnt = 0;
|
mclk_cnt = 0;
|
|
|
|
|
|
|
// SCG0 (<=> R2[6]): turn off DCO oscillator
|
// SCG0 (<=> R2[6]): turn off DCO oscillator
|
//--------------------------------------------------------
|
//--------------------------------------------------------
|
|
|
@(r15==16'h4001);
|
@(r15==16'h4001);
|
#(10*50);
|
#(10*50);
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
#(80*50);
|
#(80*50);
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 1: DCO IS NOT RUNNING =====");
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 1: DCO IS NOT RUNNING =====");
|
|
|
@(r15==16'h4002);
|
@(r15==16'h4002);
|
#(10*50);
|
#(10*50);
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
#(80*50);
|
#(80*50);
|
if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 2: DCO IS NOT STOPPED =====");
|
if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 2: DCO IS NOT STOPPED =====");
|
|
|
|
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
|
wkup[2] = 1'b1;
|
wkup[2] = 1'b1;
|
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
|
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
|
#(10*50);
|
#(10*50);
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
#(80*50);
|
#(80*50);
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 3: DCO IS NOT RUNNING DURING IRQ (PORT 1) =====");
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 3: DCO IS NOT RUNNING DURING IRQ (PORT 1) =====");
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
@(r13==16'haaaa);
|
@(r13==16'haaaa);
|
wkup[2] = 1'b0;
|
wkup[2] = 1'b0;
|
|
|
#(10*50);
|
#(10*50);
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
#(80*50);
|
#(80*50);
|
if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 4: DCO IS NOT STOPPED AFTER IRQ =====");
|
if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 4: DCO IS NOT STOPPED AFTER IRQ =====");
|
|
|
|
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
|
wkup[3] = 1'b1;
|
wkup[3] = 1'b1;
|
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
|
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
|
#(10*50);
|
#(10*50);
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
#(80*50);
|
#(80*50);
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 5: DCO IS NOT RUNNING DURING IRQ =====");
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 5: DCO IS NOT RUNNING DURING IRQ =====");
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
@(r13==16'hbbbb);
|
@(r13==16'hbbbb);
|
wkup[3] = 1'b0;
|
wkup[3] = 1'b0;
|
|
|
#(10*50);
|
#(10*50);
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
#(80*50);
|
#(80*50);
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 6: DCO IS NOT RUNNING AFTER IRQ =====");
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 6: DCO IS NOT RUNNING AFTER IRQ =====");
|
|
|
|
|
|
|
@(r15==16'h4003);
|
@(r15==16'h4003);
|
#(10*50);
|
#(10*50);
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
#(80*50);
|
#(80*50);
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 7: DCO IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
|
if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 7: DCO IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
|
dco_clk_cnt = 0;
|
dco_clk_cnt = 0;
|
|
|
|
|
|
|
`else
|
`else
|
$display(" ===============================================");
|
tb_skip_finish("| (this test is not supported in FPGA mode) |");
|
$display("| SIMULATION SKIPPED |");
|
|
$display("| (this test is not supported in FPGA mode) |");
|
|
$display(" ===============================================");
|
|
$finish;
|
|
`endif
|
`endif
|
|
|
stimulus_done = 1;
|
stimulus_done = 1;
|
end
|
end
|
|
|
|
|
No newline at end of file
|
No newline at end of file
|