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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_call_rom-rd.s43] - Diff between revs 111 and 141

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/*===========================================================================*/
/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/* disclaimer.                                                               */
/*                                                                           */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/* (at your option) any later version.                                       */
/*                                                                           */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/* License for more details.                                                 */
/*                                                                           */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*                                                                           */
/*===========================================================================*/
/*===========================================================================*/
/*                     CALL:   DATA READ ACCESS FROM ROM                     */
/*                     CALL:   DATA READ ACCESS FROM ROM                     */
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
/* Test the CALL instruction with all addressing modes making a read access  */
/* Test the CALL instruction with all addressing modes making a read access  */
/* to the ROM.                                                               */
/* to the ROM.                                                               */
/*                                                                           */
/*                                                                           */
/* Author(s):                                                                */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
/* $Rev: 111 $                                                                */
/* $Rev: 141 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $          */
/* $LastChangedDate: 2012-05-05 23:22:06 +0200 (Sat, 05 May 2012) $          */
/*===========================================================================*/
/*===========================================================================*/
 
 
.set    DMEM_BASE, (__data_start     )
.include "pmem_defs.asm"
.set    DMEM_200,  (__data_start+0x00)
 
.set    DMEM_212,  (__data_start+0x12)
 
.set    DMEM_216,  (__data_start+0x16)
 
.set    DMEM_21A,  (__data_start+0x1A)
 
.set    DMEM_21E,  (__data_start+0x1E)
 
.set    DMEM_220,  (__data_start+0x20)
 
.set    DMEM_250,  (__data_start+0x50)
 
.set    DMEM_252,  (__data_start+0x52)
 
.set    DMEM_300,  (__data_start+0x100)
 
 
 
.global main
.global main
main:
main:
        # Initialization
        # Initialization
        #------------------------
        #------------------------
        mov   #DMEM_252, r1        ;# Initialize stack pointer
        mov   #DMEM_252, r1        ;# Initialize stack pointer
        mov     #0x0000, r5        ;# Initialize R5
        mov     #0x0000, r5        ;# Initialize R5
        mov     #0x1000, r15
        mov     #0x1000, r15
        # Addressing mode: @Rn
        # Addressing mode: @Rn
        #------------------------
        #------------------------
        mov    #data_aRn_call, r4
        mov    #data_aRn_call, r4
        mov           #0x0000, r5
        mov           #0x0000, r5
        call                  @r4           ;# CALL TEST_ROUTINE_aRN
        call                  @r4           ;# CALL TEST_ROUTINE_aRN
        mov     #0x2000, r15
        mov     #0x2000, r15
        # Addressing mode: @Rn+
        # Addressing mode: @Rn+
        #------------------------
        #------------------------
        mov    #data_aRni_call, r4
        mov    #data_aRni_call, r4
        mov            #0x0000, r5
        mov            #0x0000, r5
        call                   @r4+         ;# CALL TEST_ROUTINE_aRNi
        call                   @r4+         ;# CALL TEST_ROUTINE_aRNi
        mov     #0x3000, r15
        mov     #0x3000, r15
        # Addressing mode: X(Rn)
        # Addressing mode: X(Rn)
        #------------------------
        #------------------------
        mov    #data_xRn_call, r4
        mov    #data_xRn_call, r4
        mov           #0x0000, r5
        mov           #0x0000, r5
        call                26(r4)          ;# CALL TEST_ROUTINE_xRN
        call                26(r4)          ;# CALL TEST_ROUTINE_xRN
        mov     #0x4000, r15
        mov     #0x4000, r15
        # Addressing mode: EDE
        # Addressing mode: EDE
        #------------------------
        #------------------------
.set   EDE_21E,  DMEM_21E
.set   EDE_21E,  DMEM_21E
        mov     #0x0000, r5
        mov     #0x0000, r5
        call    data_EDE_call               ;# CALL TEST_ROUTINE_EDE
        call    data_EDE_call               ;# CALL TEST_ROUTINE_EDE
        mov     #0x5000, r15
        mov     #0x5000, r15
        # Addressing mode: &EDE
        # Addressing mode: &EDE
        #------------------------
        #------------------------
.set   aEDE_220,  DMEM_220
.set   aEDE_220,  DMEM_220
        mov     #0x0000, r5
        mov     #0x0000, r5
        call  &data_aEDE_call               ;# CALL TEST_ROUTINE_aEDE
        call  &data_aEDE_call               ;# CALL TEST_ROUTINE_aEDE
        mov     #0x6000, r15
        mov     #0x6000, r15
        /* ----------------------         END OF TEST        --------------- */
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
end_of_test:
        nop
        nop
        br #0xffff
        br #0xffff
        /* ----------------------         TEST FUNCTIONS     --------------- */
        /* ----------------------         TEST FUNCTIONS     --------------- */
TEST_ROUTINE_RN:
TEST_ROUTINE_RN:
        mov #0x1234, r5
        mov #0x1234, r5
        ret
        ret
TEST_ROUTINE_aRN:
TEST_ROUTINE_aRN:
        mov #0x5678, r5
        mov #0x5678, r5
        ret
        ret
TEST_ROUTINE_aRNi:
TEST_ROUTINE_aRNi:
        mov #0x9abc, r5
        mov #0x9abc, r5
        ret
        ret
TEST_ROUTINE_N:
TEST_ROUTINE_N:
        mov #0xabcd, r5
        mov #0xabcd, r5
        ret
        ret
TEST_ROUTINE_xRN:
TEST_ROUTINE_xRN:
        mov #0xef01, r5
        mov #0xef01, r5
        ret
        ret
TEST_ROUTINE_EDE:
TEST_ROUTINE_EDE:
        mov #0x2345, r5
        mov #0x2345, r5
        ret
        ret
TEST_ROUTINE_aEDE:
TEST_ROUTINE_aEDE:
        mov #0x6789, r5
        mov #0x6789, r5
        ret
        ret
        /* ----------------------            DATA TABLE      --------------- */
        /* ----------------------            DATA TABLE      --------------- */
data_aRn_call:
data_aRn_call:
        .word TEST_ROUTINE_aRN
        .word TEST_ROUTINE_aRN
data_aRni_call:
data_aRni_call:
        .word TEST_ROUTINE_aRNi
        .word TEST_ROUTINE_aRNi
data_xRn_call:
data_xRn_call:
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word 0x0000
        .word TEST_ROUTINE_xRN
        .word TEST_ROUTINE_xRN
data_EDE_call:
data_EDE_call:
        .word TEST_ROUTINE_EDE
        .word TEST_ROUTINE_EDE
data_aEDE_call:
data_aEDE_call:
        .word TEST_ROUTINE_aEDE
        .word TEST_ROUTINE_aEDE
        /* ----------------------         INTERRUPT VECTORS  --------------- */
        /* ----------------------         INTERRUPT VECTORS  --------------- */
.section .vectors, "a"
.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  1                      
.word end_of_test  ; Interrupt  1                      
.word end_of_test  ; Interrupt  2                      
.word end_of_test  ; Interrupt  2                      
.word end_of_test  ; Interrupt  3                      
.word end_of_test  ; Interrupt  3                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  9                      
.word end_of_test  ; Interrupt  9                      
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 14                      NMI
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET
.word main         ; Interrupt 15 (highest priority)   RESET
 
 

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