/*===========================================================================*/
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/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* Copyright (C) 2001 Authors */
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/* */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* disclaimer. */
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/* */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* (at your option) any later version. */
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/* */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* License for more details. */
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/* */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/* */
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/*===========================================================================*/
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/*===========================================================================*/
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/* SINGLE-OPERAND ARITHMETIC: PUSH INSTRUCTION */
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/* SINGLE-OPERAND ARITHMETIC: PUSH INSTRUCTION */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* Test the PUSH instruction. */
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/* Test the PUSH instruction. */
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/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 141 $ */
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/* $Rev: 200 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2012-05-05 23:22:06 +0200 (Sat, 05 May 2012) $ */
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/* $LastChangedDate: 2015-01-21 23:01:31 +0100 (Wed, 21 Jan 2015) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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.include "pmem_defs.asm"
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.include "pmem_defs.asm"
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.global main
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.global main
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main:
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main:
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/* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
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/* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
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# Initialization
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# Initialization
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#------------------------
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#------------------------
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mov #0x0050, r4 ;# Initialize RAM
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mov #0x0050, r4 ;# Initialize RAM
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mov #DMEM_200, r5
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mov #DMEM_200, r5
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clear_mem_loop:
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clear_mem_loop:
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clr 0(r5)
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clr 0(r5)
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incd r5
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incd r5
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dec r4
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dec r4
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jnz clear_mem_loop
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jnz clear_mem_loop
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mov #DMEM_252, r1 ;# Initialize stack pointer
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mov #DMEM_252, r1 ;# Initialize stack pointer
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mov #0x1000, r15
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mov #0x1000, r15
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# Addressing mode: Rn
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# Addressing mode: Rn
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#------------------------
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#------------------------
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mov #0x7524, r4
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mov #0x7524, r4
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push r4 ;# PUSH (r4=0x7524 => @=0x0250)
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push r4 ;# PUSH (r4=0x7524 => @=0x0250)
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mov #0x1cb6, r6
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mov #0x1cb6, r6
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push r6 ;# PUSH (r6=0x1cb6 => @=0x024E)
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push r6 ;# PUSH (r6=0x1cb6 => @=0x024E)
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mov #0x2000, r15
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mov #0x2000, r15
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# Addressing mode: @Rn
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# Addressing mode: @Rn
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#------------------------
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#------------------------
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mov #DMEM_212, r4
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mov #DMEM_212, r4
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mov #0x1234, &DMEM_212
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mov #0x1234, &DMEM_212
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push @r4 ;# PUSH (0x1234 => @=0x024C)
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push @r4 ;# PUSH (0x1234 => @=0x024C)
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mov #DMEM_214, r6
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mov #DMEM_214, r6
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mov #0x5678, &DMEM_214
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mov #0x5678, &DMEM_214
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push @r6 ;# PUSH (0x5678 => @=0x024A)
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push @r6 ;# PUSH (0x5678 => @=0x024A)
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mov #0x3000, r15
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mov #0x3000, r15
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# Addressing mode: @Rn+
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# Addressing mode: @Rn+
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#------------------------
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#------------------------
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mov #DMEM_216, r4
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mov #DMEM_216, r4
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mov #0x9abc, &DMEM_216
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mov #0x9abc, &DMEM_216
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push @r4+ ;# PUSH (0x9abc => @=0x0248)
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push @r4+ ;# PUSH (0x9abc => @=0x0248)
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mov #0xdef0, &DMEM_218
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mov #0xdef0, &DMEM_218
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push @r4+ ;# PUSH (0xdef0 => @=0x0246)
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push @r4+ ;# PUSH (0xdef0 => @=0x0246)
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mov #0x4000, r15
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mov #0x4000, r15
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# Addressing mode: X(Rn)
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# Addressing mode: X(Rn)
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#------------------------
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#------------------------
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mov #DMEM_200, r4
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mov #DMEM_200, r4
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mov #0x0fed, &DMEM_21A
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mov #0x0fed, &DMEM_21A
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push 26(r4) ;# PUSH (0x0fed => @=0x0244)
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push 26(r4) ;# PUSH (0x0fed => @=0x0244)
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mov #0xcba9, &DMEM_21C
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mov #0xcba9, &DMEM_21C
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push 28(r4) ;# PUSH (0xcba9 => @=0x0242)
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push 28(r4) ;# PUSH (0xcba9 => @=0x0242)
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mov #0x5000, r15
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mov #0x5000, r15
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# Addressing mode: EDE
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# Addressing mode: EDE
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#------------------------
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#------------------------
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.set EDE_21E, DMEM_21E
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.set EDE_21E, DMEM_21E+PMEM_EDE_LENGTH
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.set EDE_220, DMEM_220
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.set EDE_220, DMEM_220+PMEM_EDE_LENGTH
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mov #DMEM_200, r4
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mov #DMEM_200, r4
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mov #0x8765, &DMEM_21E
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mov #0x8765, &DMEM_21E
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push EDE_21E+PMEM_LENGTH ;# PUSH (0x8765 => @=0x0240)
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push EDE_21E ;# PUSH (0x8765 => @=0x0240)
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mov #0x4321, &DMEM_220
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mov #0x4321, &DMEM_220
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push EDE_220+PMEM_LENGTH ;# PUSH (0x4321 => @=0x023E)
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push EDE_220 ;# PUSH (0x4321 => @=0x023E)
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mov #0x6000, r15
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mov #0x6000, r15
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# Addressing mode: &EDE
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# Addressing mode: &EDE
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#------------------------
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#------------------------
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.set aEDE_222, DMEM_222
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.set aEDE_222, DMEM_222
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.set aEDE_224, DMEM_224
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.set aEDE_224, DMEM_224
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mov #DMEM_200, r4
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mov #DMEM_200, r4
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mov #0x1f2e, &DMEM_222
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mov #0x1f2e, &DMEM_222
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push &aEDE_222 ;# PUSH (0x1f2e => @=0x023C)
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push &aEDE_222 ;# PUSH (0x1f2e => @=0x023C)
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mov #0x3d4c, &DMEM_224
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mov #0x3d4c, &DMEM_224
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push &aEDE_224 ;# PUSH (0x3d4c => @=0x023A)
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push &aEDE_224 ;# PUSH (0x3d4c => @=0x023A)
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mov #0x7000, r15
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mov #0x7000, r15
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# Addressing mode: #N
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# Addressing mode: #N
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#------------------------
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#------------------------
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push #0x71c8 ;# PUSH (0x71c8 => @=0x0238)
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push #0x71c8 ;# PUSH (0x71c8 => @=0x0238)
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push #0x178c ;# PUSH (0x178c => @=0x0236)
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push #0x178c ;# PUSH (0x178c => @=0x0236)
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mov #0x7001, r15
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mov #0x7001, r15
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/* -------------- TEST INSTRUCTION IN BYTE MODE ------------------- */
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/* -------------- TEST INSTRUCTION IN BYTE MODE ------------------- */
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# Initialization
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# Initialization
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#------------------------
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#------------------------
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mov #DMEM_252, r1 ;# Initialize stack pointer
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mov #DMEM_252, r1 ;# Initialize stack pointer
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mov #0x8000, r15
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mov #0x8000, r15
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# Addressing mode: Rn
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# Addressing mode: Rn
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#------------------------
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#------------------------
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mov #0x1fe2, r4
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mov #0x1fe2, r4
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b r4 ;# PUSH (r4=0xe2 => @=0x0250)
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push.b r4 ;# PUSH (r4=0xe2 => @=0x0250)
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mov #0x3dc4, r6
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mov #0x3dc4, r6
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b r6 ;# PUSH (r6=0xc4 => @=0x024E)
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push.b r6 ;# PUSH (r6=0xc4 => @=0x024E)
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mov #0x9000, r15
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mov #0x9000, r15
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# Addressing mode: @Rn
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# Addressing mode: @Rn
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#------------------------
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#------------------------
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mov #DMEM_212, r4
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mov #DMEM_212, r4
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mov #0x5ba6, &DMEM_212
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mov #0x5ba6, &DMEM_212
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b @r4 ;# PUSH (0xa6 => @=0x024C)
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push.b @r4 ;# PUSH (0xa6 => @=0x024C)
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mov #DMEM_215, r6
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mov #DMEM_215, r6
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mov #0x7988, &DMEM_214
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mov #0x7988, &DMEM_214
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b @r6 ;# PUSH (0x79 => @=0x024A)
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push.b @r6 ;# PUSH (0x79 => @=0x024A)
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mov #0xA000, r15
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mov #0xA000, r15
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# Addressing mode: @Rn+
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# Addressing mode: @Rn+
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#------------------------
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#------------------------
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mov #DMEM_216, r4
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mov #DMEM_216, r4
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mov #0x976a, &DMEM_216
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mov #0x976a, &DMEM_216
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b @r4+ ;# PUSH (0x6a => @=0x0248)
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push.b @r4+ ;# PUSH (0x6a => @=0x0248)
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b @r4+ ;# PUSH (0x97 => @=0x0246)
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push.b @r4+ ;# PUSH (0x97 => @=0x0246)
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mov #0xB000, r15
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mov #0xB000, r15
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# Addressing mode: X(Rn)
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# Addressing mode: X(Rn)
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#------------------------
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#------------------------
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mov #DMEM_200, r4
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mov #DMEM_200, r4
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mov #0xb54c, &DMEM_21A
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mov #0xb54c, &DMEM_21A
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b 26(r4) ;# PUSH (0x4c => @=0x0244)
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push.b 26(r4) ;# PUSH (0x4c => @=0x0244)
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mov #0xc32d, &DMEM_21C
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mov #0xc32d, &DMEM_21C
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b 29(r4) ;# PUSH (0xc3 => @=0x0242)
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push.b 29(r4) ;# PUSH (0xc3 => @=0x0242)
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mov #0xC000, r15
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mov #0xC000, r15
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# Addressing mode: EDE
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# Addressing mode: EDE
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#------------------------
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#------------------------
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.set EDE_B_21E, DMEM_21E
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.set EDE_B_21E, DMEM_21E+PMEM_EDE_LENGTH
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.set EDE_B_221, DMEM_221
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.set EDE_B_221, DMEM_221+PMEM_EDE_LENGTH
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mov #DMEM_200, r4
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mov #DMEM_200, r4
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mov #0xd10e, &DMEM_21E
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mov #0xd10e, &DMEM_21E
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b EDE_B_21E+PMEM_LENGTH ;# PUSH (0x0e => @=0x0240)
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push.b EDE_B_21E ;# PUSH (0x0e => @=0x0240)
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mov #0xfed0, &DMEM_220
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mov #0xfed0, &DMEM_220
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b EDE_B_221+PMEM_LENGTH ;# PUSH (0xfe => @=0x023E)
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push.b EDE_B_221 ;# PUSH (0xfe => @=0x023E)
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mov #0xD000, r15
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mov #0xD000, r15
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# Addressing mode: &EDE
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# Addressing mode: &EDE
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#------------------------
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#------------------------
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.set aEDE_B_222, DMEM_222
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.set aEDE_B_222, DMEM_222
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.set aEDE_B_225, DMEM_225
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.set aEDE_B_225, DMEM_225
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mov #DMEM_200, r4
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mov #DMEM_200, r4
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mov #0x1bc2, &DMEM_222
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mov #0x1bc2, &DMEM_222
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b &aEDE_B_222 ;# PUSH (0xc2 => @=0x023C)
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push.b &aEDE_B_222 ;# PUSH (0xc2 => @=0x023C)
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mov #0x3ba4, &DMEM_224
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mov #0x3ba4, &DMEM_224
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b &aEDE_B_225 ;# PUSH (0x3b => @=0x023A)
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push.b &aEDE_B_225 ;# PUSH (0x3b => @=0x023A)
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mov #0xE000, r15
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mov #0xE000, r15
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# Addressing mode: #N
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# Addressing mode: #N
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#------------------------
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#------------------------
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|
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b #0x82d9 ;# PUSH (0xd9 => @=0x0238)
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push.b #0x82d9 ;# PUSH (0xd9 => @=0x0238)
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|
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mov #0x5555, &DMEM_300
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mov #0x5555, &DMEM_300
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push.b #0x288d ;# PUSH (0x8d => @=0x0236)
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push.b #0x288d ;# PUSH (0x8d => @=0x0236)
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|
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mov #0xF000, r15
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mov #0xF000, r15
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|
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/* -------------- TEST INSTRUCTION WITH SR AS ARGUMENT ------------------- */
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/* -------------- TEST INSTRUCTION WITH SR AS ARGUMENT ------------------- */
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|
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# Addressing mode: SR
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# Addressing mode: SR
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#------------------------
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#------------------------
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nop
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nop
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push r1 ;# PUSH (r1=0x0234 => @=0x0234)
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push r1 ;# PUSH (r1=0x0234 => @=0x0234)
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push r1 ;# PUSH (r1=0x0232 => @=0x0232)
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push r1 ;# PUSH (r1=0x0232 => @=0x0232)
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nop
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nop
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mov #0xF100, r15
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mov #0xF100, r15
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|
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# Addressing mode: @SR
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# Addressing mode: @SR
|
#------------------------
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#------------------------
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mov #0x1234, &DMEM_22E
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mov #0x1234, &DMEM_22E
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mov #0x5678, &DMEM_22C
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mov #0x5678, &DMEM_22C
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nop
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nop
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push @r1 ;# PUSH (r1=0x0230 => @=0x0230) -> do nothing
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push @r1 ;# PUSH (r1=0x0230 => @=0x0230) -> do nothing
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push @r1 ;# PUSH (r1=0x022E => @=0x022E) -> do nothing
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push @r1 ;# PUSH (r1=0x022E => @=0x022E) -> do nothing
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nop
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nop
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mov #0xF200, r15
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mov #0xF200, r15
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# Addressing mode: @SR+
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# Addressing mode: @SR+
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#------------------------
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#------------------------
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mov #0x0000, &DMEM_22A
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mov #0x0000, &DMEM_22A
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mov #0x0000, &DMEM_228
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mov #0x0000, &DMEM_228
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nop
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nop
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push @r1+ ;# PUSH (r1=0x022C => @=0x022C) -> do nothing
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push @r1+ ;# PUSH (r1=0x022C => @=0x022C) -> do nothing
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push @r1+ ;# PUSH (r1=0x022C => @=0x022C) -> do nothing
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push @r1+ ;# PUSH (r1=0x022C => @=0x022C) -> do nothing
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nop
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nop
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|
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mov #0xF300, r15
|
mov #0xF300, r15
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|
|
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|
# Addressing mode: x(SR)
|
# Addressing mode: x(SR)
|
#------------------------
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#------------------------
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nop
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nop
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push 12(r1) ;# PUSH (r1=0x022C+12 => @=0x022C)
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push 12(r1) ;# PUSH (r1=0x022C+12 => @=0x022C)
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push 12(r1) ;# PUSH (r1=0x022A+12 => @=0x022A)
|
push 12(r1) ;# PUSH (r1=0x022A+12 => @=0x022A)
|
nop
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nop
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|
|
mov #0xF400, r15
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mov #0xF400, r15
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|
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/* -------------- TEST POP INSTRUCTION WITH SR AS ARGUMENT ------------------- */
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/* -------------- TEST POP INSTRUCTION WITH SR AS ARGUMENT ------------------- */
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|
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# Addressing mode: x(SR)
|
# Addressing mode: x(SR)
|
#------------------------
|
#------------------------
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|
|
nop
|
nop
|
pop 8(r1) ;# POP (r1=0x022A => @=0x022A+8)
|
pop 8(r1) ;# POP (r1=0x022A => @=0x022A+8)
|
pop 8(r1) ;# POP (r1=0x022C => @=0x022C+8)
|
pop 8(r1) ;# POP (r1=0x022C => @=0x022C+8)
|
nop
|
nop
|
|
|
mov #0xF500, r15
|
mov #0xF500, r15
|
|
|
|
|
# Addressing mode: SR
|
# Addressing mode: SR
|
#------------------------
|
#------------------------
|
|
|
nop
|
nop
|
pop r1 ;# POP (r1=@0x022E)
|
pop r1 ;# POP (r1=@0x022E)
|
nop
|
nop
|
|
|
mov #0xF600, r15
|
mov #0xF600, r15
|
|
|
|
|
/* ---------------------- END OF TEST --------------- */
|
/* ---------------------- END OF TEST --------------- */
|
end_of_test:
|
end_of_test:
|
nop
|
nop
|
br #0xffff
|
br #0xffff
|
|
|
|
|
|
|
/* ---------------------- INTERRUPT VECTORS --------------- */
|
/* ---------------------- INTERRUPT VECTORS --------------- */
|
|
|
.section .vectors, "a"
|
.section .vectors, "a"
|
.word end_of_test ; Interrupt 0 (lowest priority)
|
.word end_of_test ; Interrupt 0 (lowest priority)
|
.word end_of_test ; Interrupt 1
|
.word end_of_test ; Interrupt 1
|
.word end_of_test ; Interrupt 2
|
.word end_of_test ; Interrupt 2
|
.word end_of_test ; Interrupt 3
|
.word end_of_test ; Interrupt 3
|
.word end_of_test ; Interrupt 4
|
.word end_of_test ; Interrupt 4
|
.word end_of_test ; Interrupt 5
|
.word end_of_test ; Interrupt 5
|
.word end_of_test ; Interrupt 6
|
.word end_of_test ; Interrupt 6
|
.word end_of_test ; Interrupt 7
|
.word end_of_test ; Interrupt 7
|
.word end_of_test ; Interrupt 8
|
.word end_of_test ; Interrupt 8
|
.word end_of_test ; Interrupt 9
|
.word end_of_test ; Interrupt 9
|
.word end_of_test ; Interrupt 10 Watchdog timer
|
.word end_of_test ; Interrupt 10 Watchdog timer
|
.word end_of_test ; Interrupt 11
|
.word end_of_test ; Interrupt 11
|
.word end_of_test ; Interrupt 12
|
.word end_of_test ; Interrupt 12
|
.word end_of_test ; Interrupt 13
|
.word end_of_test ; Interrupt 13
|
.word end_of_test ; Interrupt 14 NMI
|
.word end_of_test ; Interrupt 14 NMI
|
.word main ; Interrupt 15 (highest priority) RESET
|
.word main ; Interrupt 15 (highest priority) RESET
|
|
|