/*===========================================================================*/
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/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* Copyright (C) 2001 Authors */
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/* */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* disclaimer. */
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/* */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* (at your option) any later version. */
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/* */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* License for more details. */
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/* */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/* */
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/*===========================================================================*/
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/*===========================================================================*/
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/* SINGLE-OPERAND ARITHMETIC: CALL INSTRUCTION */
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/* SINGLE-OPERAND ARITHMETIC: CALL INSTRUCTION */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* Test the CALL instruction. */
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/* Test the CALL instruction. */
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/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 134 $ */
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/* $Rev: 141 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $ */
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/* $LastChangedDate: 2012-05-05 23:22:06 +0200 (Sat, 05 May 2012) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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.set DMEM_BASE, (__data_start )
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.include "pmem_defs.asm"
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.set DMEM_200, (__data_start+0x00)
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.set DMEM_250, (__data_start+0x50)
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.set DMEM_252, (__data_start+0x52)
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.set DMEM_300, (__data_start+0x100)
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.global main
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.global main
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mov #0x1234, r3
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mov #0x1234, r3
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mov #0x1234, r4
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mov #0x1234, r4
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mov #0x1234, r5
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mov #0x1234, r5
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mov #0x1234, r6
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mov #0x1234, r6
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mov #0x1234, r7
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mov #0x1234, r7
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mov #0x1234, r8
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mov #0x1234, r8
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mov #0x1234, r9
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mov #0x1234, r9
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mov #0x1234, r10
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mov #0x1234, r10
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mov #0x1234, r11
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mov #0x1234, r11
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mov #0x1234, r12
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mov #0x1234, r12
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mov #0x1234, r13
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mov #0x1234, r13
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mov #0x1234, r14
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mov #0x1234, r14
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main:
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main:
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# Test RESET vector
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# Test RESET vector
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#------------------------
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#------------------------
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mov #0x1000, r15
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mov #0x1000, r15
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|
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# Test RETI instruction
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# Test RETI instruction
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#------------------------
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#------------------------
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# Pre-initialize stack
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# Pre-initialize stack
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mov #DMEM_252, r1
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mov #DMEM_252, r1
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push #RETI_ROUTINE
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push #RETI_ROUTINE
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push #0x010f
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push #0x010f
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mov #0x0000, &0x0200
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mov #0x0000, &0x0200
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|
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# Run RETI test
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# Run RETI test
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mov #0x0000, r2
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mov #0x0000, r2
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mov #0x0000, r5
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mov #0x0000, r5
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reti
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reti
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end_of_reti_test:
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end_of_reti_test:
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mov #0x2000, r15
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mov #0x2000, r15
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# Test IRQ 0
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# Test IRQ 0
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0x3000, r15
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mov #0x3000, r15
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wait_irq00:
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wait_irq00:
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cmp #0x5678, r6
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cmp #0x5678, r6
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jne wait_irq00
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jne wait_irq00
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mov #0x3001, r15
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mov #0x3001, r15
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# Test IRQ 1
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# Test IRQ 1
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0x4000, r15
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mov #0x4000, r15
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wait_irq01:
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wait_irq01:
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cmp #0x9abc, r6
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cmp #0x9abc, r6
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jne wait_irq01
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jne wait_irq01
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mov #0x4001, r15
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mov #0x4001, r15
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# Test IRQ 2
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# Test IRQ 2
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0x5000, r15
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mov #0x5000, r15
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wait_irq02:
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wait_irq02:
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cmp #0xdef1, r6
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cmp #0xdef1, r6
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jne wait_irq02
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jne wait_irq02
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mov #0x5001, r15
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mov #0x5001, r15
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# Test IRQ 3
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# Test IRQ 3
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0x6000, r15
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mov #0x6000, r15
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wait_irq03:
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wait_irq03:
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cmp #0x2345, r6
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cmp #0x2345, r6
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jne wait_irq03
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jne wait_irq03
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mov #0x6001, r15
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mov #0x6001, r15
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# Test IRQ 4
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# Test IRQ 4
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0x7000, r15
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mov #0x7000, r15
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wait_irq04:
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wait_irq04:
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cmp #0x6789, r6
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cmp #0x6789, r6
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jne wait_irq04
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jne wait_irq04
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mov #0x7001, r15
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mov #0x7001, r15
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|
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# Test IRQ 5
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# Test IRQ 5
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#-------------------------
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#-------------------------
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|
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0x8000, r15
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mov #0x8000, r15
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wait_irq05:
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wait_irq05:
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cmp #0xabcd, r6
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cmp #0xabcd, r6
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jne wait_irq05
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jne wait_irq05
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mov #0x8001, r15
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mov #0x8001, r15
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# Test IRQ 6
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# Test IRQ 6
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0x9000, r15
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mov #0x9000, r15
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wait_irq06:
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wait_irq06:
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cmp #0xef12, r6
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cmp #0xef12, r6
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jne wait_irq06
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jne wait_irq06
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mov #0x9001, r15
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mov #0x9001, r15
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# Test IRQ 7
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# Test IRQ 7
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0xa000, r15
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mov #0xa000, r15
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wait_irq07:
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wait_irq07:
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cmp #0x3456, r6
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cmp #0x3456, r6
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jne wait_irq07
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jne wait_irq07
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mov #0xa001, r15
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mov #0xa001, r15
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# Test IRQ 8
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# Test IRQ 8
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0xb000, r15
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mov #0xb000, r15
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wait_irq08:
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wait_irq08:
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cmp #0x789a, r6
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cmp #0x789a, r6
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jne wait_irq08
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jne wait_irq08
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mov #0xb001, r15
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mov #0xb001, r15
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# Test IRQ 9
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# Test IRQ 9
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0xc000, r15
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mov #0xc000, r15
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|
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wait_irq09:
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wait_irq09:
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cmp #0xbcde, r6
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cmp #0xbcde, r6
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jne wait_irq09
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jne wait_irq09
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|
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mov #0xc001, r15
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mov #0xc001, r15
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|
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# Test IRQ 10
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# Test IRQ 10
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#-------------------------
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#-------------------------
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|
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0xd000, r15
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mov #0xd000, r15
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wait_irq10:
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wait_irq10:
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cmp #0xf123, r6
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cmp #0xf123, r6
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jne wait_irq10
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jne wait_irq10
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mov #0xd001, r15
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mov #0xd001, r15
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|
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# Test IRQ 11
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# Test IRQ 11
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#-------------------------
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#-------------------------
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0xe000, r15
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mov #0xe000, r15
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|
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wait_irq11:
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wait_irq11:
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cmp #0x4567, r6
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cmp #0x4567, r6
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jne wait_irq11
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jne wait_irq11
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mov #0xe001, r15
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mov #0xe001, r15
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|
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# Test IRQ 12
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# Test IRQ 12
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#-------------------------
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#-------------------------
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|
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0xf000, r15
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mov #0xf000, r15
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|
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wait_irq12:
|
wait_irq12:
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cmp #0x89ab, r6
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cmp #0x89ab, r6
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jne wait_irq12
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jne wait_irq12
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|
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mov #0xf001, r15
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mov #0xf001, r15
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|
|
|
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# Test IRQ 13
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# Test IRQ 13
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#-------------------------
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#-------------------------
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|
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0008, r2 ; Enable interrupts
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mov #0x0000, r6
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mov #0x0000, r6
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mov #0xaaaa, r7
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mov #0xaaaa, r7
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mov #0x5555, r8
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mov #0x5555, r8
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mov #0xf100, r15
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mov #0xf100, r15
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|
|
wait_irq13:
|
wait_irq13:
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cmp #0xcdef, r6
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cmp #0xcdef, r6
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jne wait_irq13
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jne wait_irq13
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|
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mov #0xf101, r15
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mov #0xf101, r15
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|
|
|
|
# Test IRQ NMI: rising edge
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# Test IRQ NMI: rising edge
|
#----------------------------
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#----------------------------
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|
|
.set WDTCTL, 0x0120
|
.set WDTCTL, 0x0120
|
.set IE1, 0x0000
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.set IE1, 0x0000
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.set IFG1, 0x0002
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.set IFG1, 0x0002
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|
|
|
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mov #0x5a00, &WDTCTL ; NMI Edge selection: rising
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mov #0x5a00, &WDTCTL ; NMI Edge selection: rising
|
bic.b #0x0010, &IFG1 ; Clear NMI flag
|
bic.b #0x0010, &IFG1 ; Clear NMI flag
|
bis.b #0x0010, &IE1 ; Enable NMI
|
bis.b #0x0010, &IE1 ; Enable NMI
|
|
|
bit #0x0010, &IE1 ; skip this test if the NMI is not included
|
bit #0x0010, &IE1 ; skip this test if the NMI is not included
|
jz skip_nmi
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jz skip_nmi
|
|
|
mov #0x0000, r6
|
mov #0x0000, r6
|
mov #0xaaaa, r7
|
mov #0xaaaa, r7
|
mov #0x5555, r8
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mov #0x5555, r8
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mov #0xf200, r15
|
mov #0xf200, r15
|
|
|
wait_nmi:
|
wait_nmi:
|
mov #0xa5a5, &0x0200
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mov #0xa5a5, &0x0200
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cmp #0x0123, r6
|
cmp #0x0123, r6
|
jne wait_nmi
|
jne wait_nmi
|
|
|
mov.b &IE1, r9
|
mov.b &IE1, r9
|
mov.b &IFG1, r10
|
mov.b &IFG1, r10
|
bic.b #0x10, &IFG1 ; Clear NMI flag
|
bic.b #0x10, &IFG1 ; Clear NMI flag
|
bis.b #0x10, &IE1 ; Enable NMI
|
bis.b #0x10, &IE1 ; Enable NMI
|
|
|
skip_nmi:
|
skip_nmi:
|
mov #0xf201, r15
|
mov #0xf201, r15
|
|
|
|
|
|
|
/* ---------------------- END OF TEST --------------- */
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/* ---------------------- END OF TEST --------------- */
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end_of_test:
|
end_of_test:
|
nop
|
nop
|
br #0xffff
|
br #0xffff
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|
|
|
|
|
|
/* ---------------------- FUNCTIONS --------------- */
|
/* ---------------------- FUNCTIONS --------------- */
|
|
|
RETI_ROUTINE:
|
RETI_ROUTINE:
|
mov #0x1234, r5
|
mov #0x1234, r5
|
jmp end_of_reti_test
|
jmp end_of_reti_test
|
|
|
|
|
IRQ00_ROUTINE:
|
IRQ00_ROUTINE:
|
mov #0x5678, r6
|
mov #0x5678, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ01_ROUTINE:
|
IRQ01_ROUTINE:
|
mov #0x9abc, r6
|
mov #0x9abc, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ02_ROUTINE:
|
IRQ02_ROUTINE:
|
mov #0xdef1, r6
|
mov #0xdef1, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ03_ROUTINE:
|
IRQ03_ROUTINE:
|
mov #0x2345, r6
|
mov #0x2345, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ04_ROUTINE:
|
IRQ04_ROUTINE:
|
mov #0x6789, r6
|
mov #0x6789, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ05_ROUTINE:
|
IRQ05_ROUTINE:
|
mov #0xabcd, r6
|
mov #0xabcd, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ06_ROUTINE:
|
IRQ06_ROUTINE:
|
mov #0xef12, r6
|
mov #0xef12, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ07_ROUTINE:
|
IRQ07_ROUTINE:
|
mov #0x3456, r6
|
mov #0x3456, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ08_ROUTINE:
|
IRQ08_ROUTINE:
|
mov #0x789a, r6
|
mov #0x789a, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ09_ROUTINE:
|
IRQ09_ROUTINE:
|
mov #0xbcde, r6
|
mov #0xbcde, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ10_ROUTINE:
|
IRQ10_ROUTINE:
|
mov #0xf123, r6
|
mov #0xf123, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ11_ROUTINE:
|
IRQ11_ROUTINE:
|
mov #0x4567, r6
|
mov #0x4567, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ12_ROUTINE:
|
IRQ12_ROUTINE:
|
mov #0x89ab, r6
|
mov #0x89ab, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
IRQ13_ROUTINE:
|
IRQ13_ROUTINE:
|
mov #0xcdef, r6
|
mov #0xcdef, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
NMI_ROUTINE:
|
NMI_ROUTINE:
|
mov #0x0123, r6
|
mov #0x0123, r6
|
mov r2, r7 ; Save Status register
|
mov r2, r7 ; Save Status register
|
mov r1, r8 ; Save Stack register
|
mov r1, r8 ; Save Stack register
|
reti
|
reti
|
|
|
nop
|
nop
|
nop
|
nop
|
nop
|
nop
|
nop
|
nop
|
nop
|
nop
|
|
|
|
|
|
|
/* ---------------------- INTERRUPT VECTORS --------------- */
|
/* ---------------------- INTERRUPT VECTORS --------------- */
|
|
|
.section .vectors, "a"
|
.section .vectors, "a"
|
.word IRQ00_ROUTINE ; Interrupt 0 (lowest priority)
|
.word IRQ00_ROUTINE ; Interrupt 0 (lowest priority)
|
.word IRQ01_ROUTINE ; Interrupt 1
|
.word IRQ01_ROUTINE ; Interrupt 1
|
.word IRQ02_ROUTINE ; Interrupt 2
|
.word IRQ02_ROUTINE ; Interrupt 2
|
.word IRQ03_ROUTINE ; Interrupt 3
|
.word IRQ03_ROUTINE ; Interrupt 3
|
.word IRQ04_ROUTINE ; Interrupt 4
|
.word IRQ04_ROUTINE ; Interrupt 4
|
.word IRQ05_ROUTINE ; Interrupt 5
|
.word IRQ05_ROUTINE ; Interrupt 5
|
.word IRQ06_ROUTINE ; Interrupt 6
|
.word IRQ06_ROUTINE ; Interrupt 6
|
.word IRQ07_ROUTINE ; Interrupt 7
|
.word IRQ07_ROUTINE ; Interrupt 7
|
.word IRQ08_ROUTINE ; Interrupt 8
|
.word IRQ08_ROUTINE ; Interrupt 8
|
.word IRQ09_ROUTINE ; Interrupt 9
|
.word IRQ09_ROUTINE ; Interrupt 9
|
.word IRQ10_ROUTINE ; Interrupt 10 Watchdog timer
|
.word IRQ10_ROUTINE ; Interrupt 10 Watchdog timer
|
.word IRQ11_ROUTINE ; Interrupt 11
|
.word IRQ11_ROUTINE ; Interrupt 11
|
.word IRQ12_ROUTINE ; Interrupt 12
|
.word IRQ12_ROUTINE ; Interrupt 12
|
.word IRQ13_ROUTINE ; Interrupt 13
|
.word IRQ13_ROUTINE ; Interrupt 13
|
.word NMI_ROUTINE ; Interrupt 14 NMI
|
.word NMI_ROUTINE ; Interrupt 14 NMI
|
.word main ; Interrupt 15 (highest priority) RESET
|
.word main ; Interrupt 15 (highest priority) RESET
|
|
|
