/*===========================================================================*/
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/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* Copyright (C) 2001 Authors */
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/* */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* disclaimer. */
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/* */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* (at your option) any later version. */
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/* */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* License for more details. */
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/* */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/* */
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/*===========================================================================*/
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/*===========================================================================*/
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/* SINGLE-OPERAND ARITHMETIC: RRC[.B] INSTRUCTION */
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/* SINGLE-OPERAND ARITHMETIC: RRC[.B] INSTRUCTION */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* Test the RRC[.B] instruction. */
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/* Test the RRC[.B] instruction. */
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/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 111 $ */
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/* $Rev: 141 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $ */
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/* $LastChangedDate: 2012-05-05 23:22:06 +0200 (Sat, 05 May 2012) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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.set DMEM_BASE, (__data_start )
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.include "pmem_defs.asm"
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.set DMEM_200, (__data_start+0x00)
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.set DMEM_202, (__data_start+0x02)
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.set DMEM_204, (__data_start+0x04)
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.set DMEM_206, (__data_start+0x06)
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.set DMEM_208, (__data_start+0x08)
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.set DMEM_209, (__data_start+0x09)
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.set DMEM_20A, (__data_start+0x0A)
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.set DMEM_20B, (__data_start+0x0B)
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.set DMEM_20C, (__data_start+0x0C)
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.set DMEM_20D, (__data_start+0x0D)
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.set DMEM_20E, (__data_start+0x0E)
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.set DMEM_20F, (__data_start+0x0F)
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.set DMEM_210, (__data_start+0x10)
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.set DMEM_212, (__data_start+0x12)
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.set DMEM_214, (__data_start+0x14)
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.set DMEM_216, (__data_start+0x16)
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.set DMEM_218, (__data_start+0x18)
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.set DMEM_219, (__data_start+0x19)
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.set DMEM_21A, (__data_start+0x1A)
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.set DMEM_21B, (__data_start+0x1B)
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.set DMEM_21C, (__data_start+0x1C)
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.set DMEM_21D, (__data_start+0x1D)
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.set DMEM_21E, (__data_start+0x1E)
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.set DMEM_21F, (__data_start+0x1F)
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.set DMEM_220, (__data_start+0x20)
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.set DMEM_222, (__data_start+0x22)
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.set DMEM_224, (__data_start+0x24)
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.set DMEM_226, (__data_start+0x26)
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.set DMEM_228, (__data_start+0x28)
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.set DMEM_22A, (__data_start+0x2A)
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.set DMEM_22C, (__data_start+0x2C)
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.set DMEM_22E, (__data_start+0x2E)
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.set DMEM_230, (__data_start+0x30)
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.set DMEM_232, (__data_start+0x32)
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.set DMEM_234, (__data_start+0x34)
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.set DMEM_236, (__data_start+0x36)
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.set DMEM_238, (__data_start+0x38)
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.set DMEM_239, (__data_start+0x39)
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.set DMEM_23A, (__data_start+0x3A)
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.set DMEM_23B, (__data_start+0x3B)
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.set DMEM_23C, (__data_start+0x3C)
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.set DMEM_23D, (__data_start+0x3D)
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.set DMEM_23E, (__data_start+0x3E)
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.set DMEM_23F, (__data_start+0x3F)
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.set DMEM_240, (__data_start+0x40)
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.set DMEM_242, (__data_start+0x42)
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.set DMEM_244, (__data_start+0x44)
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.set DMEM_246, (__data_start+0x46)
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.set DMEM_248, (__data_start+0x48)
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.set DMEM_249, (__data_start+0x49)
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.set DMEM_24A, (__data_start+0x4A)
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.set DMEM_24B, (__data_start+0x4B)
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.set DMEM_24C, (__data_start+0x4C)
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.set DMEM_24D, (__data_start+0x4D)
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.set DMEM_24E, (__data_start+0x4E)
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.set DMEM_24F, (__data_start+0x4F)
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.set DMEM_250, (__data_start+0x50)
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.global main
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.global main
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main:
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main:
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/* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
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/* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
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# Addressing mode: Rn
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# Addressing mode: Rn
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#------------------------
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#------------------------
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mov #0x0000, r2 ;# Test 1
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mov #0x0000, r2 ;# Test 1
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mov #0x3332, r4
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mov #0x3332, r4
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rrc r4 ;# RRC ({C=0, r4=0x3332} => {r4=0x1999, C=0})
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rrc r4 ;# RRC ({C=0, r4=0x3332} => {r4=0x1999, C=0})
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mov r2, r5
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mov r2, r5
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mov #0x0000, r2 ;# Test 2
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mov #0x0000, r2 ;# Test 2
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mov #0x3333, r6
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mov #0x3333, r6
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rrc r6 ;# RRC ({C=0, r6=0x3333} => {r6=0x1999, C=1})
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rrc r6 ;# RRC ({C=0, r6=0x3333} => {r6=0x1999, C=1})
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mov r2, r7
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mov r2, r7
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mov #0x0001, r2 ;# Test 3
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mov #0x0001, r2 ;# Test 3
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mov #0x3332, r8
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mov #0x3332, r8
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rrc r8 ;# RRC ({C=1, r9=0x3332} => {r9=0x9999, C=0})
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rrc r8 ;# RRC ({C=1, r9=0x3332} => {r9=0x9999, C=0})
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mov r2, r9
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mov r2, r9
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mov #0x0001, r2 ;# Test 4
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mov #0x0001, r2 ;# Test 4
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mov #0x3333, r10
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mov #0x3333, r10
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rrc r10 ;# RRC ({C=1, r10=0x3333} => {r10=0x9999, C=1})
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rrc r10 ;# RRC ({C=1, r10=0x3333} => {r10=0x9999, C=1})
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mov r2, r11
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mov r2, r11
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mov #0x1000, r15
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mov #0x1000, r15
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# Addressing mode: @Rn
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# Addressing mode: @Rn
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#------------------------
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#------------------------
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mov #0x0000, r2 ;# Test 1
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mov #0x0000, r2 ;# Test 1
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mov #0x3332, &DMEM_200
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mov #0x3332, &DMEM_200
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mov #DMEM_200, r4
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mov #DMEM_200, r4
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mov #0xaaaa, &DMEM_202
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mov #0xaaaa, &DMEM_202
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rrc @r4 ;# RRC ({C=0, mem00=0x3332} => {mem00=0x1999, C=0})
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rrc @r4 ;# RRC ({C=0, mem00=0x3332} => {mem00=0x1999, C=0})
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mov r2, r5
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mov r2, r5
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mov #0x0000, r2 ;# Test 2
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mov #0x0000, r2 ;# Test 2
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mov #0x3333, &DMEM_202
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mov #0x3333, &DMEM_202
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mov #DMEM_202, r6
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mov #DMEM_202, r6
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mov #0xaaaa, &DMEM_204
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mov #0xaaaa, &DMEM_204
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rrc @r6 ;# RRC ({C=0, mem01=0x3333} => {mem01=0x1999, C=1})
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rrc @r6 ;# RRC ({C=0, mem01=0x3333} => {mem01=0x1999, C=1})
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mov r2, r7
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mov r2, r7
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mov #0x0001, r2 ;# Test 3
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mov #0x0001, r2 ;# Test 3
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mov #0x3332, &DMEM_204
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mov #0x3332, &DMEM_204
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mov #DMEM_204, r8
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mov #DMEM_204, r8
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mov #0xaaaa, &DMEM_206
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mov #0xaaaa, &DMEM_206
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rrc @r8 ;# RRC ({C=1, mem02=0x3332} => {mem02=0x9999, C=0})
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rrc @r8 ;# RRC ({C=1, mem02=0x3332} => {mem02=0x9999, C=0})
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mov r2, r9
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mov r2, r9
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mov #0x0001, r2 ;# Test 4
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mov #0x0001, r2 ;# Test 4
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mov #0x3333, &DMEM_206
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mov #0x3333, &DMEM_206
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mov #DMEM_206, r10
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mov #DMEM_206, r10
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mov #0xaaaa, &DMEM_208
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mov #0xaaaa, &DMEM_208
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rrc @r10 ;# RRC ({C=1, mem03=0x3333} => {mem03=0x9999, C=1})
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rrc @r10 ;# RRC ({C=1, mem03=0x3333} => {mem03=0x9999, C=1})
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mov r2, r11
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mov r2, r11
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mov #0x2000, r15
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mov #0x2000, r15
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# Addressing mode: @Rn+
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# Addressing mode: @Rn+
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#------------------------
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#------------------------
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mov #0x0000, r2 ;# Test 1
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mov #0x0000, r2 ;# Test 1
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mov #0x3332, &DMEM_208
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mov #0x3332, &DMEM_208
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mov #DMEM_208, r4
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mov #DMEM_208, r4
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mov #0xaaaa, &DMEM_20A
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mov #0xaaaa, &DMEM_20A
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rrc @r4+ ;# RRC ({C=0, mem04=0x3332} => {mem04=0x1999, C=0})
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rrc @r4+ ;# RRC ({C=0, mem04=0x3332} => {mem04=0x1999, C=0})
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mov r2, r5
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mov r2, r5
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mov #0x0000, r2 ;# Test 2
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mov #0x0000, r2 ;# Test 2
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mov #0x3333, &DMEM_20A
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mov #0x3333, &DMEM_20A
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mov #DMEM_20A, r6
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mov #DMEM_20A, r6
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mov #0xaaaa, &DMEM_20C
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mov #0xaaaa, &DMEM_20C
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rrc @r6+ ;# RRC ({C=0, mem05=0x3333} => {mem05=0x1999, C=1})
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rrc @r6+ ;# RRC ({C=0, mem05=0x3333} => {mem05=0x1999, C=1})
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mov r2, r7
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mov r2, r7
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mov #0x0001, r2 ;# Test 3
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mov #0x0001, r2 ;# Test 3
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mov #0x3332, &DMEM_20C
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mov #0x3332, &DMEM_20C
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mov #DMEM_20C, r8
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mov #DMEM_20C, r8
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mov #0xaaaa, &DMEM_20E
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mov #0xaaaa, &DMEM_20E
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rrc @r8+ ;# RRC ({C=1, mem06=0x3332} => {mem06=0x9999, C=0})
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rrc @r8+ ;# RRC ({C=1, mem06=0x3332} => {mem06=0x9999, C=0})
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mov r2, r9
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mov r2, r9
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mov #0x0001, r2 ;# Test 4
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mov #0x0001, r2 ;# Test 4
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mov #0x3333, &DMEM_20E
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mov #0x3333, &DMEM_20E
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mov #DMEM_20E, r10
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mov #DMEM_20E, r10
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mov #0xaaaa, &DMEM_210
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mov #0xaaaa, &DMEM_210
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rrc @r10+ ;# RRC ({C=1, mem07=0x3333} => {mem07=0x9999, C=1})
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rrc @r10+ ;# RRC ({C=1, mem07=0x3333} => {mem07=0x9999, C=1})
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mov r2, r11
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mov r2, r11
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mov #0x3000, r15
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mov #0x3000, r15
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# Addressing mode: X(Rn)
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# Addressing mode: X(Rn)
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#------------------------
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#------------------------
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mov #0x0000, r2 ;# Test 1
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mov #0x0000, r2 ;# Test 1
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mov #0x3332, &DMEM_210
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mov #0x3332, &DMEM_210
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mov #DMEM_200, r4
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mov #DMEM_200, r4
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mov #0xaaaa, &DMEM_212
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mov #0xaaaa, &DMEM_212
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rrc 16(r4) ;# RRC ({C=0, mem08=0x3332} => {mem08=0x1999, C=0})
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rrc 16(r4) ;# RRC ({C=0, mem08=0x3332} => {mem08=0x1999, C=0})
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mov r2, r5
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mov r2, r5
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mov #0x0000, r2 ;# Test 2
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mov #0x0000, r2 ;# Test 2
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mov #0x3333, &DMEM_212
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mov #0x3333, &DMEM_212
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mov #DMEM_200, r6
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mov #DMEM_200, r6
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mov #0xaaaa, &DMEM_214
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mov #0xaaaa, &DMEM_214
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rrc 18(r6) ;# RRC ({C=0, mem09=0x3333} => {mem09=0x1999, C=1})
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rrc 18(r6) ;# RRC ({C=0, mem09=0x3333} => {mem09=0x1999, C=1})
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mov r2, r7
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mov r2, r7
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mov #0x0001, r2 ;# Test 3
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mov #0x0001, r2 ;# Test 3
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mov #0x3332, &DMEM_214
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mov #0x3332, &DMEM_214
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mov #DMEM_200, r8
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mov #DMEM_200, r8
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mov #0xaaaa, &DMEM_216
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mov #0xaaaa, &DMEM_216
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rrc 20(r8) ;# RRC ({C=1, mem0a=0x3332} => {mem0a=0x9999, C=0})
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rrc 20(r8) ;# RRC ({C=1, mem0a=0x3332} => {mem0a=0x9999, C=0})
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mov r2, r9
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mov r2, r9
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mov #0x0001, r2 ;# Test 4
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mov #0x0001, r2 ;# Test 4
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mov #0x3333, &DMEM_216
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mov #0x3333, &DMEM_216
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mov #DMEM_200, r10
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mov #DMEM_200, r10
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mov #0xaaaa, &DMEM_218
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mov #0xaaaa, &DMEM_218
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rrc 22(r10) ;# RRC ({C=1, mem0b=0x3333} => {mem0b=0x9999, C=1})
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rrc 22(r10) ;# RRC ({C=1, mem0b=0x3333} => {mem0b=0x9999, C=1})
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mov r2, r11
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mov r2, r11
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mov #0x4000, r15
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mov #0x4000, r15
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# Addressing mode: EDE
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# Addressing mode: EDE
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#------------------------
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#------------------------
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.set EDE_218, DMEM_218
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.set EDE_218, DMEM_218
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.set EDE_21A, DMEM_21A
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.set EDE_21A, DMEM_21A
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.set EDE_21C, DMEM_21C
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.set EDE_21C, DMEM_21C
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.set EDE_21E, DMEM_21E
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.set EDE_21E, DMEM_21E
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mov #0x0000, r2 ;# Test 1
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mov #0x0000, r2 ;# Test 1
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mov #0x3332, &DMEM_218
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mov #0x3332, &DMEM_218
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mov #0xaaaa, &DMEM_21A
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mov #0xaaaa, &DMEM_21A
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rrc EDE_218 ;# RRC ({C=0, mem0c=0x3332} => {mem0c=0x1999, C=0})
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rrc EDE_218+PMEM_LENGTH ;# RRC ({C=0, mem0c=0x3332} => {mem0c=0x1999, C=0})
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mov r2, r5
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mov r2, r5
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mov #0x0000, r2 ;# Test 2
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mov #0x0000, r2 ;# Test 2
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mov #0x3333, &DMEM_21A
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mov #0x3333, &DMEM_21A
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mov #0xaaaa, &DMEM_21C
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mov #0xaaaa, &DMEM_21C
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rrc EDE_21A ;# RRC ({C=0, mem0d=0x3333} => {mem0d=0x1999, C=1})
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rrc EDE_21A+PMEM_LENGTH ;# RRC ({C=0, mem0d=0x3333} => {mem0d=0x1999, C=1})
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mov r2, r7
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mov r2, r7
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mov #0x0001, r2 ;# Test 3
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mov #0x0001, r2 ;# Test 3
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mov #0x3332, &DMEM_21C
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mov #0x3332, &DMEM_21C
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mov #0xaaaa, &DMEM_21E
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mov #0xaaaa, &DMEM_21E
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rrc EDE_21C ;# RRC ({C=1, mem0e=0x3332} => {mem0e=0x9999, C=0})
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rrc EDE_21C+PMEM_LENGTH ;# RRC ({C=1, mem0e=0x3332} => {mem0e=0x9999, C=0})
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mov r2, r9
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mov r2, r9
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mov #0x0001, r2 ;# Test 4
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mov #0x0001, r2 ;# Test 4
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mov #0x3333, &DMEM_21E
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mov #0x3333, &DMEM_21E
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mov #0xaaaa, &DMEM_220
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mov #0xaaaa, &DMEM_220
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rrc EDE_21E ;# RRC ({C=1, mem0f=0x3333} => {mem0f=0x9999, C=1})
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rrc EDE_21E+PMEM_LENGTH ;# RRC ({C=1, mem0f=0x3333} => {mem0f=0x9999, C=1})
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mov r2, r11
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mov r2, r11
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mov #0x5000, r15
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mov #0x5000, r15
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# Addressing mode: &EDE
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# Addressing mode: &EDE
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#------------------------
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#------------------------
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.set aEDE_220, DMEM_220
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.set aEDE_220, DMEM_220
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.set aEDE_222, DMEM_222
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.set aEDE_222, DMEM_222
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.set aEDE_224, DMEM_224
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.set aEDE_224, DMEM_224
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.set aEDE_226, DMEM_226
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.set aEDE_226, DMEM_226
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mov #0x0000, r2 ;# Test 1
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mov #0x0000, r2 ;# Test 1
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mov #0x3332, &DMEM_220
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mov #0x3332, &DMEM_220
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mov #0xaaaa, &DMEM_222
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mov #0xaaaa, &DMEM_222
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rrc &aEDE_220 ;# RRC ({C=0, mem10=0x3332} => {mem10=0x1999, C=0})
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rrc &aEDE_220 ;# RRC ({C=0, mem10=0x3332} => {mem10=0x1999, C=0})
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mov r2, r5
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mov r2, r5
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mov #0x0000, r2 ;# Test 2
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mov #0x0000, r2 ;# Test 2
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mov #0x3333, &DMEM_222
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mov #0x3333, &DMEM_222
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mov #0xaaaa, &DMEM_224
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mov #0xaaaa, &DMEM_224
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rrc &aEDE_222 ;# RRC ({C=0, mem11=0x3333} => {mem11=0x1999, C=1})
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rrc &aEDE_222 ;# RRC ({C=0, mem11=0x3333} => {mem11=0x1999, C=1})
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mov r2, r7
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mov r2, r7
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mov #0x0001, r2 ;# Test 3
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mov #0x0001, r2 ;# Test 3
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mov #0x3332, &DMEM_224
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mov #0x3332, &DMEM_224
|
mov #0xaaaa, &DMEM_226
|
mov #0xaaaa, &DMEM_226
|
rrc &aEDE_224 ;# RRC ({C=1, mem12=0x3332} => {mem12=0x9999, C=0})
|
rrc &aEDE_224 ;# RRC ({C=1, mem12=0x3332} => {mem12=0x9999, C=0})
|
mov r2, r9
|
mov r2, r9
|
|
|
mov #0x0001, r2 ;# Test 4
|
mov #0x0001, r2 ;# Test 4
|
mov #0x3333, &DMEM_226
|
mov #0x3333, &DMEM_226
|
mov #0xaaaa, &DMEM_228
|
mov #0xaaaa, &DMEM_228
|
rrc &aEDE_226 ;# RRC ({C=1, mem13=0x3333} => {mem13=0x9999, C=1})
|
rrc &aEDE_226 ;# RRC ({C=1, mem13=0x3333} => {mem13=0x9999, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0x6000, r15
|
mov #0x6000, r15
|
|
|
|
|
/* ----------------------- CLEAR MEMORY --------------------------- */
|
/* ----------------------- CLEAR MEMORY --------------------------- */
|
mov #0x0015, r4
|
mov #0x0015, r4
|
mov #DMEM_200, r5
|
mov #DMEM_200, r5
|
clear_mem_loop:
|
clear_mem_loop:
|
clr 0(r5)
|
clr 0(r5)
|
incd r5
|
incd r5
|
dec r4
|
dec r4
|
jnz clear_mem_loop
|
jnz clear_mem_loop
|
|
|
mov #0x7000, r15
|
mov #0x7000, r15
|
|
|
|
|
/* -------------- TEST INSTRUCTION IN BYTE MODE ------------------- */
|
/* -------------- TEST INSTRUCTION IN BYTE MODE ------------------- */
|
|
|
# Addressing mode: Rn
|
# Addressing mode: Rn
|
#------------------------
|
#------------------------
|
|
|
mov #0x0000, r2 ;# Test 1
|
mov #0x0000, r2 ;# Test 1
|
mov #0xff32, r4
|
mov #0xff32, r4
|
rrc.b r4 ;# RRC.B ({C=0, r4=0x32} => {r4=0x19, C=0})
|
rrc.b r4 ;# RRC.B ({C=0, r4=0x32} => {r4=0x19, C=0})
|
mov r2, r5
|
mov r2, r5
|
|
|
mov #0x0000, r2 ;# Test 2
|
mov #0x0000, r2 ;# Test 2
|
mov #0xff33, r6
|
mov #0xff33, r6
|
rrc.b r6 ;# RRC.B ({C=0, r6=0x33} => {r6=0x19, C=1})
|
rrc.b r6 ;# RRC.B ({C=0, r6=0x33} => {r6=0x19, C=1})
|
mov r2, r7
|
mov r2, r7
|
|
|
mov #0x0001, r2 ;# Test 3
|
mov #0x0001, r2 ;# Test 3
|
mov #0xf032, r8
|
mov #0xf032, r8
|
rrc.b r8 ;# RRC.B ({C=1, r9=0x32} => {r9=0x99, C=0})
|
rrc.b r8 ;# RRC.B ({C=1, r9=0x32} => {r9=0x99, C=0})
|
mov r2, r9
|
mov r2, r9
|
|
|
mov #0x0001, r2 ;# Test 4
|
mov #0x0001, r2 ;# Test 4
|
mov #0xf033, r10
|
mov #0xf033, r10
|
rrc.b r10 ;# RRC.B ({C=1, r10=0x33} => {r10=0x99, C=1})
|
rrc.b r10 ;# RRC.B ({C=1, r10=0x33} => {r10=0x99, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0x8000, r15
|
mov #0x8000, r15
|
|
|
|
|
# Addressing mode: @Rn (Low Byte)
|
# Addressing mode: @Rn (Low Byte)
|
#---------------------------------
|
#---------------------------------
|
|
|
mov #0x0000, r2 ;# Test 1: Low Byte
|
mov #0x0000, r2 ;# Test 1: Low Byte
|
mov #0x2532, &DMEM_200
|
mov #0x2532, &DMEM_200
|
mov #DMEM_200, r4
|
mov #DMEM_200, r4
|
mov #0xaaaa, &DMEM_202
|
mov #0xaaaa, &DMEM_202
|
rrc.b @r4 ;# RRC.B ({C=0, mem00=0x2532} => {mem00=0x2519, C=0})
|
rrc.b @r4 ;# RRC.B ({C=0, mem00=0x2532} => {mem00=0x2519, C=0})
|
mov r2, r5
|
mov r2, r5
|
|
|
mov #0x0000, r2 ;# Test 2: Low Byte
|
mov #0x0000, r2 ;# Test 2: Low Byte
|
mov #0x2533, &DMEM_202
|
mov #0x2533, &DMEM_202
|
mov #DMEM_202, r6
|
mov #DMEM_202, r6
|
mov #0xaaaa, &DMEM_204
|
mov #0xaaaa, &DMEM_204
|
rrc.b @r6 ;# RRC.B ({C=0, mem01=0x2533} => {mem01=0x2519, C=1})
|
rrc.b @r6 ;# RRC.B ({C=0, mem01=0x2533} => {mem01=0x2519, C=1})
|
mov r2, r7
|
mov r2, r7
|
|
|
mov #0x0001, r2 ;# Test 3: Low Byte
|
mov #0x0001, r2 ;# Test 3: Low Byte
|
mov #0x2532, &DMEM_204
|
mov #0x2532, &DMEM_204
|
mov #DMEM_204, r8
|
mov #DMEM_204, r8
|
mov #0xaaaa, &DMEM_206
|
mov #0xaaaa, &DMEM_206
|
rrc.b @r8 ;# RRC.B ({C=1, mem02=0x2532} => {mem02=0x2599, C=0})
|
rrc.b @r8 ;# RRC.B ({C=1, mem02=0x2532} => {mem02=0x2599, C=0})
|
mov r2, r9
|
mov r2, r9
|
|
|
mov #0x0001, r2 ;# Test 4: Low Byte
|
mov #0x0001, r2 ;# Test 4: Low Byte
|
mov #0x2533, &DMEM_206
|
mov #0x2533, &DMEM_206
|
mov #DMEM_206, r10
|
mov #DMEM_206, r10
|
mov #0xaaaa, &DMEM_208
|
mov #0xaaaa, &DMEM_208
|
rrc.b @r10 ;# RRC.B ({C=1, mem03=0x2533} => {mem03=0x2599, C=1})
|
rrc.b @r10 ;# RRC.B ({C=1, mem03=0x2533} => {mem03=0x2599, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0x9000, r15
|
mov #0x9000, r15
|
|
|
# Addressing mode: @Rn (High Byte)
|
# Addressing mode: @Rn (High Byte)
|
#---------------------------------
|
#---------------------------------
|
|
|
mov #0x0000, r2 ;# Test 1: High Byte
|
mov #0x0000, r2 ;# Test 1: High Byte
|
mov #0x3225, &DMEM_208
|
mov #0x3225, &DMEM_208
|
mov #DMEM_209, r4
|
mov #DMEM_209, r4
|
mov #0xaaaa, &DMEM_20A
|
mov #0xaaaa, &DMEM_20A
|
rrc.b @r4 ;# RRC.B ({C=0, mem04=0x3225} => {mem04=0x1925, C=0})
|
rrc.b @r4 ;# RRC.B ({C=0, mem04=0x3225} => {mem04=0x1925, C=0})
|
mov r2, r6
|
mov r2, r6
|
|
|
mov #0x0000, r2 ;# Test 2: High Byte
|
mov #0x0000, r2 ;# Test 2: High Byte
|
mov #0x3325, &DMEM_20A
|
mov #0x3325, &DMEM_20A
|
mov #DMEM_20B, r6
|
mov #DMEM_20B, r6
|
mov #0xaaaa, &DMEM_20C
|
mov #0xaaaa, &DMEM_20C
|
rrc.b @r6 ;# RRC.B ({C=0, mem05=0x3325} => {mem05=0x1925, C=1})
|
rrc.b @r6 ;# RRC.B ({C=0, mem05=0x3325} => {mem05=0x1925, C=1})
|
mov r2, r8
|
mov r2, r8
|
|
|
mov #0x0001, r2 ;# Test 3: High Byte
|
mov #0x0001, r2 ;# Test 3: High Byte
|
mov #0x3225, &DMEM_20C
|
mov #0x3225, &DMEM_20C
|
mov #DMEM_20D, r8
|
mov #DMEM_20D, r8
|
mov #0xaaaa, &DMEM_20E
|
mov #0xaaaa, &DMEM_20E
|
rrc.b @r8 ;# RRC.B ({C=1, mem06=0x3225} => {mem06=0x9925, C=0})
|
rrc.b @r8 ;# RRC.B ({C=1, mem06=0x3225} => {mem06=0x9925, C=0})
|
mov r2, r10
|
mov r2, r10
|
|
|
mov #0x0001, r2 ;# Test 4: High Byte
|
mov #0x0001, r2 ;# Test 4: High Byte
|
mov #0x3325, &DMEM_20E
|
mov #0x3325, &DMEM_20E
|
mov #DMEM_20F, r10
|
mov #DMEM_20F, r10
|
mov #0xaaaa, &DMEM_210
|
mov #0xaaaa, &DMEM_210
|
rrc.b @r10 ;# RRC.B ({C=1, mem07=0x3325} => {mem07=0x9925, C=1})
|
rrc.b @r10 ;# RRC.B ({C=1, mem07=0x3325} => {mem07=0x9925, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0x9001, r15
|
mov #0x9001, r15
|
|
|
|
|
# Addressing mode: @Rn+ (Low Byte)
|
# Addressing mode: @Rn+ (Low Byte)
|
#---------------------------------
|
#---------------------------------
|
|
|
mov #0x0000, r2 ;# Test 1: Low Byte
|
mov #0x0000, r2 ;# Test 1: Low Byte
|
mov #0x2532, &DMEM_210
|
mov #0x2532, &DMEM_210
|
mov #DMEM_210, r4
|
mov #DMEM_210, r4
|
mov #0xaaaa, &DMEM_212
|
mov #0xaaaa, &DMEM_212
|
rrc.b @r4+ ;# RRC.B ({C=0, mem08=0x2532} => {mem08=0x2519, C=0})
|
rrc.b @r4+ ;# RRC.B ({C=0, mem08=0x2532} => {mem08=0x2519, C=0})
|
mov r2, r5
|
mov r2, r5
|
|
|
mov #0x0000, r2 ;# Test 2: Low Byte
|
mov #0x0000, r2 ;# Test 2: Low Byte
|
mov #0x2533, &DMEM_212
|
mov #0x2533, &DMEM_212
|
mov #DMEM_212, r6
|
mov #DMEM_212, r6
|
mov #0xaaaa, &DMEM_214
|
mov #0xaaaa, &DMEM_214
|
rrc.b @r6+ ;# RRC.B ({C=0, mem09=0x2533} => {mem09=0x2519, C=1})
|
rrc.b @r6+ ;# RRC.B ({C=0, mem09=0x2533} => {mem09=0x2519, C=1})
|
mov r2, r7
|
mov r2, r7
|
|
|
mov #0x0001, r2 ;# Test 3: Low Byte
|
mov #0x0001, r2 ;# Test 3: Low Byte
|
mov #0x2532, &DMEM_214
|
mov #0x2532, &DMEM_214
|
mov #DMEM_214, r8
|
mov #DMEM_214, r8
|
mov #0xaaaa, &DMEM_216
|
mov #0xaaaa, &DMEM_216
|
rrc.b @r8+ ;# RRC.B ({C=1, mem0a=0x2532} => {mem0a=0x2599, C=0})
|
rrc.b @r8+ ;# RRC.B ({C=1, mem0a=0x2532} => {mem0a=0x2599, C=0})
|
mov r2, r9
|
mov r2, r9
|
|
|
mov #0x0001, r2 ;# Test 4: Low Byte
|
mov #0x0001, r2 ;# Test 4: Low Byte
|
mov #0x2533, &DMEM_216
|
mov #0x2533, &DMEM_216
|
mov #DMEM_216, r10
|
mov #DMEM_216, r10
|
mov #0xaaaa, &DMEM_218
|
mov #0xaaaa, &DMEM_218
|
rrc.b @r10+ ;# RRC.B ({C=1, mem0b=0x2533} => {mem0b=0x2599, C=1})
|
rrc.b @r10+ ;# RRC.B ({C=1, mem0b=0x2533} => {mem0b=0x2599, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0xA000, r15
|
mov #0xA000, r15
|
|
|
# Addressing mode: @Rn+ (High Byte)
|
# Addressing mode: @Rn+ (High Byte)
|
#-----------------------------------
|
#-----------------------------------
|
|
|
mov #0x0000, r2 ;# Test 1: High Byte
|
mov #0x0000, r2 ;# Test 1: High Byte
|
mov #0x3225, &DMEM_218
|
mov #0x3225, &DMEM_218
|
mov #DMEM_219, r4
|
mov #DMEM_219, r4
|
mov #0xaaaa, &DMEM_21A
|
mov #0xaaaa, &DMEM_21A
|
rrc.b @r4+ ;# RRC.B ({C=0, mem0c=0x3225} => {mem0c=0x1925, C=0})
|
rrc.b @r4+ ;# RRC.B ({C=0, mem0c=0x3225} => {mem0c=0x1925, C=0})
|
mov r2, r6
|
mov r2, r6
|
|
|
mov #0x0000, r2 ;# Test 2: High Byte
|
mov #0x0000, r2 ;# Test 2: High Byte
|
mov #0x3325, &DMEM_21A
|
mov #0x3325, &DMEM_21A
|
mov #DMEM_21B, r6
|
mov #DMEM_21B, r6
|
mov #0xaaaa, &DMEM_21C
|
mov #0xaaaa, &DMEM_21C
|
rrc.b @r6+ ;# RRC.B ({C=0, mem0d=0x3325} => {mem0d=0x1925, C=1})
|
rrc.b @r6+ ;# RRC.B ({C=0, mem0d=0x3325} => {mem0d=0x1925, C=1})
|
mov r2, r8
|
mov r2, r8
|
|
|
mov #0x0001, r2 ;# Test 3: High Byte
|
mov #0x0001, r2 ;# Test 3: High Byte
|
mov #0x3225, &DMEM_21C
|
mov #0x3225, &DMEM_21C
|
mov #DMEM_21D, r8
|
mov #DMEM_21D, r8
|
mov #0xaaaa, &DMEM_21E
|
mov #0xaaaa, &DMEM_21E
|
rrc.b @r8+ ;# RRC.B ({C=1, mem0e=0x3225} => {mem0e=0x9925, C=0})
|
rrc.b @r8+ ;# RRC.B ({C=1, mem0e=0x3225} => {mem0e=0x9925, C=0})
|
mov r2, r10
|
mov r2, r10
|
|
|
mov #0x0001, r2 ;# Test 4: High Byte
|
mov #0x0001, r2 ;# Test 4: High Byte
|
mov #0x3325, &DMEM_21E
|
mov #0x3325, &DMEM_21E
|
mov #DMEM_21F, r10
|
mov #DMEM_21F, r10
|
mov #0xaaaa, &DMEM_220
|
mov #0xaaaa, &DMEM_220
|
rrc.b @r10+ ;# RRC.B ({C=1, mem0f=0x3325} => {mem0f=0x9925, C=1})
|
rrc.b @r10+ ;# RRC.B ({C=1, mem0f=0x3325} => {mem0f=0x9925, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0xA001, r15
|
mov #0xA001, r15
|
|
|
|
|
# Addressing mode: X(Rn) (Low Byte)
|
# Addressing mode: X(Rn) (Low Byte)
|
#-----------------------------------
|
#-----------------------------------
|
|
|
mov #0x0000, r2 ;# Test 1
|
mov #0x0000, r2 ;# Test 1
|
mov #0x2532, &DMEM_220
|
mov #0x2532, &DMEM_220
|
mov #DMEM_200, r4
|
mov #DMEM_200, r4
|
mov #0xaaaa, &DMEM_222
|
mov #0xaaaa, &DMEM_222
|
rrc.b 32(r4) ;# RRC ({C=0, mem10=0x2532} => {mem10=0x2519, C=0})
|
rrc.b 32(r4) ;# RRC ({C=0, mem10=0x2532} => {mem10=0x2519, C=0})
|
mov r2, r5
|
mov r2, r5
|
|
|
mov #0x0000, r2 ;# Test 2
|
mov #0x0000, r2 ;# Test 2
|
mov #0x2533, &DMEM_222
|
mov #0x2533, &DMEM_222
|
mov #DMEM_200, r6
|
mov #DMEM_200, r6
|
mov #0xaaaa, &DMEM_224
|
mov #0xaaaa, &DMEM_224
|
rrc.b 34(r6) ;# RRC ({C=0, mem11=0x2533} => {mem11=0x2519, C=1})
|
rrc.b 34(r6) ;# RRC ({C=0, mem11=0x2533} => {mem11=0x2519, C=1})
|
mov r2, r7
|
mov r2, r7
|
|
|
mov #0x0001, r2 ;# Test 3
|
mov #0x0001, r2 ;# Test 3
|
mov #0x2532, &DMEM_224
|
mov #0x2532, &DMEM_224
|
mov #DMEM_200, r8
|
mov #DMEM_200, r8
|
mov #0xaaaa, &DMEM_226
|
mov #0xaaaa, &DMEM_226
|
rrc.b 36(r8) ;# RRC ({C=1, mem12=0x2532} => {mem12=0x2599, C=0})
|
rrc.b 36(r8) ;# RRC ({C=1, mem12=0x2532} => {mem12=0x2599, C=0})
|
mov r2, r9
|
mov r2, r9
|
|
|
mov #0x0001, r2 ;# Test 4
|
mov #0x0001, r2 ;# Test 4
|
mov #0x2533, &DMEM_226
|
mov #0x2533, &DMEM_226
|
mov #DMEM_200, r10
|
mov #DMEM_200, r10
|
mov #0xaaaa, &DMEM_228
|
mov #0xaaaa, &DMEM_228
|
rrc.b 38(r10) ;# RRC ({C=1, mem13=0x2533} => {mem13=0x2599, C=1})
|
rrc.b 38(r10) ;# RRC ({C=1, mem13=0x2533} => {mem13=0x2599, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0xB000, r15
|
mov #0xB000, r15
|
|
|
# Addressing mode: X(Rn) (High Byte)
|
# Addressing mode: X(Rn) (High Byte)
|
#------------------------------------
|
#------------------------------------
|
|
|
mov #0x0000, r2 ;# Test 1
|
mov #0x0000, r2 ;# Test 1
|
mov #0x3225, &DMEM_228
|
mov #0x3225, &DMEM_228
|
mov #DMEM_200, r4
|
mov #DMEM_200, r4
|
mov #0xaaaa, &DMEM_22A
|
mov #0xaaaa, &DMEM_22A
|
rrc.b 41(r4) ;# RRC ({C=0, mem14=0x3225} => {mem14=0x1925, C=0})
|
rrc.b 41(r4) ;# RRC ({C=0, mem14=0x3225} => {mem14=0x1925, C=0})
|
mov r2, r5
|
mov r2, r5
|
|
|
mov #0x0000, r2 ;# Test 2
|
mov #0x0000, r2 ;# Test 2
|
mov #0x3325, &DMEM_22A
|
mov #0x3325, &DMEM_22A
|
mov #DMEM_200, r6
|
mov #DMEM_200, r6
|
mov #0xaaaa, &DMEM_22C
|
mov #0xaaaa, &DMEM_22C
|
rrc.b 43(r6) ;# RRC ({C=0, mem15=0x3325} => {mem15=0x1925, C=1})
|
rrc.b 43(r6) ;# RRC ({C=0, mem15=0x3325} => {mem15=0x1925, C=1})
|
mov r2, r7
|
mov r2, r7
|
|
|
mov #0x0001, r2 ;# Test 3
|
mov #0x0001, r2 ;# Test 3
|
mov #0x3225, &DMEM_22C
|
mov #0x3225, &DMEM_22C
|
mov #DMEM_200, r8
|
mov #DMEM_200, r8
|
mov #0xaaaa, &DMEM_22E
|
mov #0xaaaa, &DMEM_22E
|
rrc.b 45(r8) ;# RRC ({C=1, mem16=0x3225} => {mem16=0x9925, C=0})
|
rrc.b 45(r8) ;# RRC ({C=1, mem16=0x3225} => {mem16=0x9925, C=0})
|
mov r2, r9
|
mov r2, r9
|
|
|
mov #0x0001, r2 ;# Test 4
|
mov #0x0001, r2 ;# Test 4
|
mov #0x3325, &DMEM_22E
|
mov #0x3325, &DMEM_22E
|
mov #DMEM_200, r10
|
mov #DMEM_200, r10
|
mov #0xaaaa, &DMEM_230
|
mov #0xaaaa, &DMEM_230
|
rrc.b 47(r10) ;# RRC ({C=1, mem17=0x3325} => {mem17=0x9925, C=1})
|
rrc.b 47(r10) ;# RRC ({C=1, mem17=0x3325} => {mem17=0x9925, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0xB001, r15
|
mov #0xB001, r15
|
|
|
|
|
# Addressing mode: EDE (Low Byte)
|
# Addressing mode: EDE (Low Byte)
|
#---------------------------------
|
#---------------------------------
|
.set EDE_230, DMEM_230
|
.set EDE_230, DMEM_230
|
.set EDE_232, DMEM_232
|
.set EDE_232, DMEM_232
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.set EDE_234, DMEM_234
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.set EDE_234, DMEM_234
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.set EDE_236, DMEM_236
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.set EDE_236, DMEM_236
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|
|
mov #0x0000, r2 ;# Test 1
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mov #0x0000, r2 ;# Test 1
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mov #0x2532, &DMEM_230
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mov #0x2532, &DMEM_230
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mov #0xaaaa, &DMEM_232
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mov #0xaaaa, &DMEM_232
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rrc.b EDE_230 ;# RRC ({C=0, mem18=0x2532} => {mem18=0x2519, C=0})
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rrc.b EDE_230+PMEM_LENGTH ;# RRC ({C=0, mem18=0x2532} => {mem18=0x2519, C=0})
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mov r2, r5
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mov r2, r5
|
|
|
mov #0x0000, r2 ;# Test 2
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mov #0x0000, r2 ;# Test 2
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mov #0x2533, &DMEM_232
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mov #0x2533, &DMEM_232
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mov #0xaaaa, &DMEM_234
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mov #0xaaaa, &DMEM_234
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rrc.b EDE_232 ;# RRC ({C=0, mem19=0x2533} => {mem19=0x2519, C=1})
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rrc.b EDE_232+PMEM_LENGTH ;# RRC ({C=0, mem19=0x2533} => {mem19=0x2519, C=1})
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mov r2, r7
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mov r2, r7
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|
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mov #0x0001, r2 ;# Test 3
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mov #0x0001, r2 ;# Test 3
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mov #0x2532, &DMEM_234
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mov #0x2532, &DMEM_234
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mov #0xaaaa, &DMEM_236
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mov #0xaaaa, &DMEM_236
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rrc.b EDE_234 ;# RRC ({C=1, mem1a=0x2532} => {mem1a=0x2599, C=0})
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rrc.b EDE_234+PMEM_LENGTH ;# RRC ({C=1, mem1a=0x2532} => {mem1a=0x2599, C=0})
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mov r2, r9
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mov r2, r9
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|
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mov #0x0001, r2 ;# Test 4
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mov #0x0001, r2 ;# Test 4
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mov #0x2533, &DMEM_236
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mov #0x2533, &DMEM_236
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mov #0xaaaa, &DMEM_238
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mov #0xaaaa, &DMEM_238
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rrc.b EDE_236 ;# RRC ({C=1, mem1b=0x2533} => {mem1b=0x2599, C=1})
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rrc.b EDE_236+PMEM_LENGTH ;# RRC ({C=1, mem1b=0x2533} => {mem1b=0x2599, C=1})
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mov r2, r11
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mov r2, r11
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|
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mov #0xC000, r15
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mov #0xC000, r15
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|
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# Addressing mode: EDE (High Byte)
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# Addressing mode: EDE (High Byte)
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#----------------------------------
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#----------------------------------
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.set EDE_239, DMEM_239
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.set EDE_239, DMEM_239
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.set EDE_23B, DMEM_23B
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.set EDE_23B, DMEM_23B
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.set EDE_23D, DMEM_23D
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.set EDE_23D, DMEM_23D
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.set EDE_23F, DMEM_23F
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.set EDE_23F, DMEM_23F
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|
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mov #0x0000, r2 ;# Test 1
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mov #0x0000, r2 ;# Test 1
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mov #0x3225, &DMEM_238
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mov #0x3225, &DMEM_238
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mov #0xaaaa, &DMEM_23A
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mov #0xaaaa, &DMEM_23A
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rrc.b EDE_239 ;# RRC ({C=0, mem1c=0x3225} => {mem1c=0x1925, C=0})
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rrc.b EDE_239+PMEM_LENGTH ;# RRC ({C=0, mem1c=0x3225} => {mem1c=0x1925, C=0})
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mov r2, r5
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mov r2, r5
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|
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mov #0x0000, r2 ;# Test 2
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mov #0x0000, r2 ;# Test 2
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mov #0x3325, &DMEM_23A
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mov #0x3325, &DMEM_23A
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mov #0xaaaa, &DMEM_23C
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mov #0xaaaa, &DMEM_23C
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rrc.b EDE_23B ;# RRC ({C=0, mem1d=0x3325} => {mem1d=0x1925, C=1})
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rrc.b EDE_23B+PMEM_LENGTH ;# RRC ({C=0, mem1d=0x3325} => {mem1d=0x1925, C=1})
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mov r2, r7
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mov r2, r7
|
|
|
mov #0x0001, r2 ;# Test 3
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mov #0x0001, r2 ;# Test 3
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mov #0x3225, &DMEM_23C
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mov #0x3225, &DMEM_23C
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mov #0xaaaa, &DMEM_23E
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mov #0xaaaa, &DMEM_23E
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rrc.b EDE_23D ;# RRC ({C=1, mem1e=0x3225} => {mem1e=0x9925, C=0})
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rrc.b EDE_23D+PMEM_LENGTH ;# RRC ({C=1, mem1e=0x3225} => {mem1e=0x9925, C=0})
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mov r2, r9
|
mov r2, r9
|
|
|
mov #0x0001, r2 ;# Test 4
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mov #0x0001, r2 ;# Test 4
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mov #0x3325, &DMEM_23E
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mov #0x3325, &DMEM_23E
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mov #0xaaaa, &DMEM_240
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mov #0xaaaa, &DMEM_240
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rrc.b EDE_23F ;# RRC ({C=1, mem1f=0x3325} => {mem1f=0x9925, C=1})
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rrc.b EDE_23F+PMEM_LENGTH ;# RRC ({C=1, mem1f=0x3325} => {mem1f=0x9925, C=1})
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mov r2, r11
|
mov r2, r11
|
|
|
mov #0xC001, r15
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mov #0xC001, r15
|
|
|
|
|
# Addressing mode: &EDE (Low Byte)
|
# Addressing mode: &EDE (Low Byte)
|
#----------------------------------
|
#----------------------------------
|
.set aEDE_240, DMEM_240
|
.set aEDE_240, DMEM_240
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.set aEDE_242, DMEM_242
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.set aEDE_242, DMEM_242
|
.set aEDE_244, DMEM_244
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.set aEDE_244, DMEM_244
|
.set aEDE_246, DMEM_246
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.set aEDE_246, DMEM_246
|
|
|
mov #0x0000, r2 ;# Test 1
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mov #0x0000, r2 ;# Test 1
|
mov #0x2532, &DMEM_240
|
mov #0x2532, &DMEM_240
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mov #0xaaaa, &DMEM_242
|
mov #0xaaaa, &DMEM_242
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rrc.b &aEDE_240 ;# RRC ({C=0, mem20=0x2532} => {mem20=0x2519, C=0})
|
rrc.b &aEDE_240 ;# RRC ({C=0, mem20=0x2532} => {mem20=0x2519, C=0})
|
mov r2, r5
|
mov r2, r5
|
|
|
mov #0x0000, r2 ;# Test 2
|
mov #0x0000, r2 ;# Test 2
|
mov #0x2533, &DMEM_242
|
mov #0x2533, &DMEM_242
|
mov #0xaaaa, &DMEM_244
|
mov #0xaaaa, &DMEM_244
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rrc.b &aEDE_242 ;# RRC ({C=0, mem21=0x2533} => {mem21=0x2519, C=1})
|
rrc.b &aEDE_242 ;# RRC ({C=0, mem21=0x2533} => {mem21=0x2519, C=1})
|
mov r2, r7
|
mov r2, r7
|
|
|
mov #0x0001, r2 ;# Test 3
|
mov #0x0001, r2 ;# Test 3
|
mov #0x2532, &DMEM_244
|
mov #0x2532, &DMEM_244
|
mov #0xaaaa, &DMEM_246
|
mov #0xaaaa, &DMEM_246
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rrc.b &aEDE_244 ;# RRC ({C=1, mem22=0x2532} => {mem22=0x2599, C=0})
|
rrc.b &aEDE_244 ;# RRC ({C=1, mem22=0x2532} => {mem22=0x2599, C=0})
|
mov r2, r9
|
mov r2, r9
|
|
|
mov #0x0001, r2 ;# Test 4
|
mov #0x0001, r2 ;# Test 4
|
mov #0x2533, &DMEM_246
|
mov #0x2533, &DMEM_246
|
mov #0xaaaa, &DMEM_248
|
mov #0xaaaa, &DMEM_248
|
rrc.b &aEDE_246 ;# RRC ({C=1, mem23=0x2533} => {mem23=0x2599, C=1})
|
rrc.b &aEDE_246 ;# RRC ({C=1, mem23=0x2533} => {mem23=0x2599, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0xD000, r15
|
mov #0xD000, r15
|
|
|
# Addressing mode: &EDE (High Byte)
|
# Addressing mode: &EDE (High Byte)
|
#-----------------------------------
|
#-----------------------------------
|
.set aEDE_249, DMEM_249
|
.set aEDE_249, DMEM_249
|
.set aEDE_24B, DMEM_24B
|
.set aEDE_24B, DMEM_24B
|
.set aEDE_24D, DMEM_24D
|
.set aEDE_24D, DMEM_24D
|
.set aEDE_24F, DMEM_24F
|
.set aEDE_24F, DMEM_24F
|
|
|
mov #0x0000, r2 ;# Test 1
|
mov #0x0000, r2 ;# Test 1
|
mov #0x3225, &DMEM_248
|
mov #0x3225, &DMEM_248
|
mov #0xaaaa, &DMEM_24A
|
mov #0xaaaa, &DMEM_24A
|
rrc.b &aEDE_249 ;# RRC ({C=0, mem24=0x3225} => {mem24=0x1925, C=0})
|
rrc.b &aEDE_249 ;# RRC ({C=0, mem24=0x3225} => {mem24=0x1925, C=0})
|
mov r2, r5
|
mov r2, r5
|
|
|
mov #0x0000, r2 ;# Test 2
|
mov #0x0000, r2 ;# Test 2
|
mov #0x3325, &DMEM_24A
|
mov #0x3325, &DMEM_24A
|
mov #0xaaaa, &DMEM_24C
|
mov #0xaaaa, &DMEM_24C
|
rrc.b &aEDE_24B ;# RRC ({C=0, mem25=0x3325} => {mem25=0x1925, C=1})
|
rrc.b &aEDE_24B ;# RRC ({C=0, mem25=0x3325} => {mem25=0x1925, C=1})
|
mov r2, r7
|
mov r2, r7
|
|
|
mov #0x0001, r2 ;# Test 3
|
mov #0x0001, r2 ;# Test 3
|
mov #0x3225, &DMEM_24C
|
mov #0x3225, &DMEM_24C
|
mov #0xaaaa, &DMEM_24E
|
mov #0xaaaa, &DMEM_24E
|
rrc.b &aEDE_24D ;# RRC ({C=1, mem26=0x3225} => {mem26=0x9925, C=0})
|
rrc.b &aEDE_24D ;# RRC ({C=1, mem26=0x3225} => {mem26=0x9925, C=0})
|
mov r2, r9
|
mov r2, r9
|
|
|
mov #0x0001, r2 ;# Test 4
|
mov #0x0001, r2 ;# Test 4
|
mov #0x3325, &DMEM_24E
|
mov #0x3325, &DMEM_24E
|
mov #0xaaaa, &DMEM_250
|
mov #0xaaaa, &DMEM_250
|
rrc.b &aEDE_24F ;# RRC ({C=1, mem27=0x3325} => {mem27=0x9925, C=1})
|
rrc.b &aEDE_24F ;# RRC ({C=1, mem27=0x3325} => {mem27=0x9925, C=1})
|
mov r2, r11
|
mov r2, r11
|
|
|
mov #0xD001, r15
|
mov #0xD001, r15
|
|
|
|
|
|
|
/* ---------------------- END OF TEST --------------- */
|
/* ---------------------- END OF TEST --------------- */
|
end_of_test:
|
end_of_test:
|
nop
|
nop
|
br #0xffff
|
br #0xffff
|
|
|
|
|
|
|
/* ---------------------- INTERRUPT VECTORS --------------- */
|
/* ---------------------- INTERRUPT VECTORS --------------- */
|
|
|
.section .vectors, "a"
|
.section .vectors, "a"
|
.word end_of_test ; Interrupt 0 (lowest priority)
|
.word end_of_test ; Interrupt 0 (lowest priority)
|
.word end_of_test ; Interrupt 1
|
.word end_of_test ; Interrupt 1
|
.word end_of_test ; Interrupt 2
|
.word end_of_test ; Interrupt 2
|
.word end_of_test ; Interrupt 3
|
.word end_of_test ; Interrupt 3
|
.word end_of_test ; Interrupt 4
|
.word end_of_test ; Interrupt 4
|
.word end_of_test ; Interrupt 5
|
.word end_of_test ; Interrupt 5
|
.word end_of_test ; Interrupt 6
|
.word end_of_test ; Interrupt 6
|
.word end_of_test ; Interrupt 7
|
.word end_of_test ; Interrupt 7
|
.word end_of_test ; Interrupt 8
|
.word end_of_test ; Interrupt 8
|
.word end_of_test ; Interrupt 9
|
.word end_of_test ; Interrupt 9
|
.word end_of_test ; Interrupt 10 Watchdog timer
|
.word end_of_test ; Interrupt 10 Watchdog timer
|
.word end_of_test ; Interrupt 11
|
.word end_of_test ; Interrupt 11
|
.word end_of_test ; Interrupt 12
|
.word end_of_test ; Interrupt 12
|
.word end_of_test ; Interrupt 13
|
.word end_of_test ; Interrupt 13
|
.word end_of_test ; Interrupt 14 NMI
|
.word end_of_test ; Interrupt 14 NMI
|
.word main ; Interrupt 15 (highest priority) RESET
|
.word main ; Interrupt 15 (highest priority) RESET
|
|
|