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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [submit.f] - Diff between revs 111 and 134

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//=============================================================================
//=============================================================================
// Copyright (C) 2001 Authors
// Copyright (C) 2001 Authors
//
//
// This source file may be used and distributed without restriction provided
// This source file may be used and distributed without restriction provided
// that this copyright statement is not removed from the file and that any
// that this copyright statement is not removed from the file and that any
// derivative work contains the original copyright notice and the associated
// derivative work contains the original copyright notice and the associated
// disclaimer.
// disclaimer.
//
//
// This source file is free software; you can redistribute it and/or modify
// This source file is free software; you can redistribute it and/or modify
// it under the terms of the GNU Lesser General Public License as published
// it under the terms of the GNU Lesser General Public License as published
// by the Free Software Foundation; either version 2.1 of the License, or
// by the Free Software Foundation; either version 2.1 of the License, or
// (at your option) any later version.
// (at your option) any later version.
//
//
// This source is distributed in the hope that it will be useful, but WITHOUT
// This source is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
// License for more details.
// License for more details.
//
//
// You should have received a copy of the GNU Lesser General Public License
// You should have received a copy of the GNU Lesser General Public License
// along with this source; if not, write to the Free Software Foundation,
// along with this source; if not, write to the Free Software Foundation,
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
//
//
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
//
//
// File Name: submit.f
// File Name: submit.f
//
//
// Author(s):
// Author(s):
//             - Olivier Girard,    olgirard@gmail.com
//             - Olivier Girard,    olgirard@gmail.com
//
//
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// $Rev: 111 $
// $Rev: 134 $
// $LastChangedBy: olivier.girard $
// $LastChangedBy: olivier.girard $
// $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $
// $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $
//=============================================================================
//=============================================================================
 
 
//=============================================================================
//=============================================================================
// Testbench related
// Testbench related
//=============================================================================
//=============================================================================
 
 
+incdir+../../../bench/verilog/
+incdir+../../../bench/verilog/
../../../bench/verilog/tb_openMSP430.v
../../../bench/verilog/tb_openMSP430.v
../../../bench/verilog/ram.v
../../../bench/verilog/ram.v
../../../bench/verilog/msp_debug.v
../../../bench/verilog/msp_debug.v
 
 
 
 
//=============================================================================
//=============================================================================
// Module specific modules
// CPU
//=============================================================================
//=============================================================================
 
 
+incdir+../../../rtl/verilog/
+incdir+../../../rtl/verilog/
 
-f ../src/core.f
 
 
 
 
 
//=============================================================================
 
// Peripherals
 
//=============================================================================
 
 
+incdir+../../../rtl/verilog/periph/
+incdir+../../../rtl/verilog/periph/
../../../rtl/verilog/openMSP430_defines.v
 
../../../rtl/verilog/openMSP430.v
 
../../../rtl/verilog/omsp_frontend.v
 
../../../rtl/verilog/omsp_execution_unit.v
 
../../../rtl/verilog/omsp_register_file.v
 
../../../rtl/verilog/omsp_alu.v
 
../../../rtl/verilog/omsp_mem_backbone.v
 
../../../rtl/verilog/omsp_clock_module.v
 
../../../rtl/verilog/omsp_sfr.v
 
../../../rtl/verilog/omsp_dbg.v
 
../../../rtl/verilog/omsp_dbg_hwbrk.v
 
../../../rtl/verilog/omsp_dbg_uart.v
 
../../../rtl/verilog/omsp_watchdog.v
 
../../../rtl/verilog/omsp_multiplier.v
 
../../../rtl/verilog/omsp_sync_cell.v
 
../../../rtl/verilog/periph/omsp_gpio.v
../../../rtl/verilog/periph/omsp_gpio.v
../../../rtl/verilog/periph/omsp_timerA.v
../../../rtl/verilog/periph/omsp_timerA.v
 
//../../../rtl/verilog/periph/omsp_uart.v
../../../rtl/verilog/periph/template_periph_8b.v
../../../rtl/verilog/periph/template_periph_8b.v
../../../rtl/verilog/periph/template_periph_16b.v
../../../rtl/verilog/periph/template_periph_16b.v
 
 

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