/*===========================================================================*/
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/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* Copyright (C) 2001 Authors */
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/* */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* disclaimer. */
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/* */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* (at your option) any later version. */
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/* */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* License for more details. */
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/* */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/* */
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/*===========================================================================*/
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/*===========================================================================*/
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/* 8 BIT PERIPHERAL TEMPLATE */
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/* 8 BIT PERIPHERAL TEMPLATE */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* Test the 8 bit peripheral template: */
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/* Test the 8 bit peripheral template: */
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/* - Read/Write register access. */
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/* - Read/Write register access. */
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/* */
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/* */
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/* Author(s): */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/* */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* $Rev: 111 $ */
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/* $Rev: 141 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $ */
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/* $LastChangedDate: 2012-05-05 23:22:06 +0200 (Sat, 05 May 2012) $ */
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/*===========================================================================*/
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/*===========================================================================*/
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.global main
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.include "pmem_defs.asm"
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.set DMEM_BASE, (__data_start )
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.global main
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.set DMEM_200, (__data_start+0x00)
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.set DMEM_201, (__data_start+0x01)
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.set DMEM_202, (__data_start+0x02)
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.set DMEM_203, (__data_start+0x03)
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.set DMEM_204, (__data_start+0x04)
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.set DMEM_205, (__data_start+0x05)
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.set DMEM_206, (__data_start+0x06)
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.set DMEM_207, (__data_start+0x07)
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.set CNTRL1, 0x0090
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.set CNTRL1, 0x0090
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.set CNTRL2, 0x0091
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.set CNTRL2, 0x0091
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.set CNTRL3, 0x0092
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.set CNTRL3, 0x0092
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.set CNTRL4, 0x0093
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.set CNTRL4, 0x0093
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main:
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main:
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/* -------------- TEST RD/WR REGISTER ACCESS --------------- */
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/* -------------- TEST RD/WR REGISTER ACCESS --------------- */
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mov.b #0x11, &CNTRL1 ; CNTRL1
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mov.b #0x11, &CNTRL1 ; CNTRL1
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mov.b &CNTRL1, &DMEM_200
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mov.b &CNTRL1, &DMEM_200
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mov.b #0xee, &CNTRL1
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mov.b #0xee, &CNTRL1
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mov.b &CNTRL1, &DMEM_201
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mov.b &CNTRL1, &DMEM_201
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mov.b #0xaa, &CNTRL2 ; CNTRL2
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mov.b #0xaa, &CNTRL2 ; CNTRL2
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mov.b &CNTRL2, &DMEM_202
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mov.b &CNTRL2, &DMEM_202
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mov.b #0x55, &CNTRL2
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mov.b #0x55, &CNTRL2
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mov.b &CNTRL2, &DMEM_203
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mov.b &CNTRL2, &DMEM_203
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mov.b #0x5a, &CNTRL3 ; CNTRL3
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mov.b #0x5a, &CNTRL3 ; CNTRL3
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mov.b &CNTRL3, &DMEM_204
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mov.b &CNTRL3, &DMEM_204
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mov.b #0xa5, &CNTRL3
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mov.b #0xa5, &CNTRL3
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mov.b &CNTRL3, &DMEM_205
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mov.b &CNTRL3, &DMEM_205
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mov.b #0x55, &CNTRL4 ; CNTRL4
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mov.b #0x55, &CNTRL4 ; CNTRL4
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mov.b &CNTRL4, &DMEM_206
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mov.b &CNTRL4, &DMEM_206
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mov.b #0xaa, &CNTRL4
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mov.b #0xaa, &CNTRL4
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mov.b &CNTRL4, &DMEM_207
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mov.b &CNTRL4, &DMEM_207
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mov #0x0001, r15
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mov #0x0001, r15
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/* ---------------------- END OF TEST --------------- */
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/* ---------------------- END OF TEST --------------- */
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end_of_test:
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end_of_test:
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nop
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nop
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br #0xffff
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br #0xffff
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/* ---------------------- INTERRUPT VECTORS --------------- */
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/* ---------------------- INTERRUPT VECTORS --------------- */
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.section .vectors, "a"
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.section .vectors, "a"
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.word end_of_test ; Interrupt 0 (lowest priority)
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.word end_of_test ; Interrupt 0 (lowest priority)
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.word end_of_test ; Interrupt 1
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.word end_of_test ; Interrupt 1
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.word end_of_test ; Interrupt 2
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.word end_of_test ; Interrupt 2
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.word end_of_test ; Interrupt 3
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.word end_of_test ; Interrupt 3
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.word end_of_test ; Interrupt 4
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.word end_of_test ; Interrupt 4
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.word end_of_test ; Interrupt 5
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.word end_of_test ; Interrupt 5
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.word end_of_test ; Interrupt 6
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.word end_of_test ; Interrupt 6
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.word end_of_test ; Interrupt 7
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.word end_of_test ; Interrupt 7
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.word end_of_test ; Interrupt 8
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.word end_of_test ; Interrupt 8
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.word end_of_test ; Interrupt 9
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.word end_of_test ; Interrupt 9
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.word end_of_test ; Interrupt 10 Watchdog timer
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.word end_of_test ; Interrupt 10 Watchdog timer
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.word end_of_test ; Interrupt 11
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.word end_of_test ; Interrupt 11
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.word end_of_test ; Interrupt 12
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.word end_of_test ; Interrupt 12
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.word end_of_test ; Interrupt 13
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.word end_of_test ; Interrupt 13
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.word end_of_test ; Interrupt 14 NMI
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.word end_of_test ; Interrupt 14 NMI
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.word main ; Interrupt 15 (highest priority) RESET
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.word main ; Interrupt 15 (highest priority) RESET
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