|
|
|
|
xilinx.com
|
xilinx.com
|
CoreGen
|
project
|
coregen
|
coregen
|
1.0
|
1.0
|
|
|
|
|
ram_16x512
|
ram_16x1k_dp
|
|
|
|
|
ram_16x512
|
ram_16x1k_dp
|
|
Native
|
|
AXI4_Full
|
|
Memory_Slave
|
|
false
|
|
4
|
|
True_Dual_Port_RAM
|
|
false
|
|
No_ECC
|
|
false
|
|
false
|
|
false
|
|
Single_Bit_Error_Injection
|
|
true
|
|
8
|
|
Minimum_Area
|
|
8kx2
|
|
true
|
|
16
|
|
1024
|
|
16
|
|
WRITE_FIRST
|
|
Use_ENA_Pin
|
|
16
|
|
16
|
|
WRITE_FIRST
|
|
Use_ENB_Pin
|
|
false
|
|
false
|
|
false
|
|
false
|
|
false
|
|
false
|
|
false
|
|
false
|
|
0
|
|
false
|
|
no_coe_file_loaded
|
|
false
|
|
0
|
|
false
|
|
false
|
|
CE
|
|
0
|
|
false
|
|
false
|
|
CE
|
|
0
|
|
SYNC
|
|
false
|
|
100
|
|
50
|
|
100
|
|
50
|
|
100
|
|
100
|
|
ALL
|
|
false
|
|
false
|
|
|
|
|
|
|
|
|
|
coregen
|
|
./
|
|
./tmp/
|
|
./tmp/_cg/
|
|
|
|
|
|
xc6slx9
|
|
spartan6
|
|
csg324
|
|
-2
|
|
|
|
|
|
BusFormatAngleBracketNotRipped
|
|
Verilog
|
|
true
|
|
Foundation_ISE
|
|
false
|
|
false
|
|
false
|
|
Ngc
|
|
false
|
|
|
|
|
|
Behavioral
|
|
Verilog
|
|
false
|
|
|
|
|
|
2012-06-25+21:54
|
|
|
|
|
|
|
|
|
|
|
|
ram_16x1k_sp
|
|
|
|
|
|
ram_16x1k_sp
|
Native
|
Native
|
AXI4_Full
|
AXI4_Full
|
Memory_Slave
|
Memory_Slave
|
false
|
false
|
4
|
4
|
Single_Port_RAM
|
Single_Port_RAM
|
false
|
false
|
No_ECC
|
No_ECC
|
false
|
false
|
false
|
false
|
false
|
false
|
Single_Bit_Error_Injection
|
Single_Bit_Error_Injection
|
true
|
true
|
8
|
8
|
Minimum_Area
|
Minimum_Area
|
8kx2
|
8kx2
|
false
|
false
|
16
|
16
|
512
|
1024
|
16
|
16
|
WRITE_FIRST
|
WRITE_FIRST
|
Use_ENA_Pin
|
Use_ENA_Pin
|
16
|
16
|
16
|
16
|
WRITE_FIRST
|
WRITE_FIRST
|
Always_Enabled
|
Always_Enabled
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
0
|
0
|
false
|
false
|
no_coe_file_loaded
|
no_coe_file_loaded
|
false
|
false
|
0
|
0
|
false
|
false
|
false
|
false
|
CE
|
CE
|
0
|
0
|
false
|
false
|
false
|
false
|
CE
|
CE
|
0
|
0
|
SYNC
|
SYNC
|
false
|
false
|
100
|
100
|
50
|
50
|
|
0
|
|
0
|
|
100
|
|
0
|
|
ALL
|
|
false
|
|
false
|
|
|
|
|
|
|
|
|
|
coregen
|
|
./
|
|
./tmp/
|
|
./tmp/_cg/
|
|
|
|
|
|
xc6slx9
|
|
spartan6
|
|
csg324
|
|
-2
|
|
|
|
|
|
BusFormatAngleBracketNotRipped
|
|
Verilog
|
|
true
|
|
Foundation_ISE
|
|
false
|
|
false
|
|
false
|
|
Ngc
|
|
false
|
|
|
|
|
|
Behavioral
|
|
Verilog
|
|
false
|
|
|
|
|
|
2012-06-25+21:54
|
|
|
|
|
|
|
|
|
|
|
|
ram_16x8k_dp
|
|
|
|
|
|
ram_16x8k_dp
|
|
Native
|
|
AXI4_Full
|
|
Memory_Slave
|
|
false
|
|
4
|
|
True_Dual_Port_RAM
|
|
false
|
|
No_ECC
|
|
false
|
|
false
|
|
false
|
|
Single_Bit_Error_Injection
|
|
true
|
|
8
|
|
Minimum_Area
|
|
8kx2
|
|
true
|
|
16
|
|
8192
|
|
16
|
|
WRITE_FIRST
|
|
Use_ENA_Pin
|
|
16
|
|
16
|
|
WRITE_FIRST
|
|
Use_ENB_Pin
|
|
false
|
|
false
|
|
false
|
|
false
|
|
false
|
|
false
|
|
false
|
|
false
|
|
0
|
|
false
|
|
no_coe_file_loaded
|
|
false
|
|
0
|
|
false
|
|
false
|
|
CE
|
|
0
|
|
false
|
|
false
|
|
CE
|
|
0
|
|
SYNC
|
|
false
|
|
100
|
|
50
|
100
|
100
|
50
|
50
|
100
|
100
|
100
|
100
|
ALL
|
ALL
|
false
|
false
|
false
|
false
|
spartan6
|
spartan6
|
spartan6
|
spartan6
|
/home/pitchu/Projects/verilog/openMSP430/fpga/zxilinx_avnet_lx9microbard/rtl/verilog/coregen/tmp/_cg/
|
/home/pitchu/Projects/verilog/openMSP430/fpga/xilinx_avnet_lx9microbard/rtl/verilog/coregen/tmp/_cg/
|
0
|
0
|
1
|
1
|
0
|
0
|
0
|
0
|
4
|
4
|
0
|
2
|
8
|
8
|
1
|
1
|
1
|
1
|
0
|
0
|
no_coe_file_loaded
|
no_coe_file_loaded
|
0
|
0
|
0
|
0
|
SYNC
|
SYNC
|
0
|
0
|
CE
|
CE
|
0
|
0
|
0
|
0
|
1
|
1
|
0
|
0
|
1
|
1
|
2
|
2
|
WRITE_FIRST
|
WRITE_FIRST
|
16
|
16
|
16
|
16
|
512
|
8192
|
512
|
8192
|
9
|
13
|
0
|
0
|
CE
|
CE
|
0
|
0
|
0
|
0
|
0
|
1
|
0
|
0
|
1
|
1
|
2
|
2
|
WRITE_FIRST
|
WRITE_FIRST
|
16
|
16
|
16
|
16
|
512
|
8192
|
512
|
8192
|
9
|
13
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
ALL
|
ALL
|
0
|
1
|
0
|
0
|
0
|
0
|
0
|
0
|
|
|
|
|
|
|
|
|
coregen
|
coregen
|
./
|
./
|
./tmp/
|
./tmp/
|
./tmp/_cg/
|
./tmp/_cg/
|
|
|
|
|
xc6slx9
|
xc6slx9
|
spartan6
|
spartan6
|
csg324
|
csg324
|
-2
|
-2
|
|
|
|
|
BusFormatAngleBracketNotRipped
|
BusFormatAngleBracketNotRipped
|
Verilog
|
Verilog
|
true
|
true
|
Foundation_ISE
|
Foundation_ISE
|
false
|
false
|
false
|
false
|
false
|
false
|
Ngc
|
Ngc
|
false
|
false
|
|
|
|
|
Behavioral
|
Behavioral
|
Verilog
|
Verilog
|
false
|
false
|
|
|
|
|
2012-06-25+21:54
|
2012-06-25+21:54
|
|
|
|
|
|
|
|
|
customization_generator
|
customization_generator
|
|
|
./summary.log
|
./summary.log
|
unknown
|
unknown
|
Wed Aug 08 21:11:01 GMT 2012
|
Fri Nov 30 22:43:36 GMT 2012
|
0xF3CDD37E
|
0x76A61D5C
|
generationID_4013899584
|
generationID_4013899584
|
|
|
|
|
|
|
view_readme_generator
|
|
|
|
|
|
apply_current_project_options_generator
|
|
|
|
|
|
model_parameter_resolution_generator
|
model_parameter_resolution_generator
|
|
|
./summary.log
|
./summary.log
|
unknown
|
unknown
|
Wed Aug 08 21:13:17 GMT 2012
|
Fri Nov 30 22:43:41 GMT 2012
|
0xF3CDD37E
|
0x76A61D5C
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
ip_xco_generator
|
ip_xco_generator
|
|
|
./ram_16x512.xco
|
./ram_16x8k_dp.xco
|
xco
|
xco
|
Wed Aug 08 21:13:17 GMT 2012
|
Fri Nov 30 22:43:41 GMT 2012
|
0xA867FBD4
|
0xBCE8DABB
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
associated_files_generator
|
associated_files_generator
|
|
|
./ram_16x512/blk_mem_gen_v7_2_readme.txt
|
./ram_16x8k_dp/blk_mem_gen_v7_2_readme.txt
|
ignore
|
ignore
|
txt
|
txt
|
Sat Jul 21 06:10:41 GMT 2012
|
Sat Jul 21 06:10:41 GMT 2012
|
0x5661B352
|
0x5661B352
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/doc/blk_mem_gen_v7_2_vinfo.html
|
./ram_16x8k_dp/doc/blk_mem_gen_v7_2_vinfo.html
|
ignore
|
ignore
|
unknown
|
unknown
|
Sat Jul 21 06:10:41 GMT 2012
|
Sat Jul 21 06:10:41 GMT 2012
|
0x4D7A616C
|
0x4D7A616C
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/doc/pg058-blk-mem-gen.pdf
|
./ram_16x8k_dp/doc/pg058-blk-mem-gen.pdf
|
ignore
|
ignore
|
pdf
|
pdf
|
Sat Jul 21 06:10:41 GMT 2012
|
Sat Jul 21 06:10:41 GMT 2012
|
0xAE5E57E0
|
0xAE5E57E0
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
ejava_generator
|
ejava_generator
|
|
|
./ram_16x512/example_design/ram_16x512_exdes.ucf
|
./ram_16x8k_dp/example_design/ram_16x8k_dp_exdes.ucf
|
ignore
|
ignore
|
ucf
|
ucf
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0xC44C6B6D
|
0x8915DFA1
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/example_design/ram_16x512_exdes.vhd
|
./ram_16x8k_dp/example_design/ram_16x8k_dp_exdes.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0xE3C0EAFF
|
0xE6D2B7FE
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/example_design/ram_16x512_exdes.xdc
|
./ram_16x8k_dp/example_design/ram_16x8k_dp_exdes.xdc
|
ignore
|
ignore
|
xdc
|
xdc
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x7684D6D4
|
0x78E2D49A
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/example_design/ram_16x512_prod.vhd
|
./ram_16x8k_dp/example_design/ram_16x8k_dp_prod.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x18595B83
|
0x438ACD9E
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/implement/implement.bat
|
./ram_16x8k_dp/implement/implement.bat
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x9B9E25DC
|
0xB9217A9D
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/implement/implement.sh
|
./ram_16x8k_dp/implement/implement.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x8B9D9D57
|
0xAF7804B8
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/implement/planAhead_ise.bat
|
./ram_16x8k_dp/implement/planAhead_ise.bat
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x7ACBFFA1
|
0x45F8EA6E
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/implement/planAhead_ise.sh
|
./ram_16x8k_dp/implement/planAhead_ise.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x6DFBA35D
|
0x2D190EC7
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/implement/planAhead_ise.tcl
|
./ram_16x8k_dp/implement/planAhead_ise.tcl
|
ignore
|
ignore
|
tcl
|
tcl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x7B52EE1C
|
0x5D0CC17F
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/implement/xst.prj
|
./ram_16x8k_dp/implement/xst.prj
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0xD9EAD804
|
0x95A3A394
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/implement/xst.scr
|
./ram_16x8k_dp/implement/xst.scr
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0xD5D7BAC3
|
0xAEFDBD03
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/addr_gen.vhd
|
./ram_16x8k_dp/simulation/addr_gen.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x886696A8
|
0x886696A8
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/bmg_stim_gen.vhd
|
./ram_16x8k_dp/simulation/bmg_stim_gen.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x2FFFA2F0
|
0x6B4E65F0
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/bmg_tb_pkg.vhd
|
./ram_16x8k_dp/simulation/bmg_tb_pkg.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0xD4F2B061
|
0xD4F2B061
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/checker.vhd
|
./ram_16x8k_dp/simulation/checker.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x2A8E7144
|
0x2A8E7144
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/data_gen.vhd
|
./ram_16x8k_dp/simulation/data_gen.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0xE0759FCA
|
0xE0759FCA
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/simcmds.tcl
|
./ram_16x8k_dp/simulation/functional/simcmds.tcl
|
ignore
|
ignore
|
tcl
|
tcl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x6B4676B9
|
0xC6F18584
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/simulate_isim.sh
|
./ram_16x8k_dp/simulation/functional/simulate_isim.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0xBE113553
|
0xF4D07C79
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/simulate_mti.bat
|
./ram_16x8k_dp/simulation/functional/simulate_mti.bat
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x86EA5D67
|
0x86EA5D67
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/simulate_mti.do
|
./ram_16x8k_dp/simulation/functional/simulate_mti.do
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x87B7E125
|
0x97E24295
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/simulate_mti.sh
|
./ram_16x8k_dp/simulation/functional/simulate_mti.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x86EA5D67
|
0x86EA5D67
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/simulate_ncsim.sh
|
./ram_16x8k_dp/simulation/functional/simulate_ncsim.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0x81AF21C2
|
0xE7BDC3B4
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/simulate_vcs.sh
|
./ram_16x8k_dp/simulation/functional/simulate_vcs.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0x05EDBB79
|
0xDFEFF7D3
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/ucli_commands.key
|
./ram_16x8k_dp/simulation/functional/ucli_commands.key
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0x9434BB5A
|
0xCF9470F3
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/vcs_session.tcl
|
./ram_16x8k_dp/simulation/functional/vcs_session.tcl
|
ignore
|
ignore
|
tcl
|
tcl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0x230F2A4A
|
0x8A7787CC
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/wave_mti.do
|
./ram_16x8k_dp/simulation/functional/wave_mti.do
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0xF048DDD2
|
0xE1B9DA08
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/functional/wave_ncsim.sv
|
./ram_16x8k_dp/simulation/functional/wave_ncsim.sv
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0xCB80E76F
|
0xAFDD771C
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/ram_16x512_synth.vhd
|
./ram_16x8k_dp/simulation/ram_16x8k_dp_synth.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x41649DFD
|
0x4E15429D
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/ram_16x512_tb.vhd
|
./ram_16x8k_dp/simulation/ram_16x8k_dp_tb.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x6CDB1B5F
|
0xDFDD78A5
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/random.vhd
|
./ram_16x8k_dp/simulation/random.vhd
|
ignore
|
ignore
|
vhdl
|
vhdl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0xE1CDC376
|
0xE1CDC376
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/simcmds.tcl
|
./ram_16x8k_dp/simulation/timing/simcmds.tcl
|
ignore
|
ignore
|
tcl
|
tcl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0x6B4676B9
|
0xC6F18584
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/simulate_isim.sh
|
./ram_16x8k_dp/simulation/timing/simulate_isim.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x10CFAA49
|
0x564BBD15
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/simulate_mti.bat
|
./ram_16x8k_dp/simulation/timing/simulate_mti.bat
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x86EA5D67
|
0x86EA5D67
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/simulate_mti.do
|
./ram_16x8k_dp/simulation/timing/simulate_mti.do
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x46A6CEE9
|
0x5FF2004B
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/simulate_mti.sh
|
./ram_16x8k_dp/simulation/timing/simulate_mti.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x86EA5D67
|
0x86EA5D67
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/simulate_ncsim.sh
|
./ram_16x8k_dp/simulation/timing/simulate_ncsim.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0x9CF0B215
|
0x38E60766
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/simulate_vcs.sh
|
./ram_16x8k_dp/simulation/timing/simulate_vcs.sh
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0x5EF692D9
|
0x66F9F11C
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/ucli_commands.key
|
./ram_16x8k_dp/simulation/timing/ucli_commands.key
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0x9434BB5A
|
0xCF9470F3
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/vcs_session.tcl
|
./ram_16x8k_dp/simulation/timing/vcs_session.tcl
|
ignore
|
ignore
|
tcl
|
tcl
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0xEA78A00C
|
0x8B5C0EEA
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/wave_mti.do
|
./ram_16x8k_dp/simulation/timing/wave_mti.do
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:43 GMT 2012
|
0x3CE56E2D
|
0xA057B0F6
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512/simulation/timing/wave_ncsim.sv
|
./ram_16x8k_dp/simulation/timing/wave_ncsim.sv
|
ignore
|
ignore
|
unknown
|
unknown
|
Wed Aug 08 21:13:18 GMT 2012
|
Fri Nov 30 22:43:42 GMT 2012
|
0x7B82EFD3
|
0xF50DC3A6
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
ngc_netlist_generator
|
ngc_netlist_generator
|
|
|
./ram_16x512.ngc
|
./ram_16x8k_dp.ngc
|
ngc
|
ngc
|
Wed Aug 08 21:14:06 GMT 2012
|
Fri Nov 30 22:44:40 GMT 2012
|
0x4370BDB6
|
0xC275AA7D
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
obfuscate_netlist_generator
|
obfuscate_netlist_generator
|
|
|
|
|
padded_implementation_netlist_generator
|
padded_implementation_netlist_generator
|
|
|
|
|
instantiation_template_generator
|
instantiation_template_generator
|
|
|
./ram_16x512.veo
|
./ram_16x8k_dp.veo
|
veo
|
veo
|
Wed Aug 08 21:14:07 GMT 2012
|
Fri Nov 30 22:44:40 GMT 2012
|
0xE2746DB0
|
0x44743D78
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
synthesis_instantiation_wrapper_generator
|
synthesis_instantiation_wrapper_generator
|
|
|
./ram_16x512_synth.v
|
./ram_16x8k_dp_synth.v
|
verilog
|
verilog
|
verilogSynthesis
|
verilogSynthesis
|
Wed Aug 08 21:14:07 GMT 2012
|
Fri Nov 30 22:44:40 GMT 2012
|
0xC582CA75
|
0xC56A17C4
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
structural_simulation_model_generator
|
structural_simulation_model_generator
|
|
|
./ram_16x512.v
|
./ram_16x8k_dp.v
|
verilog
|
verilog
|
Wed Aug 08 21:14:07 GMT 2012
|
Fri Nov 30 22:44:40 GMT 2012
|
0xA7EFF1D0
|
0xA580F986
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
all_documents_generator
|
all_documents_generator
|
|
|
|
|
asy_generator
|
asy_generator
|
|
|
./ram_16x512.asy
|
./ram_16x8k_dp.asy
|
asy
|
asy
|
Wed Aug 08 21:14:10 GMT 2012
|
Fri Nov 30 22:44:44 GMT 2012
|
0xD92CF898
|
0xC80F28A5
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./summary.log
|
./summary.log
|
unknown
|
unknown
|
Wed Aug 08 21:14:10 GMT 2012
|
Fri Nov 30 22:44:44 GMT 2012
|
0xF3CDD37E
|
0x76A61D5C
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
xmdf_generator
|
xmdf_generator
|
|
|
./ram_16x512_xmdf.tcl
|
./ram_16x8k_dp_xmdf.tcl
|
tclXmdf
|
tclXmdf
|
tcl
|
tcl
|
Wed Aug 08 21:14:10 GMT 2012
|
Fri Nov 30 22:44:44 GMT 2012
|
0x96576944
|
0xB7CBC7A4
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
synthesis_ise_generator
|
synthesis_ise_generator
|
|
|
./ram_16x512.gise
|
./ram_16x8k_dp.gise
|
ignore
|
ignore
|
gise
|
gise
|
Wed Aug 08 21:14:15 GMT 2012
|
Fri Nov 30 22:44:51 GMT 2012
|
0x879AE5C3
|
0x552D948D
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512.xise
|
./ram_16x8k_dp.xise
|
ignore
|
ignore
|
xise
|
xise
|
Wed Aug 08 21:14:15 GMT 2012
|
Fri Nov 30 22:44:51 GMT 2012
|
0x21D19D21
|
0x46AD741A
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
ise_generator
|
ise_generator
|
|
|
./ram_16x512.gise
|
./ram_16x8k_dp.gise
|
ignore
|
ignore
|
gise
|
gise
|
Wed Aug 08 21:14:19 GMT 2012
|
Fri Nov 30 22:44:55 GMT 2012
|
0x96A35546
|
0x54560CD3
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
./ram_16x512.xise
|
./ram_16x8k_dp.xise
|
ignore
|
ignore
|
xise
|
xise
|
Wed Aug 08 21:14:19 GMT 2012
|
Fri Nov 30 22:44:55 GMT 2012
|
0x4125196C
|
0x30454A9B
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
deliver_readme_generator
|
deliver_readme_generator
|
|
|
|
|
flist_generator
|
flist_generator
|
|
|
./ram_16x512_flist.txt
|
./ram_16x8k_dp_flist.txt
|
ignore
|
ignore
|
txtFlist
|
txtFlist
|
txt
|
txt
|
Wed Aug 08 21:14:19 GMT 2012
|
Fri Nov 30 22:44:55 GMT 2012
|
0xDC157605
|
0x53BF6150
|
generationID_1879581046
|
generationID_4013899584
|
|
|
|
|
|
|
|
view_readme_generator
|
|
|
|
|
|
|
|
|
|
|
ram_16x2k
|
ram_16x4k_dp
|
|
|
|
|
ram_16x2k
|
ram_16x4k_dp
|
Native
|
Native
|
AXI4_Full
|
AXI4_Full
|
Memory_Slave
|
Memory_Slave
|
false
|
false
|
4
|
4
|
Single_Port_RAM
|
True_Dual_Port_RAM
|
false
|
false
|
No_ECC
|
No_ECC
|
false
|
false
|
false
|
false
|
false
|
false
|
Single_Bit_Error_Injection
|
Single_Bit_Error_Injection
|
true
|
true
|
8
|
8
|
Minimum_Area
|
Minimum_Area
|
8kx2
|
8kx2
|
false
|
true
|
16
|
16
|
2048
|
4096
|
16
|
16
|
WRITE_FIRST
|
WRITE_FIRST
|
Use_ENA_Pin
|
Use_ENA_Pin
|
16
|
16
|
16
|
16
|
WRITE_FIRST
|
WRITE_FIRST
|
Always_Enabled
|
Use_ENB_Pin
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
false
|
0
|
0
|
false
|
false
|
no_coe_file_loaded
|
no_coe_file_loaded
|
false
|
false
|
0
|
0
|
false
|
false
|
false
|
false
|
CE
|
CE
|
0
|
0
|
false
|
false
|
false
|
false
|
CE
|
CE
|
0
|
0
|
SYNC
|
SYNC
|
false
|
false
|
100
|
100
|
50
|
50
|
100
|
100
|
50
|
50
|
100
|
100
|
100
|
100
|
ALL
|
ALL
|
false
|
false
|
false
|
false
|
spartan6
|
|
spartan6
|
|
/home/pitchu/Projects/verilog/openMSP430/fpga/zxilinx_avnet_lx9microbard/rtl/verilog/coregen/tmp/_cg/
|
|
0
|
|
1
|
|
0
|
|
0
|
|
4
|
|
0
|
|
8
|
|
1
|
|
1
|
|
0
|
|
no_coe_file_loaded
|
|
0
|
|
0
|
|
SYNC
|
|
0
|
|
CE
|
|
0
|
|
0
|
|
1
|
|
0
|
|
1
|
|
2
|
|
WRITE_FIRST
|
|
16
|
|
16
|
|
2048
|
|
2048
|
|
11
|
|
0
|
|
CE
|
|
0
|
|
0
|
|
0
|
|
0
|
|
1
|
|
2
|
|
WRITE_FIRST
|
|
16
|
|
16
|
|
2048
|
|
2048
|
|
11
|
|
0
|
|
0
|
|
0
|
|
0
|
|
0
|
|
0
|
|
0
|
|
0
|
|
0
|
|
0
|
|
ALL
|
|
0
|
|
0
|
|
0
|
|
0
|
|
|
|
|
|
|
|
|
|
coregen
|
coregen
|
./
|
./
|
./tmp/
|
./tmp/
|
./tmp/_cg/
|
./tmp/_cg/
|
|
|
|
|
xc6slx9
|
xc6slx9
|
spartan6
|
spartan6
|
csg324
|
csg324
|
-2
|
-2
|
|
|
|
|
BusFormatAngleBracketNotRipped
|
BusFormatAngleBracketNotRipped
|
Verilog
|
Verilog
|
true
|
true
|
Foundation_ISE
|
Foundation_ISE
|
false
|
false
|
false
|
false
|
false
|
false
|
Ngc
|
Ngc
|
false
|
false
|
|
|
|
|
Behavioral
|
Behavioral
|
Verilog
|
Verilog
|
false
|
false
|
|
|
|
|
2012-06-25+21:54
|
2012-06-25+21:54
|
|
|
|
|
|
|
|
|
apply_current_project_options_generator
|
|
|
|
|
|
customization_generator
|
|
|
|
./summary.log
|
|
unknown
|
|
Wed Aug 08 21:16:23 GMT 2012
|
|
0xE0AD8EEC
|
|
generationID_3673615094
|
|
|
|
|
|
|
|
model_parameter_resolution_generator
|
|
|
|
./summary.log
|
|
unknown
|
|
Wed Aug 08 21:16:28 GMT 2012
|
|
0xE0AD8EEC
|
|
generationID_3673615094
|
|
|
|
|
|
|
|
ip_xco_generator
|
|
|
|
./ram_16x2k.xco
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xco
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Wed Aug 08 21:16:28 GMT 2012
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0x85968655
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generationID_3673615094
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associated_files_generator
|
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./ram_16x2k/blk_mem_gen_v7_2_readme.txt
|
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ignore
|
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txt
|
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Sat Jul 21 06:10:41 GMT 2012
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0x5661B352
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generationID_3673615094
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./ram_16x2k/doc/blk_mem_gen_v7_2_vinfo.html
|
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ignore
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unknown
|
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Sat Jul 21 06:10:41 GMT 2012
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0x4D7A616C
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generationID_3673615094
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./ram_16x2k/doc/pg058-blk-mem-gen.pdf
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ignore
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pdf
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Sat Jul 21 06:10:41 GMT 2012
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0xAE5E57E0
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generationID_3673615094
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ejava_generator
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./ram_16x2k/example_design/ram_16x2k_exdes.ucf
|
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ignore
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ucf
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Wed Aug 08 21:16:29 GMT 2012
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0xC44C6B6D
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generationID_3673615094
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./ram_16x2k/example_design/ram_16x2k_exdes.vhd
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ignore
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vhdl
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Wed Aug 08 21:16:29 GMT 2012
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0xB53EBA56
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generationID_3673615094
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./ram_16x2k/example_design/ram_16x2k_exdes.xdc
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ignore
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xdc
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Wed Aug 08 21:16:29 GMT 2012
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0x7684D6D4
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generationID_3673615094
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./ram_16x2k/example_design/ram_16x2k_prod.vhd
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ignore
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vhdl
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Wed Aug 08 21:16:29 GMT 2012
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0x6615EF5D
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generationID_3673615094
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./ram_16x2k/implement/implement.bat
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ignore
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unknown
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Wed Aug 08 21:16:29 GMT 2012
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0x05DDF4B6
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generationID_3673615094
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./ram_16x2k/implement/implement.sh
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ignore
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unknown
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Wed Aug 08 21:16:29 GMT 2012
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0xF097CEEE
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generationID_3673615094
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./ram_16x2k/implement/planAhead_ise.bat
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ignore
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unknown
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Wed Aug 08 21:16:29 GMT 2012
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0x63E08FB1
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generationID_3673615094
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./ram_16x2k/implement/planAhead_ise.sh
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ignore
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unknown
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Wed Aug 08 21:16:29 GMT 2012
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0x5FF10142
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generationID_3673615094
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./ram_16x2k/implement/planAhead_ise.tcl
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ignore
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tcl
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Wed Aug 08 21:16:29 GMT 2012
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0x9BC544F6
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generationID_3673615094
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./ram_16x2k/implement/xst.prj
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ignore
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unknown
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Wed Aug 08 21:16:29 GMT 2012
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0x7ECE39DF
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generationID_3673615094
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./ram_16x2k/implement/xst.scr
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ignore
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unknown
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Wed Aug 08 21:16:29 GMT 2012
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0x3885B366
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generationID_3673615094
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./ram_16x2k/simulation/addr_gen.vhd
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ignore
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vhdl
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Wed Aug 08 21:16:29 GMT 2012
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0x886696A8
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generationID_3673615094
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./ram_16x2k/simulation/bmg_stim_gen.vhd
|
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ignore
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vhdl
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Wed Aug 08 21:16:29 GMT 2012
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0x67B8D663
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generationID_3673615094
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./ram_16x2k/simulation/bmg_tb_pkg.vhd
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ignore
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vhdl
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Wed Aug 08 21:16:29 GMT 2012
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0xD4F2B061
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generationID_3673615094
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./ram_16x2k/simulation/checker.vhd
|
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ignore
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vhdl
|
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Wed Aug 08 21:16:29 GMT 2012
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0x2A8E7144
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generationID_3673615094
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./ram_16x2k/simulation/data_gen.vhd
|
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ignore
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vhdl
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Wed Aug 08 21:16:29 GMT 2012
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0xE0759FCA
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generationID_3673615094
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./ram_16x2k/simulation/functional/simcmds.tcl
|
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ignore
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tcl
|
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Wed Aug 08 21:16:28 GMT 2012
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0xE4C43C05
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generationID_3673615094
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./ram_16x2k/simulation/functional/simulate_isim.sh
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ignore
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unknown
|
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Wed Aug 08 21:16:29 GMT 2012
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0x5A7547B8
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generationID_3673615094
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./ram_16x2k/simulation/functional/simulate_mti.bat
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ignore
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unknown
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Wed Aug 08 21:16:29 GMT 2012
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0x86EA5D67
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generationID_3673615094
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./ram_16x2k/simulation/functional/simulate_mti.do
|
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ignore
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unknown
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Wed Aug 08 21:16:29 GMT 2012
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0x70FC1A5A
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generationID_3673615094
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./ram_16x2k/simulation/functional/simulate_mti.sh
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ignore
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unknown
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Wed Aug 08 21:16:29 GMT 2012
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0x86EA5D67
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generationID_3673615094
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./ram_16x2k/simulation/functional/simulate_ncsim.sh
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ignore
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unknown
|
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Wed Aug 08 21:16:28 GMT 2012
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0xDFFAAD0B
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generationID_3673615094
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./ram_16x2k/simulation/functional/simulate_vcs.sh
|
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ignore
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unknown
|
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Wed Aug 08 21:16:28 GMT 2012
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0x50F8DAD2
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generationID_3673615094
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./ram_16x2k/simulation/functional/ucli_commands.key
|
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ignore
|
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unknown
|
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Wed Aug 08 21:16:28 GMT 2012
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0x7C0FA43B
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generationID_3673615094
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./ram_16x2k/simulation/functional/vcs_session.tcl
|
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ignore
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tcl
|
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Wed Aug 08 21:16:28 GMT 2012
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0xD97735D5
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generationID_3673615094
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./ram_16x2k/simulation/functional/wave_mti.do
|
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ignore
|
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unknown
|
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Wed Aug 08 21:16:29 GMT 2012
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0xE56F4D38
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generationID_3673615094
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./ram_16x2k/simulation/functional/wave_ncsim.sv
|
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ignore
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unknown
|
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Wed Aug 08 21:16:28 GMT 2012
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0x10CE0A9D
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generationID_3673615094
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./ram_16x2k/simulation/ram_16x2k_synth.vhd
|
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ignore
|
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vhdl
|
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Wed Aug 08 21:16:29 GMT 2012
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0xDD3B8E51
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generationID_3673615094
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./ram_16x2k/simulation/ram_16x2k_tb.vhd
|
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ignore
|
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vhdl
|
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Wed Aug 08 21:16:29 GMT 2012
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0x183DC989
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generationID_3673615094
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./ram_16x2k/simulation/random.vhd
|
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ignore
|
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vhdl
|
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Wed Aug 08 21:16:29 GMT 2012
|
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0xE1CDC376
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generationID_3673615094
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./ram_16x2k/simulation/timing/simcmds.tcl
|
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ignore
|
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tcl
|
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Wed Aug 08 21:16:28 GMT 2012
|
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0xE4C43C05
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generationID_3673615094
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./ram_16x2k/simulation/timing/simulate_isim.sh
|
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ignore
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unknown
|
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Wed Aug 08 21:16:29 GMT 2012
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0x76E29DB6
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generationID_3673615094
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./ram_16x2k/simulation/timing/simulate_mti.bat
|
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ignore
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unknown
|
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Wed Aug 08 21:16:29 GMT 2012
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0x86EA5D67
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generationID_3673615094
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./ram_16x2k/simulation/timing/simulate_mti.do
|
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ignore
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unknown
|
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Wed Aug 08 21:16:29 GMT 2012
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0xC49C06E1
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generationID_3673615094
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./ram_16x2k/simulation/timing/simulate_mti.sh
|
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ignore
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unknown
|
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Wed Aug 08 21:16:29 GMT 2012
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0x86EA5D67
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generationID_3673615094
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./ram_16x2k/simulation/timing/simulate_ncsim.sh
|
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ignore
|
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unknown
|
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Wed Aug 08 21:16:28 GMT 2012
|
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0x71C0CF92
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generationID_3673615094
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./ram_16x2k/simulation/timing/simulate_vcs.sh
|
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ignore
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unknown
|
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Wed Aug 08 21:16:28 GMT 2012
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0xCC88418C
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generationID_3673615094
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./ram_16x2k/simulation/timing/ucli_commands.key
|
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ignore
|
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unknown
|
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Wed Aug 08 21:16:28 GMT 2012
|
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0x7C0FA43B
|
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generationID_3673615094
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./ram_16x2k/simulation/timing/vcs_session.tcl
|
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ignore
|
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tcl
|
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Wed Aug 08 21:16:28 GMT 2012
|
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0x3336849C
|
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generationID_3673615094
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./ram_16x2k/simulation/timing/wave_mti.do
|
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ignore
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unknown
|
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Wed Aug 08 21:16:29 GMT 2012
|
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0x71C1D729
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generationID_3673615094
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./ram_16x2k/simulation/timing/wave_ncsim.sv
|
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ignore
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unknown
|
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Wed Aug 08 21:16:28 GMT 2012
|
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0xCBFE8064
|
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generationID_3673615094
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ngc_netlist_generator
|
|
|
|
./ram_16x2k.ngc
|
|
ngc
|
|
Wed Aug 08 21:17:18 GMT 2012
|
|
0xF5BAA26C
|
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generationID_3673615094
|
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obfuscate_netlist_generator
|
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padded_implementation_netlist_generator
|
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instantiation_template_generator
|
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./ram_16x2k.veo
|
|
veo
|
|
Wed Aug 08 21:17:18 GMT 2012
|
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0x70458C57
|
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generationID_3673615094
|
|
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synthesis_instantiation_wrapper_generator
|
|
|
|
./ram_16x2k_synth.v
|
|
verilog
|
|
verilogSynthesis
|
|
Wed Aug 08 21:17:18 GMT 2012
|
|
0x4B1216CF
|
|
generationID_3673615094
|
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structural_simulation_model_generator
|
|
|
|
./ram_16x2k.v
|
|
verilog
|
|
Wed Aug 08 21:17:19 GMT 2012
|
|
0xD73BAB65
|
|
generationID_3673615094
|
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all_documents_generator
|
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asy_generator
|
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|
|
./ram_16x2k.asy
|
|
asy
|
|
Wed Aug 08 21:17:22 GMT 2012
|
|
0xC9DF501E
|
|
generationID_3673615094
|
|
|
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|
|
./summary.log
|
|
unknown
|
|
Wed Aug 08 21:17:22 GMT 2012
|
|
0xE0AD8EEC
|
|
generationID_3673615094
|
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|
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xmdf_generator
|
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|
|
./ram_16x2k_xmdf.tcl
|
|
tclXmdf
|
|
tcl
|
|
Wed Aug 08 21:17:22 GMT 2012
|
|
0xF26FB160
|
|
generationID_3673615094
|
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synthesis_ise_generator
|
|
|
|
./ram_16x2k.gise
|
|
ignore
|
|
gise
|
|
Wed Aug 08 21:17:26 GMT 2012
|
|
0x78F752A5
|
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generationID_3673615094
|
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|
|
./ram_16x2k.xise
|
|
ignore
|
|
xise
|
|
Wed Aug 08 21:17:26 GMT 2012
|
|
0x3D87F839
|
|
generationID_3673615094
|
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|
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|
ise_generator
|
|
|
|
./ram_16x2k.gise
|
|
ignore
|
|
gise
|
|
Wed Aug 08 21:17:31 GMT 2012
|
|
0xE80C198E
|
|
generationID_3673615094
|
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|
|
|
|
./ram_16x2k.xise
|
|
ignore
|
|
xise
|
|
Wed Aug 08 21:17:31 GMT 2012
|
|
0xEA1827DB
|
|
generationID_3673615094
|
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|
|
|
|
|
|
deliver_readme_generator
|
|
|
|
|
|
flist_generator
|
|
|
|
./ram_16x2k_flist.txt
|
|
ignore
|
|
txtFlist
|
|
txt
|
|
Wed Aug 08 21:17:31 GMT 2012
|
|
0xA3FB9FC8
|
|
generationID_3673615094
|
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view_readme_generator
|
|
|
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|
|
|
|
coregen
|
coregen
|
./
|
./
|
./tmp/
|
./tmp/
|
./tmp/_cg/
|
./tmp/_cg/
|
|
|
|
|
xc6slx9
|
xc6slx9
|
spartan6
|
spartan6
|
csg324
|
csg324
|
-2
|
-2
|
|
|
|
|
BusFormatAngleBracketNotRipped
|
BusFormatAngleBracketNotRipped
|
Verilog
|
Verilog
|
true
|
true
|
Foundation_ISE
|
Foundation_ISE
|
false
|
false
|
false
|
false
|
false
|
false
|
Ngc
|
Ngc
|
false
|
false
|
|
|
|
|
Behavioral
|
Behavioral
|
Verilog
|
Verilog
|
false
|
false
|
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