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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [sim/] [rtl_sim/] [src/] [leds.v] - Diff between revs 157 and 162

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Rev 157 Rev 162 
/*===========================================================================*/
 
/*===========================================================================*/
 
/*                                 DIGITAL I/O                               */
 
/*                                 DIGITAL I/O                               */
 
/*---------------------------------------------------------------------------*/
 
/*---------------------------------------------------------------------------*/
 
/* Test the Digital I/O interface.                                           */
 
/* Test the Digital I/O interface.                                           */
 
/*===========================================================================*/
 
/*===========================================================================*/
 
 
 
 
 
initial
 
initial
 
   begin
 
   begin
 
      $display(" ===============================================");
 
      $display(" ===============================================");
 
      $display("|                 START SIMULATION              |");
 
      $display("|                 START SIMULATION              |");
 
      $display(" ===============================================");
 
      $display(" ===============================================");
 
      repeat(5) @(posedge CLK_40MHz);
 
      repeat(5) @(posedge CLK_40MHz);
 
      stimulus_done = 0;
 
      stimulus_done = 0;
 
 
 
 
 
      repeat(100) @(posedge CLK_40MHz);
 
      repeat(100) @(posedge CLK_40MHz);
 
      PMOD1_P8 = 1;
 
 //     PMOD1_P8 = 1;
 
      repeat(500) @(posedge CLK_40MHz);
 
      repeat(500) @(posedge CLK_40MHz);
 
      PMOD1_P8 = 0;
 
 //     PMOD1_P8 = 0;
 
      repeat(100) @(posedge CLK_40MHz);
 
      repeat(100) @(posedge CLK_40MHz);
 
      PMOD1_P8 = 1;
 
 //     PMOD1_P8 = 1;
 
 
 
 
 
 
 
 
 
      repeat(500) @(posedge CLK_40MHz);
 
      repeat(500) @(posedge CLK_40MHz);
 
      PMOD1_P4 = 0;
 
      PMOD1_P4 = 0;
 
      repeat(100) @(posedge CLK_40MHz);
 
      repeat(100) @(posedge CLK_40MHz);
 
      PMOD1_P4 = 1;
 
      PMOD1_P4 = 1;
 
 
 
 
 
      repeat(500) @(posedge CLK_40MHz);
 
      repeat(500) @(posedge CLK_40MHz);
 
 
 
 
 
 
 
 
 
 
 
 
 
      stimulus_done = 1;
 
      stimulus_done = 1;
 
   end
 
   end
 
 
 
 
 
 
 
 

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