//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
// Copyright (C) 2001 Authors
|
// Copyright (C) 2001 Authors
|
//
|
//
|
// This source file may be used and distributed without restriction provided
|
// This source file may be used and distributed without restriction provided
|
// that this copyright statement is not removed from the file and that any
|
// that this copyright statement is not removed from the file and that any
|
// derivative work contains the original copyright notice and the associated
|
// derivative work contains the original copyright notice and the associated
|
// disclaimer.
|
// disclaimer.
|
//
|
//
|
// This source file is free software; you can redistribute it and/or modify
|
// This source file is free software; you can redistribute it and/or modify
|
// it under the terms of the GNU Lesser General Public License as published
|
// it under the terms of the GNU Lesser General Public License as published
|
// by the Free Software Foundation; either version 2.1 of the License, or
|
// by the Free Software Foundation; either version 2.1 of the License, or
|
// (at your option) any later version.
|
// (at your option) any later version.
|
//
|
//
|
// This source is distributed in the hope that it will be useful, but WITHOUT
|
// This source is distributed in the hope that it will be useful, but WITHOUT
|
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
|
// License for more details.
|
// License for more details.
|
//
|
//
|
// You should have received a copy of the GNU Lesser General Public License
|
// You should have received a copy of the GNU Lesser General Public License
|
// along with this source; if not, write to the Free Software Foundation,
|
// along with this source; if not, write to the Free Software Foundation,
|
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
//
|
//
|
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
//
|
//
|
// *File Name: openMSP430_undefines.v
|
// *File Name: openMSP430_undefines.v
|
//
|
//
|
// *Module Description:
|
// *Module Description:
|
// openMSP430 Verilog `undef file
|
// openMSP430 Verilog `undef file
|
//
|
//
|
// *Author(s):
|
// *Author(s):
|
// - Olivier Girard, olgirard@gmail.com
|
// - Olivier Girard, olgirard@gmail.com
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//
|
//
|
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
// $Rev: 23 $
|
// $Rev: 23 $
|
// $LastChangedBy: olivier.girard $
|
// $LastChangedBy: olivier.girard $
|
// $LastChangedDate: 2009-08-30 18:39:26 +0200 (Sun, 30 Aug 2009) $
|
// $LastChangedDate: 2009-08-30 18:39:26 +0200 (Sun, 30 Aug 2009) $
|
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
|
|
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
// SYSTEM CONFIGURATION
|
// SYSTEM CONFIGURATION
|
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
|
|
// Program Memory Size:
|
// Program Memory Size:
|
`ifdef PMEM_AWIDTH
|
`ifdef PMEM_AWIDTH
|
`undef PMEM_AWIDTH
|
`undef PMEM_AWIDTH
|
`endif
|
`endif
|
|
|
// Data Memory Size:
|
// Data Memory Size:
|
`ifdef DMEM_AWIDTH
|
`ifdef DMEM_AWIDTH
|
`undef DMEM_AWIDTH
|
`undef DMEM_AWIDTH
|
`endif
|
`endif
|
|
|
// Include/Exclude Hardware Multiplier
|
// Include/Exclude Hardware Multiplier
|
`ifdef MULTIPLIER
|
`ifdef MULTIPLIER
|
`undef MULTIPLIER
|
`undef MULTIPLIER
|
`endif
|
`endif
|
|
|
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
// REMOTE DEBUGGING INTERFACE CONFIGURATION
|
// REMOTE DEBUGGING INTERFACE CONFIGURATION
|
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
|
|
// Include Debug interface
|
// Include Debug interface
|
`ifdef DBG_EN
|
`ifdef DBG_EN
|
`undef DBG_EN
|
`undef DBG_EN
|
`endif
|
`endif
|
|
|
// Debug interface selection
|
// Debug interface selection
|
`ifdef DBG_UART
|
`ifdef DBG_UART
|
`undef DBG_UART
|
`undef DBG_UART
|
`endif
|
`endif
|
`ifdef DBG_JTAG
|
`ifdef DBG_JTAG
|
`undef DBG_JTAG
|
`undef DBG_JTAG
|
`endif
|
`endif
|
|
|
// Number of hardware breakpoints
|
// Number of hardware breakpoints
|
`ifdef DBG_HWBRK_0
|
`ifdef DBG_HWBRK_0
|
`undef DBG_HWBRK_0
|
`undef DBG_HWBRK_0
|
`endif
|
`endif
|
`ifdef DBG_HWBRK_1
|
`ifdef DBG_HWBRK_1
|
`undef DBG_HWBRK_1
|
`undef DBG_HWBRK_1
|
`endif
|
`endif
|
`ifdef DBG_HWBRK_2
|
`ifdef DBG_HWBRK_2
|
`undef DBG_HWBRK_2
|
`undef DBG_HWBRK_2
|
`endif
|
`endif
|
`ifdef DBG_HWBRK_3
|
`ifdef DBG_HWBRK_3
|
`undef DBG_HWBRK_3
|
`undef DBG_HWBRK_3
|
`endif
|
`endif
|
|
|
|
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//===== SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!! =====//
|
//===== SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!! =====//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
//==========================================================================//
|
|
|
// Program and Data Memory sizes
|
// Program and Data Memory sizes
|
`ifdef PMEM_SIZE_59_KB
|
`ifdef PMEM_SIZE_59_KB
|
`undef PMEM_SIZE_59_KB
|
`undef PMEM_SIZE_59_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_55_KB
|
`ifdef PMEM_SIZE_55_KB
|
`undef PMEM_SIZE_55_KB
|
`undef PMEM_SIZE_55_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_54_KB
|
`ifdef PMEM_SIZE_54_KB
|
`undef PMEM_SIZE_54_KB
|
`undef PMEM_SIZE_54_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_51_KB
|
`ifdef PMEM_SIZE_51_KB
|
`undef PMEM_SIZE_51_KB
|
`undef PMEM_SIZE_51_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_48_KB
|
`ifdef PMEM_SIZE_48_KB
|
`undef PMEM_SIZE_48_KB
|
`undef PMEM_SIZE_48_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_41_KB
|
`ifdef PMEM_SIZE_41_KB
|
`undef PMEM_SIZE_41_KB
|
`undef PMEM_SIZE_41_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_32_KB
|
`ifdef PMEM_SIZE_32_KB
|
`undef PMEM_SIZE_32_KB
|
`undef PMEM_SIZE_32_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_24_KB
|
`ifdef PMEM_SIZE_24_KB
|
`undef PMEM_SIZE_24_KB
|
`undef PMEM_SIZE_24_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_16_KB
|
`ifdef PMEM_SIZE_16_KB
|
`undef PMEM_SIZE_16_KB
|
`undef PMEM_SIZE_16_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_12_KB
|
`ifdef PMEM_SIZE_12_KB
|
`undef PMEM_SIZE_12_KB
|
`undef PMEM_SIZE_12_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_8_KB
|
`ifdef PMEM_SIZE_8_KB
|
`undef PMEM_SIZE_8_KB
|
`undef PMEM_SIZE_8_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_4_KB
|
`ifdef PMEM_SIZE_4_KB
|
`undef PMEM_SIZE_4_KB
|
`undef PMEM_SIZE_4_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_2_KB
|
`ifdef PMEM_SIZE_2_KB
|
`undef PMEM_SIZE_2_KB
|
`undef PMEM_SIZE_2_KB
|
`endif
|
`endif
|
`ifdef PMEM_SIZE_1_KB
|
`ifdef PMEM_SIZE_1_KB
|
`undef PMEM_SIZE_1_KB
|
`undef PMEM_SIZE_1_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_32_KB
|
`ifdef DMEM_SIZE_32_KB
|
`undef DMEM_SIZE_32_KB
|
`undef DMEM_SIZE_32_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_24_KB
|
`ifdef DMEM_SIZE_24_KB
|
`undef DMEM_SIZE_24_KB
|
`undef DMEM_SIZE_24_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_16_KB
|
`ifdef DMEM_SIZE_16_KB
|
`undef DMEM_SIZE_16_KB
|
`undef DMEM_SIZE_16_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_10_KB
|
`ifdef DMEM_SIZE_10_KB
|
`undef DMEM_SIZE_10_KB
|
`undef DMEM_SIZE_10_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_8_KB
|
`ifdef DMEM_SIZE_8_KB
|
`undef DMEM_SIZE_8_KB
|
`undef DMEM_SIZE_8_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_5_KB
|
`ifdef DMEM_SIZE_5_KB
|
`undef DMEM_SIZE_5_KB
|
`undef DMEM_SIZE_5_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_4_KB
|
`ifdef DMEM_SIZE_4_KB
|
`undef DMEM_SIZE_4_KB
|
`undef DMEM_SIZE_4_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_2p5_KB
|
`ifdef DMEM_SIZE_2p5_KB
|
`undef DMEM_SIZE_2p5_KB
|
`undef DMEM_SIZE_2p5_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_2_KB
|
`ifdef DMEM_SIZE_2_KB
|
`undef DMEM_SIZE_2_KB
|
`undef DMEM_SIZE_2_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_1_KB
|
`ifdef DMEM_SIZE_1_KB
|
`undef DMEM_SIZE_1_KB
|
`undef DMEM_SIZE_1_KB
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_512_B
|
`ifdef DMEM_SIZE_512_B
|
`undef DMEM_SIZE_512_B
|
`undef DMEM_SIZE_512_B
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_256_B
|
`ifdef DMEM_SIZE_256_B
|
`undef DMEM_SIZE_256_B
|
`undef DMEM_SIZE_256_B
|
`endif
|
`endif
|
`ifdef DMEM_SIZE_128_B
|
`ifdef DMEM_SIZE_128_B
|
`undef DMEM_SIZE_128_B
|
`undef DMEM_SIZE_128_B
|
`endif
|
`endif
|
`ifdef PMEM_SIZE
|
`ifdef PMEM_SIZE
|
`undef PMEM_SIZE
|
`undef PMEM_SIZE
|
`endif
|
`endif
|
`ifdef PMEM_AWIDTH
|
`ifdef PMEM_AWIDTH
|
`undef PMEM_AWIDTH
|
`undef PMEM_AWIDTH
|
`endif
|
`endif
|
`ifdef DMEM_SIZE
|
`ifdef DMEM_SIZE
|
`undef DMEM_SIZE
|
`undef DMEM_SIZE
|
`endif
|
`endif
|
`ifdef DMEM_AWIDTH
|
`ifdef DMEM_AWIDTH
|
`undef DMEM_AWIDTH
|
`undef DMEM_AWIDTH
|
`endif
|
`endif
|
|
|
// Data Memory Base Adresses
|
// Data Memory Base Adresses
|
`ifdef DMEM_BASE
|
`ifdef DMEM_BASE
|
`undef DMEM_BASE
|
`undef DMEM_BASE
|
`endif
|
`endif
|
|
|
// Program & Data Memory most significant address bit (for 16 bit words)
|
// Program & Data Memory most significant address bit (for 16 bit words)
|
`ifdef PMEM_MSB
|
`ifdef PMEM_MSB
|
`undef PMEM_MSB
|
`undef PMEM_MSB
|
`endif
|
`endif
|
`ifdef DMEM_MSB
|
`ifdef DMEM_MSB
|
`undef DMEM_MSB
|
`undef DMEM_MSB
|
`endif
|
`endif
|
|
|
|
|
// Instructions type
|
// Instructions type
|
`ifdef INST_SO
|
`ifdef INST_SO
|
`undef INST_SO
|
`undef INST_SO
|
`endif
|
`endif
|
`ifdef INST_JMP
|
`ifdef INST_JMP
|
`undef INST_JMP
|
`undef INST_JMP
|
`endif
|
`endif
|
`ifdef INST_TO
|
`ifdef INST_TO
|
`undef INST_TO
|
`undef INST_TO
|
`endif
|
`endif
|
|
|
// Single-operand arithmetic
|
// Single-operand arithmetic
|
`ifdef RRC
|
`ifdef RRC
|
`undef RRC
|
`undef RRC
|
`endif
|
`endif
|
`ifdef SWPB
|
`ifdef SWPB
|
`undef SWPB
|
`undef SWPB
|
`endif
|
`endif
|
`ifdef RRA
|
`ifdef RRA
|
`undef RRA
|
`undef RRA
|
`endif
|
`endif
|
`ifdef SXT
|
`ifdef SXT
|
`undef SXT
|
`undef SXT
|
`endif
|
`endif
|
`ifdef PUSH
|
`ifdef PUSH
|
`undef PUSH
|
`undef PUSH
|
`endif
|
`endif
|
`ifdef CALL
|
`ifdef CALL
|
`undef CALL
|
`undef CALL
|
`endif
|
`endif
|
`ifdef RETI
|
`ifdef RETI
|
`undef RETI
|
`undef RETI
|
`endif
|
`endif
|
`ifdef IRQ
|
`ifdef IRQ
|
`undef IRQ
|
`undef IRQ
|
`endif
|
`endif
|
|
|
// Conditional jump
|
// Conditional jump
|
`ifdef JNE
|
`ifdef JNE
|
`undef JNE
|
`undef JNE
|
`endif
|
`endif
|
`ifdef JEQ
|
`ifdef JEQ
|
`undef JEQ
|
`undef JEQ
|
`endif
|
`endif
|
`ifdef JNC
|
`ifdef JNC
|
`undef JNC
|
`undef JNC
|
`endif
|
`endif
|
`ifdef JC
|
`ifdef JC
|
`undef JC
|
`undef JC
|
`endif
|
`endif
|
`ifdef JN
|
`ifdef JN
|
`undef JN
|
`undef JN
|
`endif
|
`endif
|
`ifdef JGE
|
`ifdef JGE
|
`undef JGE
|
`undef JGE
|
`endif
|
`endif
|
`ifdef JL
|
`ifdef JL
|
`undef JL
|
`undef JL
|
`endif
|
`endif
|
`ifdef JMP
|
`ifdef JMP
|
`undef JMP
|
`undef JMP
|
`endif
|
`endif
|
|
|
// Two-operand arithmetic
|
// Two-operand arithmetic
|
`ifdef MOV
|
`ifdef MOV
|
`undef MOV
|
`undef MOV
|
`endif
|
`endif
|
`ifdef ADD
|
`ifdef ADD
|
`undef ADD
|
`undef ADD
|
`endif
|
`endif
|
`ifdef ADDC
|
`ifdef ADDC
|
`undef ADDC
|
`undef ADDC
|
`endif
|
`endif
|
`ifdef SUBC
|
`ifdef SUBC
|
`undef SUBC
|
`undef SUBC
|
`endif
|
`endif
|
`ifdef SUB
|
`ifdef SUB
|
`undef SUB
|
`undef SUB
|
`endif
|
`endif
|
`ifdef CMP
|
`ifdef CMP
|
`undef CMP
|
`undef CMP
|
`endif
|
`endif
|
`ifdef DADD
|
`ifdef DADD
|
`undef DADD
|
`undef DADD
|
`endif
|
`endif
|
`ifdef BIT
|
`ifdef BIT
|
`undef BIT
|
`undef BIT
|
`endif
|
`endif
|
`ifdef BIC
|
`ifdef BIC
|
`undef BIC
|
`undef BIC
|
`endif
|
`endif
|
`ifdef BIS
|
`ifdef BIS
|
`undef BIS
|
`undef BIS
|
`endif
|
`endif
|
`ifdef XOR
|
`ifdef XOR
|
`undef XOR
|
`undef XOR
|
`endif
|
`endif
|
`ifdef AND
|
`ifdef AND
|
`undef AND
|
`undef AND
|
`endif
|
`endif
|
|
|
// Addressing modes
|
// Addressing modes
|
`ifdef DIR
|
`ifdef DIR
|
`undef DIR
|
`undef DIR
|
`endif
|
`endif
|
`ifdef IDX
|
`ifdef IDX
|
`undef IDX
|
`undef IDX
|
`endif
|
`endif
|
`ifdef INDIR
|
`ifdef INDIR
|
`undef INDIR
|
`undef INDIR
|
`endif
|
`endif
|
`ifdef INDIR_I
|
`ifdef INDIR_I
|
`undef INDIR_I
|
`undef INDIR_I
|
`endif
|
`endif
|
`ifdef SYMB
|
`ifdef SYMB
|
`undef SYMB
|
`undef SYMB
|
`endif
|
`endif
|
`ifdef IMM
|
`ifdef IMM
|
`undef IMM
|
`undef IMM
|
`endif
|
`endif
|
`ifdef ABS
|
`ifdef ABS
|
`undef ABS
|
`undef ABS
|
`endif
|
`endif
|
`ifdef CONST
|
`ifdef CONST
|
`undef CONST
|
`undef CONST
|
`endif
|
`endif
|
|
|
// Execution state machine
|
// Execution state machine
|
`ifdef E_IRQ_0
|
`ifdef E_IRQ_0
|
`undef E_IRQ_0
|
`undef E_IRQ_0
|
`endif
|
`endif
|
`ifdef E_IRQ_1
|
`ifdef E_IRQ_1
|
`undef E_IRQ_1
|
`undef E_IRQ_1
|
`endif
|
`endif
|
`ifdef E_IRQ_2
|
`ifdef E_IRQ_2
|
`undef E_IRQ_2
|
`undef E_IRQ_2
|
`endif
|
`endif
|
`ifdef E_IRQ_3
|
`ifdef E_IRQ_3
|
`undef E_IRQ_3
|
`undef E_IRQ_3
|
`endif
|
`endif
|
`ifdef E_IRQ_4
|
`ifdef E_IRQ_4
|
`undef E_IRQ_4
|
`undef E_IRQ_4
|
`endif
|
`endif
|
`ifdef E_SRC_AD
|
`ifdef E_SRC_AD
|
`undef E_SRC_AD
|
`undef E_SRC_AD
|
`endif
|
`endif
|
`ifdef E_SRC_RD
|
`ifdef E_SRC_RD
|
`undef E_SRC_RD
|
`undef E_SRC_RD
|
`endif
|
`endif
|
`ifdef E_SRC_WR
|
`ifdef E_SRC_WR
|
`undef E_SRC_WR
|
`undef E_SRC_WR
|
`endif
|
`endif
|
`ifdef E_DST_AD
|
`ifdef E_DST_AD
|
`undef E_DST_AD
|
`undef E_DST_AD
|
`endif
|
`endif
|
`ifdef E_DST_RD
|
`ifdef E_DST_RD
|
`undef E_DST_RD
|
`undef E_DST_RD
|
`endif
|
`endif
|
`ifdef E_DST_WR
|
`ifdef E_DST_WR
|
`undef E_DST_WR
|
`undef E_DST_WR
|
`endif
|
`endif
|
`ifdef E_EXEC
|
`ifdef E_EXEC
|
`undef E_EXEC
|
`undef E_EXEC
|
`endif
|
`endif
|
`ifdef E_JUMP
|
`ifdef E_JUMP
|
`undef E_JUMP
|
`undef E_JUMP
|
`endif
|
`endif
|
`ifdef E_IDLE
|
`ifdef E_IDLE
|
`undef E_IDLE
|
`undef E_IDLE
|
`endif
|
`endif
|
|
|
// ALU control signals
|
// ALU control signals
|
`ifdef ALU_SRC_INV
|
`ifdef ALU_SRC_INV
|
`undef ALU_SRC_INV
|
`undef ALU_SRC_INV
|
`endif
|
`endif
|
`ifdef ALU_INC
|
`ifdef ALU_INC
|
`undef ALU_INC
|
`undef ALU_INC
|
`endif
|
`endif
|
`ifdef ALU_INC_C
|
`ifdef ALU_INC_C
|
`undef ALU_INC_C
|
`undef ALU_INC_C
|
`endif
|
`endif
|
`ifdef ALU_ADD
|
`ifdef ALU_ADD
|
`undef ALU_ADD
|
`undef ALU_ADD
|
`endif
|
`endif
|
`ifdef ALU_AND
|
`ifdef ALU_AND
|
`undef ALU_AND
|
`undef ALU_AND
|
`endif
|
`endif
|
`ifdef ALU_OR
|
`ifdef ALU_OR
|
`undef ALU_OR
|
`undef ALU_OR
|
`endif
|
`endif
|
`ifdef ALU_XOR
|
`ifdef ALU_XOR
|
`undef ALU_XOR
|
`undef ALU_XOR
|
`endif
|
`endif
|
`ifdef ALU_DADD
|
`ifdef ALU_DADD
|
`undef ALU_DADD
|
`undef ALU_DADD
|
`endif
|
`endif
|
`ifdef ALU_STAT_7
|
`ifdef ALU_STAT_7
|
`undef ALU_STAT_7
|
`undef ALU_STAT_7
|
`endif
|
`endif
|
`ifdef ALU_STAT_F
|
`ifdef ALU_STAT_F
|
`undef ALU_STAT_F
|
`undef ALU_STAT_F
|
`endif
|
`endif
|
`ifdef ALU_SHIFT
|
`ifdef ALU_SHIFT
|
`undef ALU_SHIFT
|
`undef ALU_SHIFT
|
`endif
|
`endif
|
`ifdef EXEC_NO_WR
|
`ifdef EXEC_NO_WR
|
`undef EXEC_NO_WR
|
`undef EXEC_NO_WR
|
`endif
|
`endif
|
|
|
// Debug interface
|
// Debug interface
|
`ifdef DBG_UART_WR
|
`ifdef DBG_UART_WR
|
`undef DBG_UART_WR
|
`undef DBG_UART_WR
|
`endif
|
`endif
|
`ifdef DBG_UART_BW
|
`ifdef DBG_UART_BW
|
`undef DBG_UART_BW
|
`undef DBG_UART_BW
|
`endif
|
`endif
|
`ifdef DBG_UART_ADDR
|
`ifdef DBG_UART_ADDR
|
`undef DBG_UART_ADDR
|
`undef DBG_UART_ADDR
|
`endif
|
`endif
|
|
|
// Debug interface CPU_CTL register
|
// Debug interface CPU_CTL register
|
`ifdef HALT
|
`ifdef HALT
|
`undef HALT
|
`undef HALT
|
`endif
|
`endif
|
`ifdef RUN
|
`ifdef RUN
|
`undef RUN
|
`undef RUN
|
`endif
|
`endif
|
`ifdef ISTEP
|
`ifdef ISTEP
|
`undef ISTEP
|
`undef ISTEP
|
`endif
|
`endif
|
`ifdef SW_BRK_EN
|
`ifdef SW_BRK_EN
|
`undef SW_BRK_EN
|
`undef SW_BRK_EN
|
`endif
|
`endif
|
`ifdef FRZ_BRK_EN
|
`ifdef FRZ_BRK_EN
|
`undef FRZ_BRK_EN
|
`undef FRZ_BRK_EN
|
`endif
|
`endif
|
`ifdef RST_BRK_EN
|
`ifdef RST_BRK_EN
|
`undef RST_BRK_EN
|
`undef RST_BRK_EN
|
`endif
|
`endif
|
`ifdef CPU_RST
|
`ifdef CPU_RST
|
`undef CPU_RST
|
`undef CPU_RST
|
`endif
|
`endif
|
|
|
// Debug interface CPU_STAT register
|
// Debug interface CPU_STAT register
|
`ifdef HALT_RUN
|
`ifdef HALT_RUN
|
`undef HALT_RUN
|
`undef HALT_RUN
|
`endif
|
`endif
|
`ifdef PUC_PND
|
`ifdef PUC_PND
|
`undef PUC_PND
|
`undef PUC_PND
|
`endif
|
`endif
|
`ifdef SWBRK_PND
|
`ifdef SWBRK_PND
|
`undef SWBRK_PND
|
`undef SWBRK_PND
|
`endif
|
`endif
|
`ifdef HWBRK0_PND
|
`ifdef HWBRK0_PND
|
`undef HWBRK0_PND
|
`undef HWBRK0_PND
|
`endif
|
`endif
|
`ifdef HWBRK1_PND
|
`ifdef HWBRK1_PND
|
`undef HWBRK1_PND
|
`undef HWBRK1_PND
|
`endif
|
`endif
|
|
|
// Debug interface BRKx_CTL register
|
// Debug interface BRKx_CTL register
|
`ifdef BRK_MODE_RD
|
`ifdef BRK_MODE_RD
|
`undef BRK_MODE_RD
|
`undef BRK_MODE_RD
|
`endif
|
`endif
|
`ifdef BRK_MODE_WR
|
`ifdef BRK_MODE_WR
|
`undef BRK_MODE_WR
|
`undef BRK_MODE_WR
|
`endif
|
`endif
|
`ifdef BRK_MODE
|
`ifdef BRK_MODE
|
`undef BRK_MODE
|
`undef BRK_MODE
|
`endif
|
`endif
|
`ifdef BRK_EN
|
`ifdef BRK_EN
|
`undef BRK_EN
|
`undef BRK_EN
|
`endif
|
`endif
|
`ifdef BRK_I_EN
|
`ifdef BRK_I_EN
|
`undef BRK_I_EN
|
`undef BRK_I_EN
|
`endif
|
`endif
|
`ifdef BRK_RANGE
|
`ifdef BRK_RANGE
|
`undef BRK_RANGE
|
`undef BRK_RANGE
|
`endif
|
`endif
|
|
|
// Basic clock module: BCSCTL1 Control Register
|
// Basic clock module: BCSCTL1 Control Register
|
`ifdef DIVAx
|
`ifdef DIVAx
|
`undef DIVAx
|
`undef DIVAx
|
`endif
|
`endif
|
|
|
// Basic clock module: BCSCTL2 Control Register
|
// Basic clock module: BCSCTL2 Control Register
|
`ifdef SELS
|
`ifdef SELS
|
`undef SELS
|
`undef SELS
|
`endif
|
`endif
|
`ifdef DIVSx
|
`ifdef DIVSx
|
`undef DIVSx
|
`undef DIVSx
|
`endif
|
`endif
|
|
|
// Timer A: TACTL Control Register
|
// Timer A: TACTL Control Register
|
`ifdef TASSELx
|
`ifdef TASSELx
|
`undef TASSELx
|
`undef TASSELx
|
`endif
|
`endif
|
`ifdef TAIDx
|
`ifdef TAIDx
|
`undef TAIDx
|
`undef TAIDx
|
`endif
|
`endif
|
`ifdef TAMCx
|
`ifdef TAMCx
|
`undef TAMCx
|
`undef TAMCx
|
`endif
|
`endif
|
`ifdef TACLR
|
`ifdef TACLR
|
`undef TACLR
|
`undef TACLR
|
`endif
|
`endif
|
`ifdef TAIE
|
`ifdef TAIE
|
`undef TAIE
|
`undef TAIE
|
`endif
|
`endif
|
`ifdef TAIFG
|
`ifdef TAIFG
|
`undef TAIFG
|
`undef TAIFG
|
`endif
|
`endif
|
|
|
// Timer A: TACCTLx Capture/Compare Control Register
|
// Timer A: TACCTLx Capture/Compare Control Register
|
`ifdef TACMx
|
`ifdef TACMx
|
`undef TACMx
|
`undef TACMx
|
`endif
|
`endif
|
`ifdef TACCISx
|
`ifdef TACCISx
|
`undef TACCISx
|
`undef TACCISx
|
`endif
|
`endif
|
`ifdef TASCS
|
`ifdef TASCS
|
`undef TASCS
|
`undef TASCS
|
`endif
|
`endif
|
`ifdef TASCCI
|
`ifdef TASCCI
|
`undef TASCCI
|
`undef TASCCI
|
`endif
|
`endif
|
`ifdef TACAP
|
`ifdef TACAP
|
`undef TACAP
|
`undef TACAP
|
`endif
|
`endif
|
`ifdef TAOUTMODx
|
`ifdef TAOUTMODx
|
`undef TAOUTMODx
|
`undef TAOUTMODx
|
`endif
|
`endif
|
`ifdef TACCIE
|
`ifdef TACCIE
|
`undef TACCIE
|
`undef TACCIE
|
`endif
|
`endif
|
`ifdef TACCI
|
`ifdef TACCI
|
`undef TACCI
|
`undef TACCI
|
`endif
|
`endif
|
`ifdef TAOUT
|
`ifdef TAOUT
|
`undef TAOUT
|
`undef TAOUT
|
`endif
|
`endif
|
`ifdef TACOV
|
`ifdef TACOV
|
`undef TACOV
|
`undef TACOV
|
`endif
|
`endif
|
`ifdef TACCIFG
|
`ifdef TACCIFG
|
`undef TACCIFG
|
`undef TACCIFG
|
`endif
|
`endif
|
|
|
//
|
//
|
// DEBUG INTERFACE EXTRA CONFIGURATION
|
// DEBUG INTERFACE EXTRA CONFIGURATION
|
//======================================
|
//======================================
|
|
|
// Debug interface: Software breakpoint opcode
|
// Debug interface: Software breakpoint opcode
|
`ifdef DBG_SWBRK_OP
|
`ifdef DBG_SWBRK_OP
|
`undef DBG_SWBRK_OP
|
`undef DBG_SWBRK_OP
|
`endif
|
`endif
|
|
|
// Debug interface ID
|
|
`ifdef DBG_ID
|
|
`undef DBG_ID
|
|
`endif
|
|
|
|
// Debug UART interface auto data synchronization
|
// Debug UART interface auto data synchronization
|
`ifdef DBG_UART_AUTO_SYNC
|
`ifdef DBG_UART_AUTO_SYNC
|
`undef DBG_UART_AUTO_SYNC
|
`undef DBG_UART_AUTO_SYNC
|
`endif
|
`endif
|
|
|
// Debug UART interface data rate
|
// Debug UART interface data rate
|
`ifdef DBG_UART_BAUD
|
`ifdef DBG_UART_BAUD
|
`undef DBG_UART_BAUD
|
`undef DBG_UART_BAUD
|
`endif
|
`endif
|
`ifdef DBG_DCO_FREQ
|
`ifdef DBG_DCO_FREQ
|
`undef DBG_DCO_FREQ
|
`undef DBG_DCO_FREQ
|
`endif
|
`endif
|
`ifdef DBG_UART_CNT
|
`ifdef DBG_UART_CNT
|
`undef DBG_UART_CNT
|
`undef DBG_UART_CNT
|
`endif
|
`endif
|
|
|
// Enable/Disable the hardware breakpoint RANGE mode
|
// Enable/Disable the hardware breakpoint RANGE mode
|
`ifdef HWBRK_RANGE
|
`ifdef HWBRK_RANGE
|
`undef HWBRK_RANGE
|
`undef HWBRK_RANGE
|
`endif
|
`endif
|
|
|
|
// Counter width for the debug interface UART
|
|
`ifdef DBG_UART_XFER_CNT_W
|
|
`undef DBG_UART_XFER_CNT_W
|
|
`endif
|
|
|
//
|
//
|
// MULTIPLIER CONFIGURATION
|
// MULTIPLIER CONFIGURATION
|
//======================================
|
//======================================
|
|
|
`ifdef MPY_16x16
|
`ifdef MPY_16x16
|
`undef MPY_16x16
|
`undef MPY_16x16
|
`endif
|
`endif
|
|
|