/* Main simulator loop for CGEN-based simulators.
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/* Main simulator loop for CGEN-based simulators.
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Copyright (C) 1998, 2007, 2008 Free Software Foundation, Inc.
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Copyright (C) 1998, 2007, 2008 Free Software Foundation, Inc.
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Contributed by Cygnus Solutions.
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Contributed by Cygnus Solutions.
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This file is part of GDB, the GNU debugger.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* ??? These are old notes, kept around for now.
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/* ??? These are old notes, kept around for now.
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Collecting profile data and tracing slow us down so we don't do them in
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Collecting profile data and tracing slow us down so we don't do them in
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"fast mode".
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"fast mode".
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There are 6 possibilities on 2 axes:
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There are 6 possibilities on 2 axes:
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- no-scaching, insn-scaching, basic-block-scaching
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- no-scaching, insn-scaching, basic-block-scaching
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- run with full features or run fast
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- run with full features or run fast
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Supporting all six possibilities in one executable is a bit much but
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Supporting all six possibilities in one executable is a bit much but
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supporting full/fast seems reasonable.
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supporting full/fast seems reasonable.
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If the scache is configured in it is always used.
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If the scache is configured in it is always used.
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If pbb-scaching is configured in it is always used.
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If pbb-scaching is configured in it is always used.
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??? Sometimes supporting more than one set of semantic functions will make
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??? Sometimes supporting more than one set of semantic functions will make
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the simulator too large - this should be configurable. Blah blah blah.
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the simulator too large - this should be configurable. Blah blah blah.
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??? Supporting full/fast can be more modular, blah blah blah.
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??? Supporting full/fast can be more modular, blah blah blah.
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When the framework is more modular, this can be.
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When the framework is more modular, this can be.
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*/
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*/
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#include "sim-main.h"
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#include "sim-main.h"
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#include "sim-assert.h"
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#include "sim-assert.h"
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#ifndef SIM_ENGINE_PREFIX_HOOK
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#ifndef SIM_ENGINE_PREFIX_HOOK
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#define SIM_ENGINE_PREFIX_HOOK(sd)
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#define SIM_ENGINE_PREFIX_HOOK(sd)
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#endif
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#endif
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#ifndef SIM_ENGINE_POSTFIX_HOOK
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#ifndef SIM_ENGINE_POSTFIX_HOOK
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#define SIM_ENGINE_POSTFIX_HOOK(sd)
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#define SIM_ENGINE_POSTFIX_HOOK(sd)
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#endif
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#endif
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static sim_event_handler has_stepped;
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static sim_event_handler has_stepped;
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static void prime_cpu (SIM_CPU *, int);
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static void prime_cpu (SIM_CPU *, int);
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static void engine_run_1 (SIM_DESC, int, int);
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static void engine_run_1 (SIM_DESC, int, int);
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static void engine_run_n (SIM_DESC, int, int, int, int);
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static void engine_run_n (SIM_DESC, int, int, int, int);
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/* sim_resume for cgen */
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/* sim_resume for cgen */
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void
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void
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sim_resume (SIM_DESC sd, int step, int siggnal)
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sim_resume (SIM_DESC sd, int step, int siggnal)
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{
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{
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sim_engine *engine = STATE_ENGINE (sd);
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sim_engine *engine = STATE_ENGINE (sd);
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jmp_buf buf;
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jmp_buf buf;
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int jmpval;
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int jmpval;
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ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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/* we only want to be single stepping the simulator once */
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/* we only want to be single stepping the simulator once */
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if (engine->stepper != NULL)
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if (engine->stepper != NULL)
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{
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{
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sim_events_deschedule (sd, engine->stepper);
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sim_events_deschedule (sd, engine->stepper);
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engine->stepper = NULL;
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engine->stepper = NULL;
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}
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}
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if (step)
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if (step)
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engine->stepper = sim_events_schedule (sd, 1, has_stepped, sd);
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engine->stepper = sim_events_schedule (sd, 1, has_stepped, sd);
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sim_module_resume (sd);
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sim_module_resume (sd);
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#if WITH_SCACHE
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#if WITH_SCACHE
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if (USING_SCACHE_P (sd))
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if (USING_SCACHE_P (sd))
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scache_flush (sd);
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scache_flush (sd);
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#endif
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#endif
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/* run/resume the simulator */
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/* run/resume the simulator */
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sim_engine_set_run_state (sd, sim_running, 0);
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sim_engine_set_run_state (sd, sim_running, 0);
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engine->jmpbuf = &buf;
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engine->jmpbuf = &buf;
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jmpval = setjmp (buf);
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jmpval = setjmp (buf);
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if (jmpval == sim_engine_start_jmpval
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if (jmpval == sim_engine_start_jmpval
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|| jmpval == sim_engine_restart_jmpval)
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|| jmpval == sim_engine_restart_jmpval)
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{
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{
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int last_cpu_nr = sim_engine_last_cpu_nr (sd);
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int last_cpu_nr = sim_engine_last_cpu_nr (sd);
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int next_cpu_nr = sim_engine_next_cpu_nr (sd);
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int next_cpu_nr = sim_engine_next_cpu_nr (sd);
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int nr_cpus = sim_engine_nr_cpus (sd);
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int nr_cpus = sim_engine_nr_cpus (sd);
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/* ??? Setting max_insns to 0 allows pbb/jit code to run wild and is
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/* ??? Setting max_insns to 0 allows pbb/jit code to run wild and is
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useful if all one wants to do is run a benchmark. Need some better
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useful if all one wants to do is run a benchmark. Need some better
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way to identify this case. */
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way to identify this case. */
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int max_insns = (step
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int max_insns = (step
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? 1
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? 1
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: (nr_cpus == 1
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: (nr_cpus == 1
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/*&& wip:no-events*/
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/*&& wip:no-events*/
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/* Don't do this if running under gdb, need to
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/* Don't do this if running under gdb, need to
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poll ui for events. */
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poll ui for events. */
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&& STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
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&& STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
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? 0
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? 0
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: 8); /*FIXME: magic number*/
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: 8); /*FIXME: magic number*/
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int fast_p = STATE_RUN_FAST_P (sd);
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int fast_p = STATE_RUN_FAST_P (sd);
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sim_events_preprocess (sd, last_cpu_nr >= nr_cpus, next_cpu_nr >= nr_cpus);
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sim_events_preprocess (sd, last_cpu_nr >= nr_cpus, next_cpu_nr >= nr_cpus);
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if (next_cpu_nr >= nr_cpus)
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if (next_cpu_nr >= nr_cpus)
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next_cpu_nr = 0;
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next_cpu_nr = 0;
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if (nr_cpus == 1)
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if (nr_cpus == 1)
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engine_run_1 (sd, max_insns, fast_p);
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engine_run_1 (sd, max_insns, fast_p);
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else
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else
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engine_run_n (sd, next_cpu_nr, nr_cpus, max_insns, fast_p);
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engine_run_n (sd, next_cpu_nr, nr_cpus, max_insns, fast_p);
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}
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}
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#if 1 /*wip*/
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#if 1 /*wip*/
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else
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else
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{
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{
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/* Account for the last insn executed. */
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/* Account for the last insn executed. */
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SIM_CPU *cpu = STATE_CPU (sd, sim_engine_last_cpu_nr (sd));
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SIM_CPU *cpu = STATE_CPU (sd, sim_engine_last_cpu_nr (sd));
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++ CPU_INSN_COUNT (cpu);
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++ CPU_INSN_COUNT (cpu);
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TRACE_INSN_FINI (cpu, NULL, 1);
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TRACE_INSN_FINI (cpu, NULL, 1);
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}
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}
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#endif
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#endif
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engine->jmpbuf = NULL;
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engine->jmpbuf = NULL;
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{
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{
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int i;
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int i;
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int nr_cpus = sim_engine_nr_cpus (sd);
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int nr_cpus = sim_engine_nr_cpus (sd);
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#if 0 /*wip,ignore*/
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#if 0 /*wip,ignore*/
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/* If the loop exits, either we single-stepped or @cpu@_engine_stop
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/* If the loop exits, either we single-stepped or @cpu@_engine_stop
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was called. */
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was called. */
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if (step)
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if (step)
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sim_engine_set_run_state (sd, sim_stopped, SIM_SIGTRAP);
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sim_engine_set_run_state (sd, sim_stopped, SIM_SIGTRAP);
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else
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else
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sim_engine_set_run_state (sd, pending_reason, pending_sigrc);
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sim_engine_set_run_state (sd, pending_reason, pending_sigrc);
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#endif
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#endif
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for (i = 0; i < nr_cpus; ++i)
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for (i = 0; i < nr_cpus; ++i)
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{
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{
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SIM_CPU *cpu = STATE_CPU (sd, i);
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SIM_CPU *cpu = STATE_CPU (sd, i);
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PROFILE_TOTAL_INSN_COUNT (CPU_PROFILE_DATA (cpu)) += CPU_INSN_COUNT (cpu);
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PROFILE_TOTAL_INSN_COUNT (CPU_PROFILE_DATA (cpu)) += CPU_INSN_COUNT (cpu);
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}
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}
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}
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}
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sim_module_suspend (sd);
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sim_module_suspend (sd);
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}
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}
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/* Halt the simulator after just one instruction. */
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/* Halt the simulator after just one instruction. */
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static void
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static void
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has_stepped (SIM_DESC sd, void *data)
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has_stepped (SIM_DESC sd, void *data)
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{
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{
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ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP);
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sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP);
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}
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}
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/* Prepare a cpu for running.
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/* Prepare a cpu for running.
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MAX_INSNS is the number of insns to execute per time slice.
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MAX_INSNS is the number of insns to execute per time slice.
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If 0 it means the cpu can run as long as it wants (e.g. until the
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If 0 it means the cpu can run as long as it wants (e.g. until the
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program completes).
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program completes).
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??? Perhaps this should be an argument to the engine_fn. */
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??? Perhaps this should be an argument to the engine_fn. */
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static void
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static void
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prime_cpu (SIM_CPU *cpu, int max_insns)
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prime_cpu (SIM_CPU *cpu, int max_insns)
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{
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{
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CPU_MAX_SLICE_INSNS (cpu) = max_insns;
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CPU_MAX_SLICE_INSNS (cpu) = max_insns;
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CPU_INSN_COUNT (cpu) = 0;
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CPU_INSN_COUNT (cpu) = 0;
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/* Initialize the insn descriptor table.
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/* Initialize the insn descriptor table.
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This has to be done after all initialization so we just defer it to
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This has to be done after all initialization so we just defer it to
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here. */
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here. */
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if (MACH_PREPARE_RUN (CPU_MACH (cpu)))
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if (MACH_PREPARE_RUN (CPU_MACH (cpu)))
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(* MACH_PREPARE_RUN (CPU_MACH (cpu))) (cpu);
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(* MACH_PREPARE_RUN (CPU_MACH (cpu))) (cpu);
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}
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}
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/* Main loop, for 1 cpu. */
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/* Main loop, for 1 cpu. */
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static void
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static void
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engine_run_1 (SIM_DESC sd, int max_insns, int fast_p)
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engine_run_1 (SIM_DESC sd, int max_insns, int fast_p)
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{
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{
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sim_cpu *cpu = STATE_CPU (sd, 0);
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sim_cpu *cpu = STATE_CPU (sd, 0);
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ENGINE_FN *fn = fast_p ? CPU_FAST_ENGINE_FN (cpu) : CPU_FULL_ENGINE_FN (cpu);
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ENGINE_FN *fn = fast_p ? CPU_FAST_ENGINE_FN (cpu) : CPU_FULL_ENGINE_FN (cpu);
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prime_cpu (cpu, max_insns);
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prime_cpu (cpu, max_insns);
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while (1)
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while (1)
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{
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{
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SIM_ENGINE_PREFIX_HOOK (sd);
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SIM_ENGINE_PREFIX_HOOK (sd);
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(*fn) (cpu);
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(*fn) (cpu);
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SIM_ENGINE_POSTFIX_HOOK (sd);
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SIM_ENGINE_POSTFIX_HOOK (sd);
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/* process any events */
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/* process any events */
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if (sim_events_tick (sd))
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if (sim_events_tick (sd))
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sim_events_process (sd);
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sim_events_process (sd);
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}
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}
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}
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}
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/* Main loop, for multiple cpus. */
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/* Main loop, for multiple cpus. */
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static void
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static void
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engine_run_n (SIM_DESC sd, int next_cpu_nr, int nr_cpus, int max_insns, int fast_p)
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engine_run_n (SIM_DESC sd, int next_cpu_nr, int nr_cpus, int max_insns, int fast_p)
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{
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{
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int i;
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int i;
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ENGINE_FN *engine_fns[MAX_NR_PROCESSORS];
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ENGINE_FN *engine_fns[MAX_NR_PROCESSORS];
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for (i = 0; i < nr_cpus; ++i)
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for (i = 0; i < nr_cpus; ++i)
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{
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{
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SIM_CPU *cpu = STATE_CPU (sd, i);
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SIM_CPU *cpu = STATE_CPU (sd, i);
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engine_fns[i] = fast_p ? CPU_FAST_ENGINE_FN (cpu) : CPU_FULL_ENGINE_FN (cpu);
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engine_fns[i] = fast_p ? CPU_FAST_ENGINE_FN (cpu) : CPU_FULL_ENGINE_FN (cpu);
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prime_cpu (cpu, max_insns);
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prime_cpu (cpu, max_insns);
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}
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}
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while (1)
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while (1)
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{
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{
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SIM_ENGINE_PREFIX_HOOK (sd);
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SIM_ENGINE_PREFIX_HOOK (sd);
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/* FIXME: proper cycling of all of them, blah blah blah. */
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/* FIXME: proper cycling of all of them, blah blah blah. */
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while (next_cpu_nr != nr_cpus)
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while (next_cpu_nr != nr_cpus)
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{
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{
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SIM_CPU *cpu = STATE_CPU (sd, next_cpu_nr);
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SIM_CPU *cpu = STATE_CPU (sd, next_cpu_nr);
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(* engine_fns[next_cpu_nr]) (cpu);
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(* engine_fns[next_cpu_nr]) (cpu);
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++next_cpu_nr;
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++next_cpu_nr;
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}
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}
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SIM_ENGINE_POSTFIX_HOOK (sd);
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SIM_ENGINE_POSTFIX_HOOK (sd);
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/* process any events */
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/* process any events */
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if (sim_events_tick (sd))
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if (sim_events_tick (sd))
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sim_events_process (sd);
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sim_events_process (sd);
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}
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}
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}
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}
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