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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [m32c/] [main.c] - Diff between revs 24 and 33

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Rev 24 Rev 33
/* main.c --- main function for stand-alone M32C simulator.
/* main.c --- main function for stand-alone M32C simulator.
 
 
Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
Contributed by Red Hat, Inc.
Contributed by Red Hat, Inc.
 
 
This file is part of the GNU simulators.
This file is part of the GNU simulators.
 
 
This program is free software; you can redistribute it and/or modify
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
(at your option) any later version.
 
 
This program is distributed in the hope that it will be useful,
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
GNU General Public License for more details.
 
 
You should have received a copy of the GNU General Public License
You should have received a copy of the GNU General Public License
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 
 
 
#include <stdio.h>
#include <stdio.h>
#include <string.h>
#include <string.h>
#include <stdlib.h>
#include <stdlib.h>
#include <unistd.h>
#include <unistd.h>
#include <assert.h>
#include <assert.h>
#include <setjmp.h>
#include <setjmp.h>
#include <signal.h>
#include <signal.h>
 
 
#include "bfd.h"
#include "bfd.h"
 
 
#include "cpu.h"
#include "cpu.h"
#include "mem.h"
#include "mem.h"
#include "misc.h"
#include "misc.h"
#include "load.h"
#include "load.h"
#include "trace.h"
#include "trace.h"
 
 
static int disassemble = 0;
static int disassemble = 0;
static unsigned int cycles = 0;
static unsigned int cycles = 0;
 
 
static void
static void
done (int exit_code)
done (int exit_code)
{
{
  if (verbose)
  if (verbose)
    {
    {
      stack_heap_stats ();
      stack_heap_stats ();
      mem_usage_stats ();
      mem_usage_stats ();
      printf ("insns: %14s\n", comma (cycles));
      printf ("insns: %14s\n", comma (cycles));
    }
    }
  exit (exit_code);
  exit (exit_code);
}
}
 
 
int
int
main (int argc, char **argv)
main (int argc, char **argv)
{
{
  int o;
  int o;
  int save_trace;
  int save_trace;
  bfd *prog;
  bfd *prog;
 
 
  while ((o = getopt (argc, argv, "tvdm:")) != -1)
  while ((o = getopt (argc, argv, "tvdm:")) != -1)
    switch (o)
    switch (o)
      {
      {
      case 't':
      case 't':
        trace++;
        trace++;
        break;
        break;
      case 'v':
      case 'v':
        verbose++;
        verbose++;
        break;
        break;
      case 'd':
      case 'd':
        disassemble++;
        disassemble++;
        break;
        break;
      case 'm':
      case 'm':
        if (strcmp (optarg, "r8c") == 0 || strcmp (optarg, "m16c") == 0)
        if (strcmp (optarg, "r8c") == 0 || strcmp (optarg, "m16c") == 0)
          default_machine = bfd_mach_m16c;
          default_machine = bfd_mach_m16c;
        else if (strcmp (optarg, "m32cm") == 0
        else if (strcmp (optarg, "m32cm") == 0
                 || strcmp (optarg, "m32c") == 0)
                 || strcmp (optarg, "m32c") == 0)
          default_machine = bfd_mach_m32c;
          default_machine = bfd_mach_m32c;
        else
        else
          {
          {
            fprintf (stderr, "Invalid machine: %s\n", optarg);
            fprintf (stderr, "Invalid machine: %s\n", optarg);
            exit (1);
            exit (1);
          }
          }
        break;
        break;
      case '?':
      case '?':
        fprintf (stderr,
        fprintf (stderr,
                 "usage: run [-v] [-t] [-d] [-m r8c|m16c|m32cm|m32c]"
                 "usage: run [-v] [-t] [-d] [-m r8c|m16c|m32cm|m32c]"
                 " program\n");
                 " program\n");
        exit (1);
        exit (1);
      }
      }
 
 
  prog = bfd_openr (argv[optind], 0);
  prog = bfd_openr (argv[optind], 0);
  if (!prog)
  if (!prog)
    {
    {
      fprintf (stderr, "Can't read %s\n", argv[optind]);
      fprintf (stderr, "Can't read %s\n", argv[optind]);
      exit (1);
      exit (1);
    }
    }
 
 
  if (!bfd_check_format (prog, bfd_object))
  if (!bfd_check_format (prog, bfd_object))
    {
    {
      fprintf (stderr, "%s not a m32c program\n", argv[optind]);
      fprintf (stderr, "%s not a m32c program\n", argv[optind]);
      exit (1);
      exit (1);
    }
    }
 
 
  save_trace = trace;
  save_trace = trace;
  trace = 0;
  trace = 0;
  m32c_load (prog);
  m32c_load (prog);
  trace = save_trace;
  trace = save_trace;
 
 
  if (disassemble)
  if (disassemble)
    sim_disasm_init (prog);
    sim_disasm_init (prog);
 
 
  while (1)
  while (1)
    {
    {
      int rc;
      int rc;
 
 
      if (trace)
      if (trace)
        printf ("\n");
        printf ("\n");
 
 
      if (disassemble)
      if (disassemble)
        sim_disasm_one ();
        sim_disasm_one ();
 
 
      enable_counting = verbose;
      enable_counting = verbose;
      cycles++;
      cycles++;
      rc = decode_opcode ();
      rc = decode_opcode ();
      enable_counting = 0;
      enable_counting = 0;
 
 
      if (M32C_HIT_BREAK (rc))
      if (M32C_HIT_BREAK (rc))
        done (1);
        done (1);
      else if (M32C_EXITED (rc))
      else if (M32C_EXITED (rc))
        done (M32C_EXIT_STATUS (rc));
        done (M32C_EXIT_STATUS (rc));
      else
      else
        assert (M32C_STEPPED (rc));
        assert (M32C_STEPPED (rc));
 
 
      trace_register_changes ();
      trace_register_changes ();
    }
    }
}
}
 
 

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