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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [textrm.cgs] - Diff between revs 24 and 33

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Rev 24 Rev 33
# Intel(r) Wireless MMX(tm) technology testcase for TEXTRM
# Intel(r) Wireless MMX(tm) technology testcase for TEXTRM
# mach: xscale
# mach: xscale
# as: -mcpu=xscale+iwmmxt
# as: -mcpu=xscale+iwmmxt
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global textrm
        .global textrm
textrm:
textrm:
        # Enable access to CoProcessors 0 & 1 before
        # Enable access to CoProcessors 0 & 1 before
        # we attempt these instructions.
        # we attempt these instructions.
        mvi_h_gr   r1, 3
        mvi_h_gr   r1, 3
        mcr        p15, 0, r1, cr15, cr1, 0
        mcr        p15, 0, r1, cr15, cr1, 0
        # Test Unsigned Byte Wide Extraction
        # Test Unsigned Byte Wide Extraction
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0x111111ff
        mvi_h_gr   r2, 0x111111ff
        tmcrr      wr0, r0, r1
        tmcrr      wr0, r0, r1
        textrmub   r2, wr0, #3
        textrmub   r2, wr0, #3
        tmrrc      r0, r1, wr0
        tmrrc      r0, r1, wr0
        test_h_gr  r0, 0x12345678
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x00000012
        test_h_gr  r2, 0x00000012
        # Test Signed Byte Wide Extraction
        # Test Signed Byte Wide Extraction
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0x111111ff
        mvi_h_gr   r2, 0x111111ff
        tmcrr      wr0, r0, r1
        tmcrr      wr0, r0, r1
        textrmsb   r2, wr0, #4
        textrmsb   r2, wr0, #4
        tmrrc      r0, r1, wr0
        tmrrc      r0, r1, wr0
        test_h_gr  r0, 0x12345678
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0xfffffff0
        test_h_gr  r2, 0xfffffff0
        # Test Unsigned Half Word Wide Extraction
        # Test Unsigned Half Word Wide Extraction
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0x111111ff
        mvi_h_gr   r2, 0x111111ff
        tmcrr      wr0, r0, r1
        tmcrr      wr0, r0, r1
        textrmuh   r2, wr0, #3
        textrmuh   r2, wr0, #3
        tmrrc      r0, r1, wr0
        tmrrc      r0, r1, wr0
        test_h_gr  r0, 0x12345678
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x00009abc
        test_h_gr  r2, 0x00009abc
        # Test Signed Half Word Wide Extraction
        # Test Signed Half Word Wide Extraction
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0x111111ff
        mvi_h_gr   r2, 0x111111ff
        tmcrr      wr0, r0, r1
        tmcrr      wr0, r0, r1
        textrmsh   r2, wr0, #1
        textrmsh   r2, wr0, #1
        tmrrc      r0, r1, wr0
        tmrrc      r0, r1, wr0
        test_h_gr  r0, 0x12345678
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x00001234
        test_h_gr  r2, 0x00001234
        # Test Unsigned Word Wide Extraction
        # Test Unsigned Word Wide Extraction
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0x111111ff
        mvi_h_gr   r2, 0x111111ff
        tmcrr      wr0, r0, r1
        tmcrr      wr0, r0, r1
        textrmuw   r2, wr0, #0
        textrmuw   r2, wr0, #0
        tmrrc      r0, r1, wr0
        tmrrc      r0, r1, wr0
        test_h_gr  r0, 0x12345678
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x12345678
        test_h_gr  r2, 0x12345678
        # Test Signed Word Wide Extraction
        # Test Signed Word Wide Extraction
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0x111111ff
        mvi_h_gr   r2, 0x111111ff
        tmcrr      wr0, r0, r1
        tmcrr      wr0, r0, r1
        textrmsw   r2, wr0, #1
        textrmsw   r2, wr0, #1
        tmrrc      r0, r1, wr0
        tmrrc      r0, r1, wr0
        test_h_gr  r0, 0x12345678
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x9abcdef0
        test_h_gr  r2, 0x9abcdef0
        pass
        pass
 
 

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