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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [arm/] [rsb.cgs] - Diff between revs 24 and 33

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Rev 24 Rev 33
# arm testcase for rsb$cond${set-cc?} $rd,$rn,$imm12
# arm testcase for rsb$cond${set-cc?} $rd,$rn,$imm12
# mach: unfinished
# mach: unfinished
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global rsb_imm
        .global rsb_imm
rsb_imm:
rsb_imm:
        rsb00 pc,pc,0
        rsb00 pc,pc,0
        pass
        pass
# arm testcase for rsb$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
# arm testcase for rsb$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
# mach: unfinished
# mach: unfinished
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global rsb_reg_imm_shift
        .global rsb_reg_imm_shift
rsb_reg_imm_shift:
rsb_reg_imm_shift:
        rsb00 pc,pc,pc,lsl 0
        rsb00 pc,pc,pc,lsl 0
        pass
        pass
# arm testcase for rsb$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
# arm testcase for rsb$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
# mach: unfinished
# mach: unfinished
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global rsb_reg_reg_shift
        .global rsb_reg_reg_shift
rsb_reg_reg_shift:
rsb_reg_reg_shift:
        rsb00 pc,pc,pc,lsl pc
        rsb00 pc,pc,pc,lsl pc
        pass
        pass
 
 

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