URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [arm/] [xscale/] [mra.cgs] - Diff between revs 24 and 33

Rev 24	Rev 33
`# XScale testcase for MAR and MRA`	`# XScale testcase for MAR and MRA`
`# mach: xscale`	`# mach: xscale`
`# as: -mcpu=xscale`	`# as: -mcpu=xscale`

`.include "testutils.inc"`	`.include "testutils.inc"`

`start`	`start`

`.global mar_mra`	`.global mar_mra`
`mar_mra:`	`mar_mra:`
`mvi_h_gr r2,0`	`mvi_h_gr r2,0`
`mvi_h_gr r3,0`	`mvi_h_gr r3,0`
`mvi_h_gr r4,0x0000EFA0`	`mvi_h_gr r4,0x0000EFA0`
`mvi_h_gr r5,0xA0A0A0A0`	`mvi_h_gr r5,0xA0A0A0A0`

`# Enable access to CoProcessors 0 & 1 before`	`# Enable access to CoProcessors 0 & 1 before`
`# we attempt these instructions.`	`# we attempt these instructions.`

`mvi_h_gr r1, 3`	`mvi_h_gr r1, 3`
`mcr p15, 0, r1, cr15, cr1, 0`	`mcr p15, 0, r1, cr15, cr1, 0`

`mar acc0, r5, r4`	`mar acc0, r5, r4`
`mra r2, r3, acc0`	`mra r2, r3, acc0`

`test_h_gr r2,0xA0A0A0A0`	`test_h_gr r2,0xA0A0A0A0`
`test_h_gr r3,0x0000EFA0`	`test_h_gr r3,0x0000EFA0`
`test_h_gr r4,0x0000EFA0`	`test_h_gr r4,0x0000EFA0`
`test_h_gr r5,0xA0A0A0A0`	`test_h_gr r5,0xA0A0A0A0`

`pass`	`pass`