OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [ccs-v32.ms] - Diff between revs 24 and 33

Only display areas with differences | Details | Blame | View Log

Rev 24 Rev 33
# mach: crisv32
# mach: crisv32
# output: bf\n0\n80\n20\n10\n8\n4\n2\n1\n40\nfade040\n3ade0040\nfade040\n42\n
# output: bf\n0\n80\n20\n10\n8\n4\n2\n1\n40\nfade040\n3ade0040\nfade040\n42\n
; Check flag settings.
; Check flag settings.
 .include "testutils.inc"
 .include "testutils.inc"
 start
 start
 clear.d r3
 clear.d r3
 setf pixnzvc   ; Setting U(ser mode) would restrict tests of other flags.
 setf pixnzvc   ; Setting U(ser mode) would restrict tests of other flags.
 move ccs,r3
 move ccs,r3
 dumpr3
 dumpr3
 clear.d r3
 clear.d r3
 clearf puixnzvc
 clearf puixnzvc
 move ccs,r3
 move ccs,r3
 dumpr3
 dumpr3
 .macro testf BIT
 .macro testf BIT
 clear.d r3
 clear.d r3
 clearf puixnzvc
 clearf puixnzvc
 setf \BIT
 setf \BIT
 move ccs,r3
 move ccs,r3
 dumpr3
 dumpr3
 .endm
 .endm
 testf p
 testf p
 testf i
 testf i
 testf x
 testf x
 testf n
 testf n
 testf z
 testf z
 testf v
 testf v
 testf c
 testf c
 testf u        ; Can't test i-flag or clear u after this point.
 testf u        ; Can't test i-flag or clear u after this point.
 .macro test_get_cc N Z V C
 .macro test_get_cc N Z V C
 clearf znvc
 clearf znvc
 move ((\N << 3)|(\Z << 2)|(\V << 1)|\C),ccs
 move ((\N << 3)|(\Z << 2)|(\V << 1)|\C),ccs
 test_cc \N \Z \V \C
 test_cc \N \Z \V \C
 setf znvc
 setf znvc
 move ((\N << 3)|(\Z << 2)|(\V << 1)|\C),ccs
 move ((\N << 3)|(\Z << 2)|(\V << 1)|\C),ccs
 test_cc \N \Z \V \C
 test_cc \N \Z \V \C
 move.d ((\N << 3)|(\Z << 2)|(\V << 1)|\C),r4
 move.d ((\N << 3)|(\Z << 2)|(\V << 1)|\C),r4
 setf znvc
 setf znvc
 move r4,ccs
 move r4,ccs
 test_cc \N \Z \V \C
 test_cc \N \Z \V \C
 clearf znvc
 clearf znvc
 move r4,ccs
 move r4,ccs
 test_cc \N \Z \V \C
 test_cc \N \Z \V \C
 .endm
 .endm
 test_get_cc 1 0 0 0
 test_get_cc 1 0 0 0
 test_get_cc 0 1 0 0
 test_get_cc 0 1 0 0
 test_get_cc 0 0 1 0
 test_get_cc 0 0 1 0
 test_get_cc 0 0 0 1
 test_get_cc 0 0 0 1
; Test that the U bit sticks.
; Test that the U bit sticks.
 move 0x0fade000,ccs
 move 0x0fade000,ccs
 move ccs,r3
 move ccs,r3
 dumpr3
 dumpr3
; Check that the M and Q bits can't be set in user mode.
; Check that the M and Q bits can't be set in user mode.
 move 0xfade0000,ccs
 move 0xfade0000,ccs
 move ccs,r3
 move ccs,r3
 dumpr3
 dumpr3
 move 0x0fade000,ccs
 move 0x0fade000,ccs
 move ccs,r3
 move ccs,r3
 dumpr3
 dumpr3
 move.d 0x42,r3
 move.d 0x42,r3
 dumpr3
 dumpr3
 quit
 quit
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.