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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [cris/] [asm/] [movdelsr1.ms] - Diff between revs 24 and 33

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Rev 24 Rev 33
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
# output: aa117acd\n
# output: aa117acd\n
# output: eeaabb42\n
# output: eeaabb42\n
; Bug with move to special register in delay slot, due to
; Bug with move to special register in delay slot, due to
; special flush-insn-cache simulator use.  Ordinary move worked;
; special flush-insn-cache simulator use.  Ordinary move worked;
; special register caused branch to fail.
; special register caused branch to fail.
 .include "testutils.inc"
 .include "testutils.inc"
 start
 start
 move -1,srp
 move -1,srp
 move.d 0xaa117acd,r1
 move.d 0xaa117acd,r1
 moveq 3,r9
 moveq 3,r9
 cmpq 1,r9
 cmpq 1,r9
 bhi 0f
 bhi 0f
 move.d r1,r3
 move.d r1,r3
 fail
 fail
0:
0:
 dumpr3
 dumpr3
 move.d 0xeeaabb42,r1
 move.d 0xeeaabb42,r1
 moveq 3,r9
 moveq 3,r9
 cmpq 1,r9
 cmpq 1,r9
 bhi 0f
 bhi 0f
 move r1,srp
 move r1,srp
 fail
 fail
0:
0:
 move srp,r3
 move srp,r3
 dumpr3
 dumpr3
 quit
 quit
 
 

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