URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Only display areas with differences |
Details |
Blame |
View Log
Rev 24 |
Rev 33 |
# mach: crisv3 crisv8 crisv10
|
# mach: crisv3 crisv8 crisv10
|
# output: bed0bed1\nabedab0d\nbed0bed1\n
|
# output: bed0bed1\nabedab0d\nbed0bed1\n
|
|
|
# Test that move to and from special register and memory clears the
|
# Test that move to and from special register and memory clears the
|
# "prefixed" bit.
|
# "prefixed" bit.
|
|
|
.include "testutils.inc"
|
.include "testutils.inc"
|
.data
|
.data
|
w:
|
w:
|
.dword 0
|
.dword 0
|
y:
|
y:
|
.dword 0xbed0bed1
|
.dword 0xbed0bed1
|
z:
|
z:
|
.dword 0xabedab0d
|
.dword 0xabedab0d
|
|
|
start
|
start
|
x:
|
x:
|
move.d y,r3
|
move.d y,r3
|
clear.d [w]
|
clear.d [w]
|
move.d [r3],r3
|
move.d [r3],r3
|
dumpr3 ; bed0bed1
|
dumpr3 ; bed0bed1
|
move.d z,r3
|
move.d z,r3
|
move [w+4],srp
|
move [w+4],srp
|
move.d [r3],r3
|
move.d [r3],r3
|
dumpr3 ; abedab0d
|
dumpr3 ; abedab0d
|
move srp,r3
|
move srp,r3
|
dumpr3 ; bed0bed1
|
dumpr3 ; bed0bed1
|
quit
|
quit
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.