OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [cris/] [hw/] [rv-n-cris/] [poll1.ms] - Diff between revs 24 and 33

Only display areas with differences | Details | Blame | View Log

Rev 24 Rev 33
#mach: crisv32
#mach: crisv32
#sim(crisv32): --hw-device "/rv/dummy 0x12"
#sim(crisv32): --hw-device "/rv/dummy 0x12"
# A variant of trivial2.ms to check that the right thing happens when
# A variant of trivial2.ms to check that the right thing happens when
# we reach the poll function with a dummy device.
# we reach the poll function with a dummy device.
 .include "testutils.inc"
 .include "testutils.inc"
 start
 start
 move.d 0xd0000000,$r0
 move.d 0xd0000000,$r0
 move.d [$r0+],$r3
 move.d [$r0+],$r3
 cmp.d 0x12121212,$r3
 cmp.d 0x12121212,$r3
 beq ok
 beq ok
 nop
 nop
bad:
bad:
 fail
 fail
ok:
ok:
 move.d 0x10000,$r10
 move.d 0x10000,$r10
0:
0:
 bne 0b
 bne 0b
 subq 1,$r10
 subq 1,$r10
 pass
 pass
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.