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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [fr30/] [eorh.cgs] - Diff between revs 24 and 33

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Rev 24 Rev 33
# fr30 testcase for eorh $Rj,$Ri, eorh $Rj,@$Ri
# fr30 testcase for eorh $Rj,$Ri, eorh $Rj,@$Ri
# mach(): fr30
# mach(): fr30
        .include "testutils.inc"
        .include "testutils.inc"
        START
        START
        .text
        .text
        .global eorh
        .global eorh
eorh:
eorh:
        ; Test eorh $Rj,@$Ri
        ; Test eorh $Rj,@$Ri
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_mem       0x55555555,sp
        mvi_h_mem       0x55555555,sp
        set_cc          0x07            ; Set mask opposite of expected
        set_cc          0x07            ; Set mask opposite of expected
        eorh            r7,@sp
        eorh            r7,@sp
        test_cc         1 0 1 1
        test_cc         1 0 1 1
        test_h_mem      0xffff5555,sp
        test_h_mem      0xffff5555,sp
        mvi_h_gr        0xaaaa0000,r7
        mvi_h_gr        0xaaaa0000,r7
        mvi_h_mem       0x00005555,sp
        mvi_h_mem       0x00005555,sp
        set_cc          0x08            ; Set mask opposite of expected
        set_cc          0x08            ; Set mask opposite of expected
        eorh            r7,@sp
        eorh            r7,@sp
        test_cc         0 1 0 0
        test_cc         0 1 0 0
        test_h_mem      0x00005555,sp
        test_h_mem      0x00005555,sp
        mvi_h_gr        0xaaaa5555,r7
        mvi_h_gr        0xaaaa5555,r7
        mvi_h_mem       0x5555aaaa,sp
        mvi_h_mem       0x5555aaaa,sp
        set_cc          0x0b            ; Set mask opposite of expected
        set_cc          0x0b            ; Set mask opposite of expected
        eorh            r7,@sp
        eorh            r7,@sp
        test_cc         0 1 1 1
        test_cc         0 1 1 1
        test_h_mem      0x0000aaaa,sp
        test_h_mem      0x0000aaaa,sp
        mvi_h_gr        0x0000de00,r7
        mvi_h_gr        0x0000de00,r7
        mvi_h_mem       0x00adbeef,sp
        mvi_h_mem       0x00adbeef,sp
        set_cc          0x05            ; Set mask opposite of expected
        set_cc          0x05            ; Set mask opposite of expected
        eorh            r7,@sp
        eorh            r7,@sp
        test_cc         1 0 0 1
        test_cc         1 0 0 1
        test_h_mem      0xdeadbeef,sp
        test_h_mem      0xdeadbeef,sp
        pass
        pass
 
 

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