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Rev 33 |
# fr30 testcase for ldm0 ($reglist_low)
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# fr30 testcase for ldm0 ($reglist_low)
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# mach(): fr30
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# mach(): fr30
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.include "testutils.inc"
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.include "testutils.inc"
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START
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START
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.text
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.text
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.global ldm0
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.global ldm0
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ldm0:
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ldm0:
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; Test ldm0 ($reglist_low)
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; Test ldm0 ($reglist_low)
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mvr_h_gr sp,r9 ; save stack pointer permanently
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mvr_h_gr sp,r9 ; save stack pointer permanently
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inci_h_gr -4,sp
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inci_h_gr -4,sp
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mvi_h_mem 3,sp
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mvi_h_mem 3,sp
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inci_h_gr -4,sp
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inci_h_gr -4,sp
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mvi_h_mem 2,sp
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mvi_h_mem 2,sp
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inci_h_gr -4,sp
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inci_h_gr -4,sp
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mvi_h_mem 1,sp
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mvi_h_mem 1,sp
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inci_h_gr -4,sp
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inci_h_gr -4,sp
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mvi_h_mem 0,sp
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mvi_h_mem 0,sp
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set_cc 0x0f ; Condition codes should not change
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set_cc 0x0f ; Condition codes should not change
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ldm0 (r0,r2,r4,r6)
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ldm0 (r0,r2,r4,r6)
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test_cc 1 1 1 1
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test_cc 1 1 1 1
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testr_h_gr sp,r9
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testr_h_gr sp,r9
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test_h_gr 0,r0
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test_h_gr 0,r0
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test_h_gr 1,r2
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test_h_gr 1,r2
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test_h_gr 2,r4
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test_h_gr 2,r4
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test_h_gr 3,r6
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test_h_gr 3,r6
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inci_h_gr -16,sp
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inci_h_gr -16,sp
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set_cc 0x0f ; Condition codes should not change
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set_cc 0x0f ; Condition codes should not change
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ldm0 (r1,r3,r5,r7)
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ldm0 (r1,r3,r5,r7)
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test_cc 1 1 1 1
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test_cc 1 1 1 1
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testr_h_gr sp,r9
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testr_h_gr sp,r9
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test_h_gr 0,r1
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test_h_gr 0,r1
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test_h_gr 1,r3
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test_h_gr 1,r3
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test_h_gr 2,r5
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test_h_gr 2,r5
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test_h_gr 3,r7
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test_h_gr 3,r7
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inci_h_gr -16,sp
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inci_h_gr -16,sp
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set_cc 0x0f ; Condition codes should not change
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set_cc 0x0f ; Condition codes should not change
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ldm0 (r1,r5,r7,r3) ; Order speficied should not matter
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ldm0 (r1,r5,r7,r3) ; Order speficied should not matter
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test_cc 1 1 1 1
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test_cc 1 1 1 1
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testr_h_gr sp,r9
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testr_h_gr sp,r9
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test_h_gr 0,r1
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test_h_gr 0,r1
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test_h_gr 1,r3
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test_h_gr 1,r3
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test_h_gr 2,r5
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test_h_gr 2,r5
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test_h_gr 3,r7
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test_h_gr 3,r7
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set_cc 0x0f ; Condition codes should not change
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set_cc 0x0f ; Condition codes should not change
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ldm0 () ; Nothing should happen
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ldm0 () ; Nothing should happen
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test_cc 1 1 1 1
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test_cc 1 1 1 1
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testr_h_gr sp,r9
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testr_h_gr sp,r9
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test_h_gr 0,r1
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test_h_gr 0,r1
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test_h_gr 1,r3
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test_h_gr 1,r3
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test_h_gr 2,r5
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test_h_gr 2,r5
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test_h_gr 3,r7
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test_h_gr 3,r7
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pass
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pass
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