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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [fr30/] [or.cgs] - Diff between revs 24 and 33

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Rev 24 Rev 33
# fr30 testcase for or $Rj,$Ri, or $Rj,@$Ri
# fr30 testcase for or $Rj,$Ri, or $Rj,@$Ri
# mach(): fr30
# mach(): fr30
        .include "testutils.inc"
        .include "testutils.inc"
        START
        START
        .text
        .text
        .global or
        .global or
or:
or:
        ; Test or $Rj,$Ri
        ; Test or $Rj,$Ri
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_gr        0x55555555,r8
        mvi_h_gr        0x55555555,r8
        set_cc          0x07            ; Set mask opposite of expected
        set_cc          0x07            ; Set mask opposite of expected
        or              r7,r8
        or              r7,r8
        test_cc         1 0 1 1
        test_cc         1 0 1 1
        test_h_gr       0xffffffff,r8
        test_h_gr       0xffffffff,r8
        mvi_h_gr        0x00000000,r7
        mvi_h_gr        0x00000000,r7
        mvi_h_gr        0x00000000,r8
        mvi_h_gr        0x00000000,r8
        set_cc          0x08            ; Set mask opposite of expected
        set_cc          0x08            ; Set mask opposite of expected
        or              r7,r8
        or              r7,r8
        test_cc         0 1 0 0
        test_cc         0 1 0 0
        test_h_gr       0x00000000,r8
        test_h_gr       0x00000000,r8
        mvi_h_gr        0xdead0000,r7
        mvi_h_gr        0xdead0000,r7
        mvi_h_gr        0x0000beef,r8
        mvi_h_gr        0x0000beef,r8
        set_cc          0x05            ; Set mask opposite of expected
        set_cc          0x05            ; Set mask opposite of expected
        or              r7,r8
        or              r7,r8
        test_cc         1 0 0 1
        test_cc         1 0 0 1
        test_h_gr       0xdeadbeef,r8
        test_h_gr       0xdeadbeef,r8
        ; Test or $Rj,@$Ri
        ; Test or $Rj,@$Ri
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_gr        0xaaaaaaaa,r7
        mvi_h_mem       0x55555555,sp
        mvi_h_mem       0x55555555,sp
        set_cc          0x07            ; Set mask opposite of expected
        set_cc          0x07            ; Set mask opposite of expected
        or              r7,@sp
        or              r7,@sp
        test_cc         1 0 1 1
        test_cc         1 0 1 1
        test_h_mem      0xffffffff,sp
        test_h_mem      0xffffffff,sp
        mvi_h_gr        0x00000000,r7
        mvi_h_gr        0x00000000,r7
        mvi_h_mem       0x00000000,sp
        mvi_h_mem       0x00000000,sp
        set_cc          0x08            ; Set mask opposite of expected
        set_cc          0x08            ; Set mask opposite of expected
        or              r7,@sp
        or              r7,@sp
        test_cc         0 1 0 0
        test_cc         0 1 0 0
        test_h_mem      0x00000000,sp
        test_h_mem      0x00000000,sp
        mvi_h_gr        0xdead0000,r7
        mvi_h_gr        0xdead0000,r7
        mvi_h_mem       0x0000beef,sp
        mvi_h_mem       0x0000beef,sp
        set_cc          0x05            ; Set mask opposite of expected
        set_cc          0x05            ; Set mask opposite of expected
        or              r7,@sp
        or              r7,@sp
        test_cc         1 0 0 1
        test_cc         1 0 0 1
        test_h_mem      0xdeadbeef,sp
        test_h_mem      0xdeadbeef,sp
        pass
        pass
 
 

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