URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [fr30/] [orb.cgs] - Diff between revs 24 and 33

Rev 24	Rev 33
`# fr30 testcase for orb $Rj,$Ri, orb $Rj,@$Ri`	`# fr30 testcase for orb $Rj,$Ri, orb $Rj,@$Ri`
`# mach(): fr30`	`# mach(): fr30`

`.include "testutils.inc"`	`.include "testutils.inc"`

`START`	`START`

`.text`	`.text`
`.global orb`	`.global orb`
`orb:`	`orb:`
`; Test orb $Rj,@$Ri`	`; Test orb $Rj,@$Ri`
`mvi_h_gr 0xaaaaaaaa,r7`	`mvi_h_gr 0xaaaaaaaa,r7`
`mvi_h_mem 0x55555555,sp`	`mvi_h_mem 0x55555555,sp`
`set_cc 0x07 ; Set mask opposite of expected`	`set_cc 0x07 ; Set mask opposite of expected`
`orb r7,@sp`	`orb r7,@sp`
`test_cc 1 0 1 1`	`test_cc 1 0 1 1`
`test_h_mem 0xff555555,sp`	`test_h_mem 0xff555555,sp`

`mvi_h_gr 0xffffff00,r7`	`mvi_h_gr 0xffffff00,r7`
`mvi_h_mem 0x00ffffff,sp`	`mvi_h_mem 0x00ffffff,sp`
`set_cc 0x08 ; Set mask opposite of expected`	`set_cc 0x08 ; Set mask opposite of expected`
`orb r7,@sp`	`orb r7,@sp`
`test_cc 0 1 0 0`	`test_cc 0 1 0 0`
`test_h_mem 0x00ffffff,sp`	`test_h_mem 0x00ffffff,sp`

`mvi_h_gr 0x000000d0,r7`	`mvi_h_gr 0x000000d0,r7`
`mvi_h_mem 0x0eadbeef,sp`	`mvi_h_mem 0x0eadbeef,sp`
`set_cc 0x05 ; Set mask opposite of expected`	`set_cc 0x05 ; Set mask opposite of expected`
`orb r7,@sp`	`orb r7,@sp`
`test_cc 1 0 0 1`	`test_cc 1 0 0 1`
`test_h_mem 0xdeadbeef,sp`	`test_h_mem 0xdeadbeef,sp`

`pass`	`pass`