URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [frv/] [addicc.cgs] - Diff between revs 24 and 33

Rev 24	Rev 33
`# frv testcase for addicc $GRi,$s10,$GRk,$ICCi_1`	`# frv testcase for addicc $GRi,$s10,$GRk,$ICCi_1`
`# mach: all`	`# mach: all`

`.include "testutils.inc"`	`.include "testutils.inc"`

`start`	`start`

`.global addicc`	`.global addicc`
`addicc:`	`addicc:`
`; Test add $u4Ri`	`; Test add $u4Ri`
`set_gr_immed 4,gr8`	`set_gr_immed 4,gr8`
`set_icc 0x0f,0 ; Set mask opposite of expected`	`set_icc 0x0f,0 ; Set mask opposite of expected`
`addicc gr8,0,gr8,icc0`	`addicc gr8,0,gr8,icc0`
`test_icc 0 0 0 0 icc0`	`test_icc 0 0 0 0 icc0`
`test_gr_immed 4,gr8`	`test_gr_immed 4,gr8`
`set_icc 0x0f,0 ; Set mask opposite of expected`	`set_icc 0x0f,0 ; Set mask opposite of expected`
`addicc gr8,1,gr8,icc0`	`addicc gr8,1,gr8,icc0`
`test_icc 0 0 0 0 icc0`	`test_icc 0 0 0 0 icc0`
`test_gr_immed 5,gr8`	`test_gr_immed 5,gr8`
`set_icc 0x0f,0 ; Set mask opposite of expected`	`set_icc 0x0f,0 ; Set mask opposite of expected`
`addicc gr8,15,gr8,icc0`	`addicc gr8,15,gr8,icc0`
`test_icc 0 0 0 0 icc0`	`test_icc 0 0 0 0 icc0`
`test_gr_immed 20,gr8`	`test_gr_immed 20,gr8`
`set_gr_limmed 0x7fff,0xffff,gr8 ; test neg and overflow bits`	`set_gr_limmed 0x7fff,0xffff,gr8 ; test neg and overflow bits`
`set_icc 0x05,0 ; Set mask opposite of expected`	`set_icc 0x05,0 ; Set mask opposite of expected`
`addicc gr8,1,gr8,icc0`	`addicc gr8,1,gr8,icc0`
`test_icc 1 0 1 0 icc0`	`test_icc 1 0 1 0 icc0`
`test_gr_limmed 0x8000,0x0000,gr8`	`test_gr_limmed 0x8000,0x0000,gr8`

`pass`	`pass`