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Rev 33 |
# frv parallel testcase for branching
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# frv parallel testcase for branching
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# mach: fr500 fr550 frv
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# mach: fr500 fr550 frv
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.include "testutils.inc"
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.include "testutils.inc"
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start
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start
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.global branch
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.global branch
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branch: ; All insns in VLIW execute
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branch: ; All insns in VLIW execute
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setlos.p 1,gr1
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setlos.p 1,gr1
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setlos 0,gr2
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setlos 0,gr2
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setlos.p 0,gr3
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setlos.p 0,gr3
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bra ok1
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bra ok1
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setlos.p 2,gr2
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setlos.p 2,gr2
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setlos 3,gr3
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setlos 3,gr3
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fail
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fail
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ok1:
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ok1:
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test_gr_immed 1,gr1
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test_gr_immed 1,gr1
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test_gr_immed 0,gr2
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test_gr_immed 0,gr2
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test_gr_immed 0,gr3
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test_gr_immed 0,gr3
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; 1st branch is taken
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; 1st branch is taken
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bra.p ok5
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bra.p ok5
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bra ok4
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bra ok4
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bra.p ok3
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bra.p ok3
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bra ok2
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bra ok2
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fail
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fail
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ok2:
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ok2:
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fail
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fail
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ok3:
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ok3:
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fail
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fail
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ok4:
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ok4:
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fail
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fail
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ok5:
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ok5:
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; 1st true branch is taken
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; 1st true branch is taken
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set_icc 0x4 1
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set_icc 0x4 1
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bne.p icc1,1,ok6
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bne.p icc1,1,ok6
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blt icc1,1,ok7
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blt icc1,1,ok7
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beq.p icc1,1,ok9
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beq.p icc1,1,ok9
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ble icc1,1,ok8
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ble icc1,1,ok8
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fail
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fail
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ok6:
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ok6:
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fail
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fail
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ok7:
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ok7:
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fail
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fail
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ok8:
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ok8:
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fail
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fail
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ok9:
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ok9:
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; combination of the above
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; combination of the above
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set_icc 0x4 1
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set_icc 0x4 1
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setlos.p 4,gr4
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setlos.p 4,gr4
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setlos.p 0,gr5
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setlos.p 0,gr5
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bne.p icc1,1,oka
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bne.p icc1,1,oka
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beq icc1,1,okb
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beq icc1,1,okb
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setlos 5,gr5
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setlos 5,gr5
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fail
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fail
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oka:
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oka:
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fail
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fail
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okb:
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okb:
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test_gr_immed 4,gr4
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test_gr_immed 4,gr4
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test_gr_immed 0,gr5
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test_gr_immed 0,gr5
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pass
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pass
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