URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [frv/] [cldhfu.cgs] - Diff between revs 24 and 33

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Rev 24	Rev 33
`# frv testcase for cldhfu @($GRi,$GRj),$FRk,$CCi,$cond`	`# frv testcase for cldhfu @($GRi,$GRj),$FRk,$CCi,$cond`
`# mach: all`	`# mach: all`

`.include "testutils.inc"`	`.include "testutils.inc"`

`start`	`start`

`.global cldhfu`	`.global cldhfu`
`cldhfu:`	`cldhfu:`
`set_spr_immed 0x1b1b,cccr`	`set_spr_immed 0x1b1b,cccr`
`set_gr_gr sp,gr21`	`set_gr_gr sp,gr21`

`set_gr_gr sp,gr20`	`set_gr_gr sp,gr20`
`set_mem_limmed 0xdead,0xbeef,sp`	`set_mem_limmed 0xdead,0xbeef,sp`
`set_fr_iimmed 0xbeef,0xdead,fr8`	`set_fr_iimmed 0xbeef,0xdead,fr8`

`set_gr_immed 0,gr7`	`set_gr_immed 0,gr7`
`cldhfu @(sp,gr7),fr8,cc0,1`	`cldhfu @(sp,gr7),fr8,cc0,1`
`test_fr_limmed 0x0000,0xdead,fr8`	`test_fr_limmed 0x0000,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`inc_gr_immed 2,gr20`	`inc_gr_immed 2,gr20`
`set_gr_immed 2,gr7`	`set_gr_immed 2,gr7`
`cldhfu @(sp,gr7),fr8,cc0,1`	`cldhfu @(sp,gr7),fr8,cc0,1`
`test_fr_limmed 0x0000,0xbeef,fr8`	`test_fr_limmed 0x0000,0xbeef,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`inc_gr_immed -2,sp`	`inc_gr_immed -2,sp`
`set_mem_limmed 0xffff,0x0000,sp`	`set_mem_limmed 0xffff,0x0000,sp`
`inc_gr_immed 4,sp`	`inc_gr_immed 4,sp`
`set_gr_immed -2,gr7`	`set_gr_immed -2,gr7`
`cldhfu @(sp,gr7),fr8,cc4,1`	`cldhfu @(sp,gr7),fr8,cc4,1`
`test_fr_limmed 0x0000,0x0000,fr8`	`test_fr_limmed 0x0000,0x0000,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`set_gr_gr gr21,sp`	`set_gr_gr gr21,sp`
`set_gr_gr sp,gr20`	`set_gr_gr sp,gr20`
`set_mem_limmed 0xdead,0xbeef,sp`	`set_mem_limmed 0xdead,0xbeef,sp`
`set_fr_iimmed 0xbeef,0xdead,fr8`	`set_fr_iimmed 0xbeef,0xdead,fr8`

`set_gr_immed 0,gr7`	`set_gr_immed 0,gr7`
`cldhfu @(sp,gr7),fr8,cc0,0`	`cldhfu @(sp,gr7),fr8,cc0,0`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`set_gr_immed 2,gr7`	`set_gr_immed 2,gr7`
`cldhfu @(sp,gr7),fr8,cc0,0`	`cldhfu @(sp,gr7),fr8,cc0,0`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`inc_gr_immed 4,gr20`	`inc_gr_immed 4,gr20`
`set_mem_limmed 0xffff,0x0000,sp`	`set_mem_limmed 0xffff,0x0000,sp`
`inc_gr_immed 4,sp`	`inc_gr_immed 4,sp`
`set_gr_immed -2,gr7`	`set_gr_immed -2,gr7`
`cldhfu @(sp,gr7),fr8,cc4,0`	`cldhfu @(sp,gr7),fr8,cc4,0`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`set_gr_gr gr21,sp`	`set_gr_gr gr21,sp`
`set_gr_gr sp,gr20`	`set_gr_gr sp,gr20`
`set_mem_limmed 0xdead,0xbeef,sp`	`set_mem_limmed 0xdead,0xbeef,sp`
`set_fr_iimmed 0xbeef,0xdead,fr8`	`set_fr_iimmed 0xbeef,0xdead,fr8`

`set_gr_immed 0,gr7`	`set_gr_immed 0,gr7`
`cldhfu @(sp,gr7),fr8,cc1,0`	`cldhfu @(sp,gr7),fr8,cc1,0`
`test_fr_limmed 0x0000,0xdead,fr8`	`test_fr_limmed 0x0000,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`inc_gr_immed 2,gr20`	`inc_gr_immed 2,gr20`
`set_gr_immed 2,gr7`	`set_gr_immed 2,gr7`
`cldhfu @(sp,gr7),fr8,cc1,0`	`cldhfu @(sp,gr7),fr8,cc1,0`
`test_fr_limmed 0x0000,0xbeef,fr8`	`test_fr_limmed 0x0000,0xbeef,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`inc_gr_immed -2,sp`	`inc_gr_immed -2,sp`
`set_mem_limmed 0xffff,0x0000,sp`	`set_mem_limmed 0xffff,0x0000,sp`
`inc_gr_immed 4,sp`	`inc_gr_immed 4,sp`
`set_gr_immed -2,gr7`	`set_gr_immed -2,gr7`
`cldhfu @(sp,gr7),fr8,cc5,0`	`cldhfu @(sp,gr7),fr8,cc5,0`
`test_fr_limmed 0x0000,0x0000,fr8`	`test_fr_limmed 0x0000,0x0000,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`set_gr_gr gr21,sp`	`set_gr_gr gr21,sp`
`set_gr_gr sp,gr20`	`set_gr_gr sp,gr20`
`set_mem_limmed 0xdead,0xbeef,sp`	`set_mem_limmed 0xdead,0xbeef,sp`
`set_fr_iimmed 0xbeef,0xdead,fr8`	`set_fr_iimmed 0xbeef,0xdead,fr8`

`set_gr_immed 0,gr7`	`set_gr_immed 0,gr7`
`cldhfu @(sp,gr7),fr8,cc1,1`	`cldhfu @(sp,gr7),fr8,cc1,1`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`set_gr_immed 2,gr7`	`set_gr_immed 2,gr7`
`cldhfu @(sp,gr7),fr8,cc1,1`	`cldhfu @(sp,gr7),fr8,cc1,1`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`inc_gr_immed 4,gr20`	`inc_gr_immed 4,gr20`
`set_mem_limmed 0xffff,0x0000,sp`	`set_mem_limmed 0xffff,0x0000,sp`
`inc_gr_immed 4,sp`	`inc_gr_immed 4,sp`
`set_gr_immed -2,gr7`	`set_gr_immed -2,gr7`
`cldhfu @(sp,gr7),fr8,cc5,1`	`cldhfu @(sp,gr7),fr8,cc5,1`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`set_gr_gr gr21,sp`	`set_gr_gr gr21,sp`
`set_gr_gr sp,gr20`	`set_gr_gr sp,gr20`
`set_mem_limmed 0xdead,0xbeef,sp`	`set_mem_limmed 0xdead,0xbeef,sp`
`set_fr_iimmed 0xbeef,0xdead,fr8`	`set_fr_iimmed 0xbeef,0xdead,fr8`

`set_gr_immed 0,gr7`	`set_gr_immed 0,gr7`
`cldhfu @(sp,gr7),fr8,cc2,0`	`cldhfu @(sp,gr7),fr8,cc2,0`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`set_gr_immed 2,gr7`	`set_gr_immed 2,gr7`
`cldhfu @(sp,gr7),fr8,cc2,1`	`cldhfu @(sp,gr7),fr8,cc2,1`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`inc_gr_immed 4,gr20`	`inc_gr_immed 4,gr20`
`set_mem_limmed 0xffff,0x0000,sp`	`set_mem_limmed 0xffff,0x0000,sp`
`inc_gr_immed 4,sp`	`inc_gr_immed 4,sp`
`set_gr_immed -2,gr7`	`set_gr_immed -2,gr7`
`cldhfu @(sp,gr7),fr8,cc6,0`	`cldhfu @(sp,gr7),fr8,cc6,0`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`set_gr_gr gr21,sp`	`set_gr_gr gr21,sp`
`set_gr_gr sp,gr20`	`set_gr_gr sp,gr20`
`set_mem_limmed 0xdead,0xbeef,sp`	`set_mem_limmed 0xdead,0xbeef,sp`
`set_fr_iimmed 0xbeef,0xdead,fr8`	`set_fr_iimmed 0xbeef,0xdead,fr8`

`set_gr_immed 0,gr7`	`set_gr_immed 0,gr7`
`cldhfu @(sp,gr7),fr8,cc3,1`	`cldhfu @(sp,gr7),fr8,cc3,1`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`set_gr_immed 2,gr7`	`set_gr_immed 2,gr7`
`cldhfu @(sp,gr7),fr8,cc3,0`	`cldhfu @(sp,gr7),fr8,cc3,0`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`inc_gr_immed 4,gr20`	`inc_gr_immed 4,gr20`
`set_mem_limmed 0xffff,0x0000,sp`	`set_mem_limmed 0xffff,0x0000,sp`
`inc_gr_immed 4,sp`	`inc_gr_immed 4,sp`
`set_gr_immed -2,gr7`	`set_gr_immed -2,gr7`
`cldhfu @(sp,gr7),fr8,cc7,1`	`cldhfu @(sp,gr7),fr8,cc7,1`
`test_fr_limmed 0xbeef,0xdead,fr8`	`test_fr_limmed 0xbeef,0xdead,fr8`
`test_gr_gr sp,gr20`	`test_gr_gr sp,gr20`

`pass`	`pass`

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Subversion Repositories openrisc_me

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [frv/] [cldhfu.cgs] - Diff between revs 24 and 33