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# frv parallel testcase for lr branching
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# frv parallel testcase for lr branching
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# mach: fr500 fr550 frv
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# mach: fr500 fr550 frv
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.include "testutils.inc"
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.include "testutils.inc"
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start
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start
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.global lrbranch
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.global lrbranch
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lrbranch:
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lrbranch:
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; Both conditions true
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; Both conditions true
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set_spr_immed 128,lcr
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set_spr_immed 128,lcr
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set_spr_addr ok1,lr
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set_spr_addr ok1,lr
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set_icc 0x4 0
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set_icc 0x4 0
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bcgelr.p icc0,0,0
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bcgelr.p icc0,0,0
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bra ok4
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bra ok4
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fail
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fail
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ok1:
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ok1:
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test_spr_immed 127,LCR
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test_spr_immed 127,LCR
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; Only first condition true
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; Only first condition true
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set_spr_immed 128,lcr
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set_spr_immed 128,lcr
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set_spr_addr ok2,lr
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set_spr_addr ok2,lr
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set_icc 0x0 0
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set_icc 0x0 0
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bcgelr.p icc0,0,0
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bcgelr.p icc0,0,0
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bno
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bno
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fail
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fail
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ok2:
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ok2:
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test_spr_immed 127,LCR
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test_spr_immed 127,LCR
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; Only second condition true
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; Only second condition true
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set_spr_immed 128,lcr
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set_spr_immed 128,lcr
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set_spr_addr ok3,lr
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set_spr_addr ok3,lr
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set_icc 0x8 0
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set_icc 0x8 0
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bcgelr.p icc0,0,0
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bcgelr.p icc0,0,0
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bra ok3
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bra ok3
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fail
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fail
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ok3:
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ok3:
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test_spr_immed 127,LCR
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test_spr_immed 127,LCR
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; Both conditions false
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; Both conditions false
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set_spr_immed 128,lcr
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set_spr_immed 128,lcr
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set_spr_addr ok4,lr
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set_spr_addr ok4,lr
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set_icc 0x0 0
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set_icc 0x0 0
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bceqlr.p icc0,0,0
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bceqlr.p icc0,0,0
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bno
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bno
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test_spr_immed 127,LCR
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test_spr_immed 127,LCR
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pass
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pass
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ok4:
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ok4:
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fail
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fail
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