# frv testcase for nfsqrts $FRj,$FRk
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# frv testcase for nfsqrts $FRj,$FRk
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# mach: fr500 fr550 frv
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# mach: fr500 fr550 frv
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.include "testutils.inc"
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.include "testutils.inc"
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float_constants
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float_constants
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start
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start
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load_float_constants
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load_float_constants
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.global nfsqrts
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.global nfsqrts
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nfsqrts:
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nfsqrts:
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nfsqrts fr44,fr1 ; 9.0
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nfsqrts fr44,fr1 ; 9.0
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test_fr_fr fr1,fr36 ; 3.0
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test_fr_fr fr1,fr36 ; 3.0
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test_spr_immed 0,fner1
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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test_spr_immed 0,fner0
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set_fr_iimmed 0x4049,0x0fdb,fr10 ; 3.141592654
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set_fr_iimmed 0x4049,0x0fdb,fr10 ; 3.141592654
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nfsqrts fr10,fr10
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nfsqrts fr10,fr10
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test_fr_iimmed 0x3fe2dfc5,fr10 ; 1.7724539
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test_fr_iimmed 0x3fe2dfc5,fr10 ; 1.7724539
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test_spr_immed 0,fner1
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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test_spr_immed 0,fner0
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; fp_exceptions
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; fp_exceptions
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nfsqrts fr8,fr1 ; -1 -- invalid
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nfsqrts fr8,fr1 ; -1 -- invalid
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test_fr_iimmed 0x7fc00000,fr1 ; nan1
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test_fr_iimmed 0x7fc00000,fr1 ; nan1
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test_spr_immed 2,fner1
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test_spr_immed 2,fner1
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test_spr_immed 0,fner0
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test_spr_immed 0,fner0
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test_spr_bits 0x80000000,31,0x0,fqst0 ; fq0.miv is clear
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test_spr_bits 0x80000000,31,0x0,fqst0 ; fq0.miv is clear
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test_spr_bits 0x18000,15,0x0,fqst0 ; fq0.sie is clear
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test_spr_bits 0x18000,15,0x0,fqst0 ; fq0.sie is clear
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test_spr_bits 0x380,7,0x0,fqst0 ; fq0.ftt is clear
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test_spr_bits 0x380,7,0x0,fqst0 ; fq0.ftt is clear
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test_spr_bits 0x7e,1,0x0,fqst0 ; fq0.cexc is clear
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test_spr_bits 0x7e,1,0x0,fqst0 ; fq0.cexc is clear
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test_spr_bits 0x1,0,0x0,fqst0 ; fq0.valid is clear
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test_spr_bits 0x1,0,0x0,fqst0 ; fq0.valid is clear
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test_spr_immed 0,fqop0 ; fq0.opc
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test_spr_immed 0,fqop0 ; fq0.opc
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pass
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pass
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