# frv testcase for srlicc $GRi,$s10,$GRk,$ICCi_1
|
# frv testcase for srlicc $GRi,$s10,$GRk,$ICCi_1
|
# mach: all
|
# mach: all
|
|
|
.include "testutils.inc"
|
.include "testutils.inc"
|
|
|
start
|
start
|
|
|
.global srlicc
|
.global srlicc
|
srlicc:
|
srlicc:
|
set_gr_limmed 0x8000,0x0000,gr8
|
set_gr_limmed 0x8000,0x0000,gr8
|
set_icc 0x05,0 ; Set mask opposite of expected
|
set_icc 0x05,0 ; Set mask opposite of expected
|
srlicc gr8,0x1e0,gr8,icc0 ; Shift by 0
|
srlicc gr8,0x1e0,gr8,icc0 ; Shift by 0
|
test_icc 1 0 0 0 icc0
|
test_icc 1 0 0 0 icc0
|
test_gr_limmed 0x8000,0x0000,gr8
|
test_gr_limmed 0x8000,0x0000,gr8
|
|
|
set_gr_limmed 0x8000,0x0000,gr8
|
set_gr_limmed 0x8000,0x0000,gr8
|
set_icc 0x0f,0 ; Set mask opposite of expected
|
set_icc 0x0f,0 ; Set mask opposite of expected
|
srlicc gr8,-31,gr8,icc0 ; Shift by 1
|
srlicc gr8,-31,gr8,icc0 ; Shift by 1
|
test_icc 0 0 1 0 icc0
|
test_icc 0 0 1 0 icc0
|
test_gr_limmed 0x4000,0x0000,gr8
|
test_gr_limmed 0x4000,0x0000,gr8
|
|
|
set_gr_limmed 0x8000,0x0000,gr8
|
set_gr_limmed 0x8000,0x0000,gr8
|
set_icc 0x0f,0 ; Set mask opposite of expected
|
set_icc 0x0f,0 ; Set mask opposite of expected
|
srlicc gr8,31,gr8,icc0 ; Shift by 31
|
srlicc gr8,31,gr8,icc0 ; Shift by 31
|
test_icc 0 0 1 0 icc0
|
test_icc 0 0 1 0 icc0
|
test_gr_immed 1,gr8
|
test_gr_immed 1,gr8
|
|
|
set_gr_limmed 0x4000,0x0000,gr8
|
set_gr_limmed 0x4000,0x0000,gr8
|
set_icc 0x0a,0 ; Set mask opposite of expected
|
set_icc 0x0a,0 ; Set mask opposite of expected
|
srlicc gr8,31,gr8,icc0 ; clear register
|
srlicc gr8,31,gr8,icc0 ; clear register
|
test_icc 0 1 1 1 icc0
|
test_icc 0 1 1 1 icc0
|
test_gr_immed 0x00000000,gr8
|
test_gr_immed 0x00000000,gr8
|
|
|
pass
|
pass
|
|
|
