# frv testcase for stqcu $CPRk,@($GRi,$GRj)
|
# frv testcase for stqcu $CPRk,@($GRi,$GRj)
|
# mach: frv
|
# mach: frv
|
# as(frv): -mcpu=frv
|
# as(frv): -mcpu=frv
|
|
|
.include "testutils.inc"
|
.include "testutils.inc"
|
|
|
start
|
start
|
|
|
.global stqcu
|
.global stqcu
|
stqcu:
|
stqcu:
|
set_mem_limmed 0xbeef,0xdead,sp
|
set_mem_limmed 0xbeef,0xdead,sp
|
inc_gr_immed -4,sp
|
inc_gr_immed -4,sp
|
set_mem_limmed 0xdead,0xbeef,sp
|
set_mem_limmed 0xdead,0xbeef,sp
|
inc_gr_immed -4,sp
|
inc_gr_immed -4,sp
|
set_mem_limmed 0xdead,0xdead,sp
|
set_mem_limmed 0xdead,0xdead,sp
|
inc_gr_immed -4,sp
|
inc_gr_immed -4,sp
|
set_mem_limmed 0xbeef,0xbeef,sp
|
set_mem_limmed 0xbeef,0xbeef,sp
|
set_gr_gr sp,gr20
|
set_gr_gr sp,gr20
|
set_gr_immed 0,gr7
|
set_gr_immed 0,gr7
|
set_cpr_limmed 0xbeef,0xdead,cpr8
|
set_cpr_limmed 0xbeef,0xdead,cpr8
|
set_cpr_limmed 0xdead,0xbeef,cpr9
|
set_cpr_limmed 0xdead,0xbeef,cpr9
|
set_cpr_limmed 0xdead,0xdead,cpr10
|
set_cpr_limmed 0xdead,0xdead,cpr10
|
set_cpr_limmed 0xbeef,0xbeef,cpr11
|
set_cpr_limmed 0xbeef,0xbeef,cpr11
|
stqcu cpr8,@(sp,gr7)
|
stqcu cpr8,@(sp,gr7)
|
test_gr_gr sp,gr20
|
test_gr_gr sp,gr20
|
test_mem_limmed 0xbeef,0xdead,sp
|
test_mem_limmed 0xbeef,0xdead,sp
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
test_mem_limmed 0xdead,0xbeef,sp
|
test_mem_limmed 0xdead,0xbeef,sp
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
test_mem_limmed 0xdead,0xdead,sp
|
test_mem_limmed 0xdead,0xdead,sp
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
test_mem_limmed 0xbeef,0xbeef,sp
|
test_mem_limmed 0xbeef,0xbeef,sp
|
|
|
inc_gr_immed -28,sp
|
inc_gr_immed -28,sp
|
set_gr_immed 16,gr7
|
set_gr_immed 16,gr7
|
set_cpr_limmed 0x1111,0x1111,cpr8
|
set_cpr_limmed 0x1111,0x1111,cpr8
|
set_cpr_limmed 0x2222,0x2222,cpr9
|
set_cpr_limmed 0x2222,0x2222,cpr9
|
set_cpr_limmed 0x3333,0x3333,cpr10
|
set_cpr_limmed 0x3333,0x3333,cpr10
|
set_cpr_limmed 0x4444,0x4444,cpr11
|
set_cpr_limmed 0x4444,0x4444,cpr11
|
stqcu cpr8,@(sp,gr7)
|
stqcu cpr8,@(sp,gr7)
|
test_gr_gr sp,gr20
|
test_gr_gr sp,gr20
|
test_mem_limmed 0x1111,0x1111,sp
|
test_mem_limmed 0x1111,0x1111,sp
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
test_mem_limmed 0x2222,0x2222,sp
|
test_mem_limmed 0x2222,0x2222,sp
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
test_mem_limmed 0x3333,0x3333,sp
|
test_mem_limmed 0x3333,0x3333,sp
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
test_mem_limmed 0x4444,0x4444,sp
|
test_mem_limmed 0x4444,0x4444,sp
|
|
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
set_gr_immed -16,gr7
|
set_gr_immed -16,gr7
|
set_cpr_limmed 0x5555,0x5555,cpr8
|
set_cpr_limmed 0x5555,0x5555,cpr8
|
set_cpr_limmed 0x6666,0x6666,cpr9
|
set_cpr_limmed 0x6666,0x6666,cpr9
|
set_cpr_limmed 0x7777,0x7777,cpr10
|
set_cpr_limmed 0x7777,0x7777,cpr10
|
set_cpr_limmed 0x8888,0x8888,cpr11
|
set_cpr_limmed 0x8888,0x8888,cpr11
|
stqcu cpr8,@(sp,gr7)
|
stqcu cpr8,@(sp,gr7)
|
test_gr_gr sp,gr20
|
test_gr_gr sp,gr20
|
test_mem_limmed 0x5555,0x5555,sp
|
test_mem_limmed 0x5555,0x5555,sp
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
test_mem_limmed 0x6666,0x6666,sp
|
test_mem_limmed 0x6666,0x6666,sp
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
test_mem_limmed 0x7777,0x7777,sp
|
test_mem_limmed 0x7777,0x7777,sp
|
inc_gr_immed 4,sp
|
inc_gr_immed 4,sp
|
test_mem_limmed 0x8888,0x8888,sp
|
test_mem_limmed 0x8888,0x8888,sp
|
|
|
pass
|
pass
|
|
|
