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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [frv/] [umul.cgs] - Diff between revs 24 and 33

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Rev 24 Rev 33
# frv testcase for umul $GRi,$GRj,$GRk
# frv testcase for umul $GRi,$GRj,$GRk
# mach: all
# mach: all
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global umul
        .global umul
umul:
umul:
        set_gr_immed    3,gr7           ; multiply small numbers
        set_gr_immed    3,gr7           ; multiply small numbers
        set_gr_immed    2,gr8
        set_gr_immed    2,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_immed   0,gr8
        test_gr_immed   0,gr8
        test_gr_immed   6,gr9
        test_gr_immed   6,gr9
        set_gr_immed    1,gr7           ; multiply by 1
        set_gr_immed    1,gr7           ; multiply by 1
        set_gr_immed    2,gr8
        set_gr_immed    2,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_immed   0,gr8
        test_gr_immed   0,gr8
        test_gr_immed   2,gr9
        test_gr_immed   2,gr9
        set_gr_immed    2,gr7           ; multiply by 1
        set_gr_immed    2,gr7           ; multiply by 1
        set_gr_immed    1,gr8
        set_gr_immed    1,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_immed   0,gr8
        test_gr_immed   0,gr8
        test_gr_immed   2,gr9
        test_gr_immed   2,gr9
        set_gr_immed    0,gr7           ; multiply by 0
        set_gr_immed    0,gr7           ; multiply by 0
        set_gr_immed    2,gr8
        set_gr_immed    2,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_immed   0,gr8
        test_gr_immed   0,gr8
        test_gr_immed   0,gr9
        test_gr_immed   0,gr9
        set_gr_immed    2,gr7           ; multiply by 0
        set_gr_immed    2,gr7           ; multiply by 0
        set_gr_immed    0,gr8
        set_gr_immed    0,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_immed   0,gr8
        test_gr_immed   0,gr8
        test_gr_immed   0,gr9
        test_gr_immed   0,gr9
        set_gr_limmed   0x3fff,0xffff,gr7       ; 31 bit result
        set_gr_limmed   0x3fff,0xffff,gr7       ; 31 bit result
        set_gr_immed    2,gr8
        set_gr_immed    2,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_immed   0,gr8
        test_gr_immed   0,gr8
        test_gr_limmed  0x7fff,0xfffe,gr9
        test_gr_limmed  0x7fff,0xfffe,gr9
        set_gr_limmed   0x4000,0x0000,gr7       ; 32 bit result
        set_gr_limmed   0x4000,0x0000,gr7       ; 32 bit result
        set_gr_immed    2,gr8
        set_gr_immed    2,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_immed   0,gr8
        test_gr_immed   0,gr8
        test_gr_limmed  0x8000,0x0000,gr9
        test_gr_limmed  0x8000,0x0000,gr9
        set_gr_limmed   0x8000,0x0000,gr7       ; 33 bit result
        set_gr_limmed   0x8000,0x0000,gr7       ; 33 bit result
        set_gr_immed    2,gr8
        set_gr_immed    2,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_immed   1,gr8
        test_gr_immed   1,gr8
        test_gr_immed   0x00000000,gr9
        test_gr_immed   0x00000000,gr9
        set_gr_limmed   0x7fff,0xffff,gr7       ; max positive result
        set_gr_limmed   0x7fff,0xffff,gr7       ; max positive result
        set_gr_limmed   0x7fff,0xffff,gr8
        set_gr_limmed   0x7fff,0xffff,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_limmed  0x3fff,0xffff,gr8
        test_gr_limmed  0x3fff,0xffff,gr8
        test_gr_immed   0x00000001,gr9
        test_gr_immed   0x00000001,gr9
        set_gr_limmed   0x8000,0x0000,gr7       ; max positive result
        set_gr_limmed   0x8000,0x0000,gr7       ; max positive result
        set_gr_limmed   0x8000,0x0000,gr8
        set_gr_limmed   0x8000,0x0000,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_limmed  0x4000,0x0000,gr8
        test_gr_limmed  0x4000,0x0000,gr8
        test_gr_immed   0,gr9
        test_gr_immed   0,gr9
        set_gr_limmed   0xffff,0xffff,gr7       ; max positive result
        set_gr_limmed   0xffff,0xffff,gr7       ; max positive result
        set_gr_limmed   0xffff,0xffff,gr8
        set_gr_limmed   0xffff,0xffff,gr8
        umul            gr7,gr8,gr8
        umul            gr7,gr8,gr8
        test_gr_limmed  0xffff,0xfffe,gr8
        test_gr_limmed  0xffff,0xfffe,gr8
        test_gr_immed   1,gr9
        test_gr_immed   1,gr9
        pass
        pass
 
 

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