# Hitachi H8 testcase 'bfld', 'bfst'
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# Hitachi H8 testcase 'bfld', 'bfst'
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# mach(): h8sx
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# mach(): h8sx
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# as(h8300): --defsym sim_cpu=0
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# as(h8300): --defsym sim_cpu=0
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# as(h8300h): --defsym sim_cpu=1
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# as(h8300h): --defsym sim_cpu=1
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# as(h8300s): --defsym sim_cpu=2
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# as(h8300s): --defsym sim_cpu=2
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# as(h8sx): --defsym sim_cpu=3
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# as(h8sx): --defsym sim_cpu=3
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# ld(h8300h): -m h8300helf
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# ld(h8300h): -m h8300helf
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# ld(h8300s): -m h8300self
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# ld(h8300s): -m h8300self
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# ld(h8sx): -m h8300sxelf
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# ld(h8sx): -m h8300sxelf
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.include "testutils.inc"
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.include "testutils.inc"
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.data
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.data
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byte_src: .byte 0xa5
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byte_src: .byte 0xa5
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byte_dst: .byte 0
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byte_dst: .byte 0
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start
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start
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.if (sim_cpu == h8sx)
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.if (sim_cpu == h8sx)
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bfld_imm8_ind:
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bfld_imm8_ind:
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set_grs_a5a5
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set_grs_a5a5
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mov #byte_src, er2
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mov #byte_src, er2
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;; bfld #xx:8, @ers, rd8
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;; bfld #xx:8, @ers, rd8
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set_ccr_zero
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set_ccr_zero
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bfld #1, @er2, r1l
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bfld #1, @er2, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 1 r1l
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test_h_gr8 1 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #2, @er2, r1l
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bfld #2, @er2, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 0 r1l
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test_h_gr8 0 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #7, @er2, r1l
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bfld #7, @er2, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 5 r1l
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test_h_gr8 5 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #0x10, @er2, r1l
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bfld #0x10, @er2, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 0 r1l
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test_h_gr8 0 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #0x20, @er2, r1l
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bfld #0x20, @er2, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 1 r1l
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test_h_gr8 1 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #0xf0, @er2, r1l
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bfld #0xf0, @er2, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 0xa r1l
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test_h_gr8 0xa r1l
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 0xa5a5a50a er1
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test_h_gr32 0xa5a5a50a er1
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test_h_gr32 byte_src er2
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test_h_gr32 byte_src er2
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er7
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test_h_gr32 0xa5a5a5a5 er7
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bfld_imm8_abs16:
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bfld_imm8_abs16:
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set_grs_a5a5
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set_grs_a5a5
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;; bfld #xx:8, @aa:16, rd8
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;; bfld #xx:8, @aa:16, rd8
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set_ccr_zero
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set_ccr_zero
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bfld #0x80, @byte_src:16, r1l
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bfld #0x80, @byte_src:16, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 1 r1l
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test_h_gr8 1 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #0x40, @byte_src:16, r1l
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bfld #0x40, @byte_src:16, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 0 r1l
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test_h_gr8 0 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #0xe0, @byte_src:16, r1l
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bfld #0xe0, @byte_src:16, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 0x5 r1l
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test_h_gr8 0x5 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #0x3c, @byte_src:16, r1l
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bfld #0x3c, @byte_src:16, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 9 r1l
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test_h_gr8 9 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #0xfe, @byte_src:16, r1l
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bfld #0xfe, @byte_src:16, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 0x52 r1l
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test_h_gr8 0x52 r1l
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set_ccr_zero
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set_ccr_zero
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bfld #0, @byte_src:16, r1l
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bfld #0, @byte_src:16, r1l
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test_cc_clear
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test_cc_clear
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test_h_gr8 0 r1l
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test_h_gr8 0 r1l
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 0xa5a5a500 er1
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test_h_gr32 0xa5a5a500 er1
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test_h_gr32 0xa5a5a5a5 er2
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test_h_gr32 0xa5a5a5a5 er2
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er7
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test_h_gr32 0xa5a5a5a5 er7
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bfst_imm8_ind:
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bfst_imm8_ind:
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set_grs_a5a5
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set_grs_a5a5
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mov #byte_dst, er2
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mov #byte_dst, er2
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;; bfst rd8, #xx:8, @ers
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;; bfst rd8, #xx:8, @ers
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #1, @er2
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bfst r1l, #1, @er2
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;;; .word 0x7d20
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;;; .word 0x7d20
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;;; .word 0xf901
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;;; .word 0xf901
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test_cc_clear
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test_cc_clear
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cmp.b #1, @byte_dst
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cmp.b #1, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #2, @er2
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bfst r1l, #2, @er2
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;;; .word 0x7d20
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;;; .word 0x7d20
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;;; .word 0xf902
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;;; .word 0xf902
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test_cc_clear
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test_cc_clear
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cmp.b #2, @byte_dst
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cmp.b #2, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #7, @er2
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bfst r1l, #7, @er2
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;;; .word 0x7d20
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;;; .word 0x7d20
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;;; .word 0xf907
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;;; .word 0xf907
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test_cc_clear
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test_cc_clear
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cmp.b #5, @byte_dst
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cmp.b #5, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0x10, @er2
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bfst r1l, #0x10, @er2
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;;; .word 0x7d20
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;;; .word 0x7d20
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;;; .word 0xf910
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;;; .word 0xf910
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test_cc_clear
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test_cc_clear
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cmp.b #0x10, @byte_dst
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cmp.b #0x10, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0x20, @er2
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bfst r1l, #0x20, @er2
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;;; .word 0x7d20
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;;; .word 0x7d20
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;;; .word 0xf920
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;;; .word 0xf920
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test_cc_clear
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test_cc_clear
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cmp.b #0x20, @byte_dst
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cmp.b #0x20, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0xf0, @er2
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bfst r1l, #0xf0, @er2
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;;; .word 0x7d20
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;;; .word 0x7d20
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;;; .word 0xf9f0
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;;; .word 0xf9f0
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test_cc_clear
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test_cc_clear
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cmp.b #0x50, @byte_dst
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cmp.b #0x50, @byte_dst
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bne fail1:16
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bne fail1:16
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 0xa5a5a5a5 er0
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test_h_gr32 0xa5a5a5a5 er1
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test_h_gr32 0xa5a5a5a5 er1
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test_h_gr32 byte_dst er2
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test_h_gr32 byte_dst er2
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er3
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er4
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er5
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er6
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test_h_gr32 0xa5a5a5a5 er7
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test_h_gr32 0xa5a5a5a5 er7
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bfst_imm8_abs32:
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bfst_imm8_abs32:
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set_grs_a5a5
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set_grs_a5a5
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;; bfst #xx:8, @aa:32, rd8
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;; bfst #xx:8, @aa:32, rd8
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0x80, @byte_dst:32
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bfst r1l, #0x80, @byte_dst:32
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;;; .word 0x6a38
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;;; .word 0x6a38
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;;; .long byte_dst
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;;; .long byte_dst
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;;; .word 0xf980
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;;; .word 0xf980
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test_cc_clear
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test_cc_clear
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cmp.b #0x80, @byte_dst
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cmp.b #0x80, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0x40, @byte_dst:32
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bfst r1l, #0x40, @byte_dst:32
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;;; .word 0x6a38
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;;; .word 0x6a38
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;;; .long byte_dst
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;;; .long byte_dst
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;;; .word 0xf940
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;;; .word 0xf940
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test_cc_clear
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test_cc_clear
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cmp.b #0x40, @byte_dst
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cmp.b #0x40, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0xe0, @byte_dst:32
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bfst r1l, #0xe0, @byte_dst:32
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;;; .word 0x6a38
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;;; .word 0x6a38
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;;; .long byte_dst
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;;; .long byte_dst
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;;; .word 0xf9e0
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;;; .word 0xf9e0
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test_cc_clear
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test_cc_clear
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cmp.b #0xa0, @byte_dst
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cmp.b #0xa0, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0x3c, @byte_dst:32
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bfst r1l, #0x3c, @byte_dst:32
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;;; .word 0x6a38
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;;; .word 0x6a38
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;;; .long byte_dst
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;;; .long byte_dst
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;;; .word 0xf93c
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;;; .word 0xf93c
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test_cc_clear
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test_cc_clear
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cmp.b #0x14, @byte_dst
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cmp.b #0x14, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0xfe, @byte_dst:32
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bfst r1l, #0xfe, @byte_dst:32
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;;; .word 0x6a38
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;;; .word 0x6a38
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;;; .long byte_dst
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;;; .long byte_dst
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;;; .word 0xf9fe
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;;; .word 0xf9fe
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test_cc_clear
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test_cc_clear
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cmp.b #0x4a, @byte_dst
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cmp.b #0x4a, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0, @byte_dst:32
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bfst r1l, #0, @byte_dst:32
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;;; .word 0x6a38
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;;; .word 0x6a38
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;;; .long byte_dst
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;;; .long byte_dst
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;;; .word 0xf900
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;;; .word 0xf900
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test_cc_clear
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test_cc_clear
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cmp.b #0x0, @byte_dst
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cmp.b #0x0, @byte_dst
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bne fail1:16
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bne fail1:16
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mov.b #0, @byte_dst
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mov.b #0, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0x38, @byte_dst:32
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bfst r1l, #0x38, @byte_dst:32
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;;; .word 0x6a38
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;;; .word 0x6a38
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;;; .long byte_dst
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;;; .long byte_dst
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;;; .word 0xf938
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;;; .word 0xf938
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test_cc_clear
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test_cc_clear
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cmp.b #0x28, @byte_dst
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cmp.b #0x28, @byte_dst
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bne fail1:16
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bne fail1:16
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;;
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;;
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;; Now let's do one in which the bits in the destination
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;; Now let's do one in which the bits in the destination
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;; are appropriately combined with the bits in the source.
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;; are appropriately combined with the bits in the source.
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;;
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;;
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mov.b #0xc3, @byte_dst
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mov.b #0xc3, @byte_dst
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set_ccr_zero
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set_ccr_zero
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bfst r1l, #0x3c, @byte_dst:32
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bfst r1l, #0x3c, @byte_dst:32
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;;; .word 0x6a38
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;;; .word 0x6a38
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;;; .long byte_dst
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;;; .long byte_dst
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;;; .word 0xf93c
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;;; .word 0xf93c
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test_cc_clear
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test_cc_clear
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cmp.b #0xd7, @byte_dst
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cmp.b #0xd7, @byte_dst
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bne fail1:16
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bne fail1:16
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test_grs_a5a5
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test_grs_a5a5
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.endif
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.endif
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pass
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pass
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exit 0
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exit 0
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fail1: fail
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fail1: fail
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