OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [m32r/] [bnc8.cgs] - Diff between revs 24 and 33

Only display areas with differences | Details | Blame | View Log

Rev 24 Rev 33
# m32r testcase for bnc $disp8
# m32r testcase for bnc $disp8
# mach(): m32r m32rx
# mach(): m32r m32rx
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global bnc8
        .global bnc8
bnc8:
bnc8:
        mvi_h_condbit 0
        mvi_h_condbit 0
        bnc.s test0pass
        bnc.s test0pass
test1fail:
test1fail:
        fail
        fail
test0pass:
test0pass:
        mvi_h_condbit 1
        mvi_h_condbit 1
        bnc.s test1fail
        bnc.s test1fail
        pass
        pass
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.